From: Greg Kroah-Hartman Date: Tue, 18 Oct 2022 12:57:59 +0000 (+0200) Subject: drop arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch X-Git-Tag: v6.0.3~69 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=558dd49e8223103e74695903c6bed3b3d06c1ce8;p=thirdparty%2Fkernel%2Fstable-queue.git drop arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch not needed --- diff --git a/queue-5.10/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch b/queue-5.10/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch deleted file mode 100644 index 59d3004e869..00000000000 --- a/queue-5.10/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch +++ /dev/null @@ -1,44 +0,0 @@ -From d2c595840ed4c36751bfcfea73e21f6e390e165d Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 28 Jul 2022 13:37:47 +0200 -Subject: arm64: dts: qcom: sdm845: narrow LLCC address space - -From: Krzysztof Kozlowski - -[ Upstream commit 300b5f661eebefb8571841b78091343eb87eca54 ] - -The Last Level Cache Controller (LLCC) device does not need to access -entire LLCC address space. Currently driver uses only hardware info and -status registers which both reside in LLCC0_COMMON range (offset -0x30000, size 0x1000). Narrow the address space to allow binding other -drivers to rest of LLCC address space. - -Cc: Rajendra Nayak -Cc: Sibi Sankar -Reported-by: Steev Klimaszewski -Suggested-by: Sibi Sankar -Signed-off-by: Krzysztof Kozlowski -Tested-by: Steev Klimaszewski -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@linaro.org -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi -index 9beb3c34fcdb..068fad00e615 100644 ---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi -+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi -@@ -1796,7 +1796,7 @@ - - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; -- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>; -+ reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; - }; --- -2.35.1 - diff --git a/queue-5.10/series b/queue-5.10/series index 6c27fdafb1e..c09e71a2d5a 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -396,7 +396,6 @@ drm-meson-explicitly-remove-aggregate-driver-at-modu.patch mmc-sdhci-msm-add-compatible-string-check-for-sdm670.patch drm-dp-don-t-rewrite-link-config-when-setting-phy-te.patch drm-amd-display-remove-interface-for-periodic-interr.patch -arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch arm-dts-imx7d-sdb-config-the-max-pressure-for-tsc204.patch arm-dts-imx6q-add-missing-properties-for-sram.patch arm-dts-imx6dl-add-missing-properties-for-sram.patch diff --git a/queue-5.15/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch b/queue-5.15/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch deleted file mode 100644 index e64bb66ba0d..00000000000 --- a/queue-5.15/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch +++ /dev/null @@ -1,44 +0,0 @@ -From b06496f6e669d25307e4015cecd8b2d40cf47341 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 28 Jul 2022 13:37:47 +0200 -Subject: arm64: dts: qcom: sdm845: narrow LLCC address space - -From: Krzysztof Kozlowski - -[ Upstream commit 300b5f661eebefb8571841b78091343eb87eca54 ] - -The Last Level Cache Controller (LLCC) device does not need to access -entire LLCC address space. Currently driver uses only hardware info and -status registers which both reside in LLCC0_COMMON range (offset -0x30000, size 0x1000). Narrow the address space to allow binding other -drivers to rest of LLCC address space. - -Cc: Rajendra Nayak -Cc: Sibi Sankar -Reported-by: Steev Klimaszewski -Suggested-by: Sibi Sankar -Signed-off-by: Krzysztof Kozlowski -Tested-by: Steev Klimaszewski -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@linaro.org -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi -index ea7a272d267a..ce523ec8dd28 100644 ---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi -+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi -@@ -1968,7 +1968,7 @@ - - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; -- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>; -+ reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; - }; --- -2.35.1 - diff --git a/queue-5.15/series b/queue-5.15/series index feeb943fee2..2f8a7bf9f66 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -533,7 +533,6 @@ drm-meson-explicitly-remove-aggregate-driver-at-modu.patch mmc-sdhci-msm-add-compatible-string-check-for-sdm670.patch drm-dp-don-t-rewrite-link-config-when-setting-phy-te.patch drm-amd-display-remove-interface-for-periodic-interr.patch -arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch arm-dts-imx7d-sdb-config-the-max-pressure-for-tsc204.patch arm64-dts-qcom-sc7280-idp-correct-adc-channel-node-n.patch arm-dts-imx6q-add-missing-properties-for-sram.patch diff --git a/queue-5.19/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch b/queue-5.19/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch deleted file mode 100644 index 2a3b2359fbe..00000000000 --- a/queue-5.19/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 0a956cf8c57b1139c024bdc1e94859819410e9a8 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 28 Jul 2022 13:37:47 +0200 -Subject: arm64: dts: qcom: sdm845: narrow LLCC address space - -From: Krzysztof Kozlowski - -[ Upstream commit 300b5f661eebefb8571841b78091343eb87eca54 ] - -The Last Level Cache Controller (LLCC) device does not need to access -entire LLCC address space. Currently driver uses only hardware info and -status registers which both reside in LLCC0_COMMON range (offset -0x30000, size 0x1000). Narrow the address space to allow binding other -drivers to rest of LLCC address space. - -Cc: Rajendra Nayak -Cc: Sibi Sankar -Reported-by: Steev Klimaszewski -Suggested-by: Sibi Sankar -Signed-off-by: Krzysztof Kozlowski -Tested-by: Steev Klimaszewski -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@linaro.org -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi -index 7783005c8028..6d9787e32b88 100644 ---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi -+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi -@@ -2021,7 +2021,7 @@ - - llcc: system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; -- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>; -+ reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; - }; --- -2.35.1 - diff --git a/queue-5.19/series b/queue-5.19/series index 87923ded0bc..1052bef05f3 100644 --- a/queue-5.19/series +++ b/queue-5.19/series @@ -722,7 +722,6 @@ drm-dp-don-t-rewrite-link-config-when-setting-phy-te.patch drm-amd-display-remove-interface-for-periodic-interr.patch drm-amd-display-polling-vid-stream-status-in-hpo-dp-.patch drm-amdkfd-fix-ubsan-shift-out-of-bounds-warning.patch -arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch arm-dts-imx6-delete-interrupts-property-if-interrupt.patch arm-dts-imx7d-sdb-config-the-max-pressure-for-tsc204.patch arm64-dts-qcom-sc7280-idp-correct-adc-channel-node-n.patch diff --git a/queue-5.4/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch b/queue-5.4/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch deleted file mode 100644 index 64aec16dd61..00000000000 --- a/queue-5.4/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch +++ /dev/null @@ -1,44 +0,0 @@ -From d27b2d0c7a068be1e6a3d804b213a0593df0d7ef Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 28 Jul 2022 13:37:47 +0200 -Subject: arm64: dts: qcom: sdm845: narrow LLCC address space - -From: Krzysztof Kozlowski - -[ Upstream commit 300b5f661eebefb8571841b78091343eb87eca54 ] - -The Last Level Cache Controller (LLCC) device does not need to access -entire LLCC address space. Currently driver uses only hardware info and -status registers which both reside in LLCC0_COMMON range (offset -0x30000, size 0x1000). Narrow the address space to allow binding other -drivers to rest of LLCC address space. - -Cc: Rajendra Nayak -Cc: Sibi Sankar -Reported-by: Steev Klimaszewski -Suggested-by: Sibi Sankar -Signed-off-by: Krzysztof Kozlowski -Tested-by: Steev Klimaszewski -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@linaro.org -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi -index 2287354fef86..76f905c32aee 100644 ---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi -+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi -@@ -1359,7 +1359,7 @@ - - cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; -- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>; -+ reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; - }; --- -2.35.1 - diff --git a/queue-5.4/series b/queue-5.4/series index a43b65109c3..3b9c6ce3954 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -228,7 +228,6 @@ drm-panel-orientation-quirks-add-quirk-for-anbernic-.patch platform-x86-msi-laptop-change-dmi-match-alias-strin.patch drm-amdgpu-fix-initial-connector-audio-value.patch mmc-sdhci-msm-add-compatible-string-check-for-sdm670.patch -arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch arm-dts-imx7d-sdb-config-the-max-pressure-for-tsc204.patch arm-dts-imx6q-add-missing-properties-for-sram.patch arm-dts-imx6dl-add-missing-properties-for-sram.patch diff --git a/queue-6.0/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch b/queue-6.0/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch deleted file mode 100644 index 7672ed291f4..00000000000 --- a/queue-6.0/arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch +++ /dev/null @@ -1,45 +0,0 @@ -From b2c83d7350882592f9c9be9a163fc5a60704ab00 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 28 Jul 2022 13:37:47 +0200 -Subject: arm64: dts: qcom: sdm845: narrow LLCC address space - -From: Krzysztof Kozlowski - -[ Upstream commit 300b5f661eebefb8571841b78091343eb87eca54 ] - -The Last Level Cache Controller (LLCC) device does not need to access -entire LLCC address space. Currently driver uses only hardware info and -status registers which both reside in LLCC0_COMMON range (offset -0x30000, size 0x1000). Narrow the address space to allow binding other -drivers to rest of LLCC address space. - -Cc: Rajendra Nayak -Cc: Sibi Sankar -Reported-by: Steev Klimaszewski -Suggested-by: Sibi Sankar -Signed-off-by: Krzysztof Kozlowski -Tested-by: Steev Klimaszewski -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@linaro.org -Stable-dep-of: 5a0504945878 ("arm64: dts: qcom: sdm845-xiaomi-polaris: Fix sde_dsi_active pinctrl") -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi -index f0e286715d1b..4d5ae5897d1d 100644 ---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi -+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi -@@ -2138,7 +2138,7 @@ - - llcc: system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; -- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>; -+ reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = ; - }; --- -2.35.1 - diff --git a/queue-6.0/series b/queue-6.0/series index 2c01d414498..81fad7291d6 100644 --- a/queue-6.0/series +++ b/queue-6.0/series @@ -428,7 +428,6 @@ arm64-dts-renesas-r9a07g044-fix-sci-rx-tx-interrupt-.patch arm64-dts-renesas-r9a07g054-fix-sci-rx-tx-interrupt-.patch arm64-dts-renesas-r9a07g043-fix-sci-rx-tx-interrupt-.patch dt-bindings-clock-exynosautov9-correct-clock-numberi.patch -arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch arm64-dts-qcom-sdm845-xiaomi-polaris-fix-sde_dsi_act.patch arm64-dts-qcom-sc7280-cleanup-the-lpasscc-node.patch arm64-dts-qcom-sc7280-update-lpasscore-node.patch