From: Jingyi Wang Date: Tue, 3 Dec 2024 09:27:13 +0000 (+0800) Subject: arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300 X-Git-Tag: v6.14-rc1~101^2~2^2~3 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=57039a27658a1e7ca1c60fe7e381092c609e4bc7;p=thirdparty%2Flinux.git arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300 Enable clock controller, interconnect and pinctrl for Qualcomm QCS8300 platform to boot QCS8300 RIDE board to UART console. The serial engine depends on gcc, interconnect and pinctrl. Since the serial console driver is only available as built-in, so these configs needs be built-in for the UART device to probe and register the console. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jingyi Wang Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e7b5cf399cdd2..2554f5ec1fb3f 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -608,6 +608,7 @@ CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y CONFIG_PINCTRL_QCS615=y +CONFIG_PINCTRL_QCS8300=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y @@ -1327,6 +1328,7 @@ CONFIG_QCM_GCC_2290=y CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y CONFIG_QCS_GCC_615=y +CONFIG_QCS_GCC_8300=y CONFIG_SC_CAMCC_7280=m CONFIG_SA_CAMCC_8775P=m CONFIG_QDU_GCC_1000=y @@ -1638,6 +1640,7 @@ CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_QCM2290=y CONFIG_INTERCONNECT_QCOM_QCS404=m CONFIG_INTERCONNECT_QCOM_QCS615=y +CONFIG_INTERCONNECT_QCOM_QCS8300=y CONFIG_INTERCONNECT_QCOM_QDU1000=y CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y