From: Michael Kowal Date: Mon, 12 May 2025 03:10:16 +0000 (+1000) Subject: ppc/xive2: Reset Generation Flipped bit on END Cache Watch X-Git-Tag: v10.1.0-rc0~2^2~43 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=576830428eea6ebfc85792851a343214b834e401;p=thirdparty%2Fqemu.git ppc/xive2: Reset Generation Flipped bit on END Cache Watch When the END Event Queue wraps the END EQ Generation bit is flipped and the Generation Flipped bit is set to one. On a END cache Watch read operation, the Generation Flipped bit needs to be reset. While debugging an error modified END not valid error messages to include the method since all were the same. Signed-off-by: Michael Kowal Reviewed-by: Nicholas Piggin Reviewed-by: Glenn Miles Reviewed-by: Michael Kowal Reviewed-by: Caleb Schlossin Tested-by: Gautam Menghani Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-8-npiggin@gmail.com Signed-off-by: Cédric Le Goater --- diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 6b724fe762..ec247ce48f 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -1325,10 +1325,11 @@ static uint64_t pnv_xive2_ic_vc_read(void *opaque, hwaddr offset, case VC_ENDC_WATCH3_DATA0: /* * Load DATA registers from cache with data requested by the - * SPEC register + * SPEC register. Clear gen_flipped bit in word 1. */ watch_engine = (offset - VC_ENDC_WATCH0_DATA0) >> 6; pnv_xive2_end_cache_load(xive, watch_engine); + xive->vc_regs[reg] &= ~(uint64_t)END2_W1_GEN_FLIPPED; val = xive->vc_regs[reg]; break; diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 01cf96a2af..edf5d9eb94 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -374,8 +374,8 @@ static void xive2_end_enqueue(Xive2End *end, uint32_t data) qgen ^= 1; end->w1 = xive_set_field32(END2_W1_GENERATION, end->w1, qgen); - /* TODO(PowerNV): reset GF bit on a cache watch operation */ - end->w1 = xive_set_field32(END2_W1_GEN_FLIPPED, end->w1, qgen); + /* Set gen flipped to 1, it gets reset on a cache watch operation */ + end->w1 = xive_set_field32(END2_W1_GEN_FLIPPED, end->w1, 1); } end->w1 = xive_set_field32(END2_W1_PAGE_OFF, end->w1, qindex); }