From: Greg Kroah-Hartman Date: Thu, 26 Jul 2018 14:49:15 +0000 (+0200) Subject: 4.14-stable patches X-Git-Tag: v3.18.117~19 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5871d742dc7b25f38a3fc5b4b1e03e49d388b70f;p=thirdparty%2Fkernel%2Fstable-queue.git 4.14-stable patches added patches: mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch mips-fix-off-by-one-in-pci_resource_to_user.patch --- diff --git a/queue-4.14/mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch b/queue-4.14/mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch new file mode 100644 index 00000000000..60284a970ba --- /dev/null +++ b/queue-4.14/mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch @@ -0,0 +1,39 @@ +From bc88ad2efd11f29e00a4fd60fcd1887abfe76833 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Fri, 20 Jul 2018 13:58:21 +0200 +Subject: MIPS: ath79: fix register address in ath79_ddr_wb_flush() + +From: Felix Fietkau + +commit bc88ad2efd11f29e00a4fd60fcd1887abfe76833 upstream. + +ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets +need to be a multiple of 4 in order to access the intended register. + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +Signed-off-by: Paul Burton +Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") +Patchwork: https://patchwork.linux-mips.org/patch/19912/ +Cc: Alban Bedel +Cc: James Hogan +Cc: Ralf Baechle +Cc: linux-mips@linux-mips.org +Cc: stable@vger.kernel.org # 4.2+ +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/ath79/common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); + + void ath79_ddr_wb_flush(u32 reg) + { +- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg; ++ void __iomem *flush_reg = ath79_ddr_wb_flush_base + (reg * 4); + + /* Flush the DDR write buffer. */ + __raw_writel(0x1, flush_reg); diff --git a/queue-4.14/mips-fix-off-by-one-in-pci_resource_to_user.patch b/queue-4.14/mips-fix-off-by-one-in-pci_resource_to_user.patch new file mode 100644 index 00000000000..c0e4503bfbc --- /dev/null +++ b/queue-4.14/mips-fix-off-by-one-in-pci_resource_to_user.patch @@ -0,0 +1,47 @@ +From 38c0a74fe06da3be133cae3fb7bde6a9438e698b Mon Sep 17 00:00:00 2001 +From: Paul Burton +Date: Thu, 12 Jul 2018 09:33:04 -0700 +Subject: MIPS: Fix off-by-one in pci_resource_to_user() + +From: Paul Burton + +commit 38c0a74fe06da3be133cae3fb7bde6a9438e698b upstream. + +The MIPS implementation of pci_resource_to_user() introduced in v3.12 by +commit 4c2924b725fb ("MIPS: PCI: Use pci_resource_to_user to map pci +memory space properly") incorrectly sets *end to the address of the +byte after the resource, rather than the last byte of the resource. + +This results in userland seeing resources as a byte larger than they +actually are, for example a 32 byte BAR will be reported by a tool such +as lspci as being 33 bytes in size: + + Region 2: I/O ports at 1000 [disabled] [size=33] + +Correct this by subtracting one from the calculated end address, +reporting the correct address to userland. + +Signed-off-by: Paul Burton +Reported-by: Rui Wang +Fixes: 4c2924b725fb ("MIPS: PCI: Use pci_resource_to_user to map pci memory space properly") +Cc: James Hogan +Cc: Ralf Baechle +Cc: Wolfgang Grandegger +Cc: linux-mips@linux-mips.org +Cc: stable@vger.kernel.org # v3.12+ +Patchwork: https://patchwork.linux-mips.org/patch/19829/ +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/pci/pci.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/pci/pci.c ++++ b/arch/mips/pci/pci.c +@@ -54,5 +54,5 @@ void pci_resource_to_user(const struct p + phys_addr_t size = resource_size(rsrc); + + *start = fixup_bigphys_addr(rsrc->start, size); +- *end = rsrc->start + size; ++ *end = rsrc->start + size - 1; + } diff --git a/queue-4.14/series b/queue-4.14/series index 4b2b0c92202..ba15bb9fef3 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -1 +1,3 @@ revert-cifs-fix-slab-out-of-bounds-in-send_set_info-on.patch +mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch +mips-fix-off-by-one-in-pci_resource_to_user.patch diff --git a/queue-4.4/series b/queue-4.4/series new file mode 100644 index 00000000000..e4d320cdad1 --- /dev/null +++ b/queue-4.4/series @@ -0,0 +1 @@ +mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch diff --git a/queue-4.9/series b/queue-4.9/series new file mode 100644 index 00000000000..faf5d517d99 --- /dev/null +++ b/queue-4.9/series @@ -0,0 +1,2 @@ +mips-ath79-fix-register-address-in-ath79_ddr_wb_flush.patch +mips-fix-off-by-one-in-pci_resource_to_user.patch