From: Christian König Date: Tue, 17 Apr 2018 12:47:42 +0000 (+0200) Subject: drm/amdgpu: limit reg_write_reg_wait workaround to SRIOV v2 X-Git-Tag: v4.18-rc1~128^2~12^2~143 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=58cd8fbc64b03d0e9961d627526bd07edbea00b9;p=thirdparty%2Fkernel%2Flinux.git drm/amdgpu: limit reg_write_reg_wait workaround to SRIOV v2 Turned out that this locks up some bare metal Vega10. v2: fix stupid typo Signed-off-by: Christian König Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 583f6f616dd3d..6a19e0311a9c4 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -4144,7 +4144,12 @@ static void gfx_v9_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, { int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX); - gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, ref, mask, 0x20); + if (amdgpu_sriov_vf(ring->adev)) + gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, + ref, mask, 0x20); + else + amdgpu_ring_emit_reg_write_reg_wait_helper(ring, reg0, reg1, + ref, mask); } static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,