From: Konrad Dybcio Date: Thu, 6 Jun 2024 11:10:49 +0000 (+0200) Subject: drm/msm/a6xx: Fix A702 UBWC mode X-Git-Tag: v6.11-rc1~141^2~4^2~53 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=593f1dd4c81f6932042508a80186dbdea90312a5;p=thirdparty%2Flinux.git drm/msm/a6xx: Fix A702 UBWC mode UBWC_MODE is a one-bit-wide field, so a value of 2 is obviously bogus. Replace it with the correct value (0). Fixes: 18397519cb62 ("drm/msm/adreno: Add A702 support") Reported-by: Connor Abbott Closes: https://lore.kernel.org/linux-arm-msm/CACu1E7FTN=kwaDJMNiTmFspALzj2+Q-nvsN5ugi=vz4RdUGvGw@mail.gmail.com/ Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/597359/ Signed-off-by: Rob Clark --- diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index aa37b0dcd58e6..8e40873611578 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -547,7 +547,7 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) if (adreno_is_a702(gpu)) { gpu->ubwc_config.highest_bank_bit = 14; gpu->ubwc_config.min_acc_len = 1; - gpu->ubwc_config.ubwc_mode = 2; + gpu->ubwc_config.ubwc_mode = 0; } }