From: Greg Kroah-Hartman Date: Sat, 23 Aug 2025 15:34:08 +0000 (+0200) Subject: 6.12-stable patches X-Git-Tag: v5.4.297~65 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=598e3116a4a7011b49dffec2c52867987e209f8a;p=thirdparty%2Fkernel%2Fstable-queue.git 6.12-stable patches added patches: mmc-sdhci_am654-disable-hs400-for-am62p-sr1.0-and-sr1.1.patch --- diff --git a/queue-6.12/mmc-sdhci_am654-disable-hs400-for-am62p-sr1.0-and-sr1.1.patch b/queue-6.12/mmc-sdhci_am654-disable-hs400-for-am62p-sr1.0-and-sr1.1.patch new file mode 100644 index 0000000000..9a7170345c --- /dev/null +++ b/queue-6.12/mmc-sdhci_am654-disable-hs400-for-am62p-sr1.0-and-sr1.1.patch @@ -0,0 +1,83 @@ +From d2d7a96b29ea6ab093973a1a37d26126db70c79f Mon Sep 17 00:00:00 2001 +From: Judith Mendez +Date: Wed, 20 Aug 2025 14:30:47 -0500 +Subject: mmc: sdhci_am654: Disable HS400 for AM62P SR1.0 and SR1.1 + +From: Judith Mendez + +commit d2d7a96b29ea6ab093973a1a37d26126db70c79f upstream. + +This adds SDHCI_AM654_QUIRK_DISABLE_HS400 quirk which shall be used +to disable HS400 support. AM62P SR1.0 and SR1.1 do not support HS400 +due to errata i2458 [0] so disable HS400 for these SoC revisions. + +[0] https://www.ti.com/lit/er/sprz574a/sprz574a.pdf +Fixes: 37f28165518f ("arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMC") +Cc: stable@vger.kernel.org +Signed-off-by: Judith Mendez +Reviewed-by: Andrew Davis +Acked-by: Adrian Hunter +Link: https://lore.kernel.org/r/20250820193047.4064142-1-jm@ti.com +Signed-off-by: Ulf Hansson +[ adapted quirk bit assignment from BIT(2) to BIT(1) ] +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci_am654.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/drivers/mmc/host/sdhci_am654.c ++++ b/drivers/mmc/host/sdhci_am654.c +@@ -155,6 +155,7 @@ struct sdhci_am654_data { + u32 tuning_loop; + + #define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0) ++#define SDHCI_AM654_QUIRK_DISABLE_HS400 BIT(1) + }; + + struct window { +@@ -734,6 +735,7 @@ static int sdhci_am654_init(struct sdhci + { + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); ++ struct device *dev = mmc_dev(host->mmc); + u32 ctl_cfg_2 = 0; + u32 mask; + u32 val; +@@ -789,6 +791,12 @@ static int sdhci_am654_init(struct sdhci + if (ret) + goto err_cleanup_host; + ++ if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_DISABLE_HS400 && ++ host->mmc->caps2 & (MMC_CAP2_HS400 | MMC_CAP2_HS400_ES)) { ++ dev_info(dev, "HS400 mode not supported on this silicon revision, disabling it\n"); ++ host->mmc->caps2 &= ~(MMC_CAP2_HS400 | MMC_CAP2_HS400_ES); ++ } ++ + ret = __sdhci_add_host(host); + if (ret) + goto err_cleanup_host; +@@ -852,6 +860,12 @@ static int sdhci_am654_get_of_property(s + return 0; + } + ++static const struct soc_device_attribute sdhci_am654_descope_hs400[] = { ++ { .family = "AM62PX", .revision = "SR1.0" }, ++ { .family = "AM62PX", .revision = "SR1.1" }, ++ { /* sentinel */ } ++}; ++ + static const struct of_device_id sdhci_am654_of_match[] = { + { + .compatible = "ti,am654-sdhci-5.1", +@@ -943,6 +957,10 @@ static int sdhci_am654_probe(struct plat + goto err_pltfm_free; + } + ++ soc = soc_device_match(sdhci_am654_descope_hs400); ++ if (soc) ++ sdhci_am654->quirks |= SDHCI_AM654_QUIRK_DISABLE_HS400; ++ + host->mmc_host_ops.execute_tuning = sdhci_am654_execute_tuning; + + pm_runtime_get_noresume(dev); diff --git a/queue-6.12/series b/queue-6.12/series index 0afc745d60..05dc35f029 100644 --- a/queue-6.12/series +++ b/queue-6.12/series @@ -210,3 +210,4 @@ use-uniform-permission-checks-for-all-mount-propagat.patch cpuidle-menu-remove-iowait-influence.patch cpuidle-governors-menu-avoid-selecting-states-with-too-much-latency.patch drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch +mmc-sdhci_am654-disable-hs400-for-am62p-sr1.0-and-sr1.1.patch