From: Uros Bizjak Date: Thu, 26 Aug 2021 20:08:25 +0000 (+0200) Subject: [i386] Call force_reg unconditionally. X-Git-Tag: basepoints/gcc-13~5142 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5a6c626710ad2ac4baa2dba02fac0750177e3305;p=thirdparty%2Fgcc.git [i386] Call force_reg unconditionally. There is no point to check RTXes before calling force_reg, force_reg checks for REG RTX by itself. 2021-08-26 Uroš Bizjak gcc/ * config/i386/i386.md (*btr_1): Call force_reg unconditionally. (conditional moves with memory inputs splitters): Ditto. * config/i386/sse.md (one_cmpl2): Simplify. --- diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c80dcb57a184..528116dfe2d4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12728,8 +12728,7 @@ (clobber (reg:CC FLAGS_REG))])] { operands[0] = lowpart_subreg (SImode, operands[0], mode); - if (MEM_P (operands[1])) - operands[1] = force_reg (mode, operands[1]); + operands[1] = force_reg (mode, operands[1]); operands[1] = lowpart_subreg (SImode, operands[1], mode); }) @@ -19352,10 +19351,8 @@ [(set (match_dup 0) (if_then_else:SWI248 (match_dup 1) (match_dup 2) (match_dup 3)))] { - if (MEM_P (operands[2])) - operands[2] = force_reg (mode, operands[2]); - if (MEM_P (operands[3])) - operands[3] = force_reg (mode, operands[3]); + operands[2] = force_reg (mode, operands[2]); + operands[3] = force_reg (mode, operands[3]); }) (define_insn "*movqicc_noc" @@ -19603,10 +19600,8 @@ [(set (match_dup 0) (if_then_else:MODEF (match_dup 1) (match_dup 2) (match_dup 3)))] { - if (MEM_P (operands[2])) - operands[2] = force_reg (mode, operands[2]); - if (MEM_P (operands[3])) - operands[3] = force_reg (mode, operands[3]); + operands[2] = force_reg (mode, operands[2]); + operands[3] = force_reg (mode, operands[3]); }) ;; Don't do conditional moves with memory inputs diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 03fc2df1fb0e..0ca322996ce7 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -14318,10 +14318,10 @@ (match_dup 2)))] "TARGET_SSE" { + operands[2] = CONSTM1_RTX (mode); + if (!TARGET_AVX512F) - operands[2] = force_reg (mode, CONSTM1_RTX (mode)); - else - operands[2] = CONSTM1_RTX (mode); + operands[2] = force_reg (mode, operands[2]); }) (define_insn "one_cmpl2"