From: Greg Kroah-Hartman Date: Mon, 11 Apr 2022 09:25:24 +0000 (+0200) Subject: 5.17-stable patches X-Git-Tag: v4.9.310~60 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5be90c30d5e7543a2407aeb26b36a4eba18c4213;p=thirdparty%2Fkernel%2Fstable-queue.git 5.17-stable patches added patches: drm-amd-display-fix-by-adding-fpu-protection-for-dcn30_internal_validate_bw.patch drm-amdgpu-display-change-pipe-policy-for-dcn-2.1.patch drm-amdgpu-don-t-use-baco-for-reset-in-s3.patch drm-amdgpu-smu10-fix-soc-fclk-units-in-auto-mode.patch drm-amdgpu-vcn-fix-the-register-setting-for-vcn1.patch drm-amdkfd-create-file-descriptor-after-client-is-added-to-smi_clients-list.patch drm-nouveau-pmu-add-missing-callbacks-for-tegra-devices.patch drm-panel-ili9341-fix-optional-regulator-handling.patch sunrpc-ensure-we-flush-any-closed-sockets-before-xs_xprt_free.patch --- diff --git a/queue-5.17/drm-amd-display-fix-by-adding-fpu-protection-for-dcn30_internal_validate_bw.patch b/queue-5.17/drm-amd-display-fix-by-adding-fpu-protection-for-dcn30_internal_validate_bw.patch new file mode 100644 index 00000000000..41a79fa45a9 --- /dev/null +++ b/queue-5.17/drm-amd-display-fix-by-adding-fpu-protection-for-dcn30_internal_validate_bw.patch @@ -0,0 +1,91 @@ +From ca1198849ab0e7af5efb392ef6baf1138f6fc086 Mon Sep 17 00:00:00 2001 +From: CHANDAN VURDIGERE NATARAJ +Date: Tue, 29 Mar 2022 13:10:31 +0530 +Subject: drm/amd/display: Fix by adding FPU protection for dcn30_internal_validate_bw + +From: CHANDAN VURDIGERE NATARAJ + +commit ca1198849ab0e7af5efb392ef6baf1138f6fc086 upstream. + +[Why] +Below general protection fault observed when WebGL Aquarium is run for +longer duration. If drm debug logs are enabled and set to 0x1f then the +issue is observed within 10 minutes of run. + +[ 100.717056] general protection fault, probably for non-canonical address 0x2d33302d32323032: 0000 [#1] PREEMPT SMP NOPTI +[ 100.727921] CPU: 3 PID: 1906 Comm: DrmThread Tainted: G W 5.15.30 #12 d726c6a2d6ebe5cf9223931cbca6892f916fe18b +[ 100.754419] RIP: 0010:CalculateSwathWidth+0x1f7/0x44f +[ 100.767109] Code: 00 00 00 f2 42 0f 11 04 f0 48 8b 85 88 00 00 00 f2 42 0f 10 04 f0 48 8b 85 98 00 00 00 f2 42 0f 11 04 f0 48 8b 45 10 0f 57 c0 42 0f 2a 04 b0 0f 57 c9 f3 43 0f 2a 0c b4 e8 8c e2 f3 ff 48 8b +[ 100.781269] RSP: 0018:ffffa9230079eeb0 EFLAGS: 00010246 +[ 100.812528] RAX: 2d33302d32323032 RBX: 0000000000000500 RCX: 0000000000000000 +[ 100.819656] RDX: 0000000000000001 RSI: ffff99deb712c49c RDI: 0000000000000000 +[ 100.826781] RBP: ffffa9230079ef50 R08: ffff99deb712460c R09: ffff99deb712462c +[ 100.833907] R10: ffff99deb7124940 R11: ffff99deb7124d70 R12: ffff99deb712ae44 +[ 100.841033] R13: 0000000000000001 R14: 0000000000000000 R15: ffffa9230079f0a0 +[ 100.848159] FS: 00007af121212640(0000) GS:ffff99deba780000(0000) knlGS:0000000000000000 +[ 100.856240] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 100.861980] CR2: 0000209000fe1000 CR3: 000000011b18c000 CR4: 0000000000350ee0 +[ 100.869106] Call Trace: +[ 100.871555] +[ 100.873655] ? asm_sysvec_reschedule_ipi+0x12/0x20 +[ 100.878449] CalculateSwathAndDETConfiguration+0x1a3/0x6dd +[ 100.883937] dml31_ModeSupportAndSystemConfigurationFull+0x2ce4/0x76da +[ 100.890467] ? kallsyms_lookup_buildid+0xc8/0x163 +[ 100.895173] ? kallsyms_lookup_buildid+0xc8/0x163 +[ 100.899874] ? __sprint_symbol+0x80/0x135 +[ 100.903883] ? dm_update_plane_state+0x3f9/0x4d2 +[ 100.908500] ? symbol_string+0xb7/0xde +[ 100.912250] ? number+0x145/0x29b +[ 100.915566] ? vsnprintf+0x341/0x5ff +[ 100.919141] ? desc_read_finalized_seq+0x39/0x87 +[ 100.923755] ? update_load_avg+0x1b9/0x607 +[ 100.927849] ? compute_mst_dsc_configs_for_state+0x7d/0xd5b +[ 100.933416] ? fetch_pipe_params+0xa4d/0xd0c +[ 100.937686] ? dc_fpu_end+0x3d/0xa8 +[ 100.941175] dml_get_voltage_level+0x16b/0x180 +[ 100.945619] dcn30_internal_validate_bw+0x10e/0x89b +[ 100.950495] ? dcn31_validate_bandwidth+0x68/0x1fc +[ 100.955285] ? resource_build_scaling_params+0x98b/0xb8c +[ 100.960595] ? dcn31_validate_bandwidth+0x68/0x1fc +[ 100.965384] dcn31_validate_bandwidth+0x9a/0x1fc +[ 100.970001] dc_validate_global_state+0x238/0x295 +[ 100.974703] amdgpu_dm_atomic_check+0x9c1/0xbce +[ 100.979235] ? _printk+0x59/0x73 +[ 100.982467] drm_atomic_check_only+0x403/0x78b +[ 100.986912] drm_mode_atomic_ioctl+0x49b/0x546 +[ 100.991358] ? drm_ioctl+0x1c1/0x3b3 +[ 100.994936] ? drm_atomic_set_property+0x92a/0x92a +[ 100.999725] drm_ioctl_kernel+0xdc/0x149 +[ 101.003648] drm_ioctl+0x27f/0x3b3 +[ 101.007051] ? drm_atomic_set_property+0x92a/0x92a +[ 101.011842] amdgpu_drm_ioctl+0x49/0x7d +[ 101.015679] __se_sys_ioctl+0x7c/0xb8 +[ 101.015685] do_syscall_64+0x5f/0xb8 +[ 101.015690] ? __irq_exit_rcu+0x34/0x96 + +[How] +It calles populate_dml_pipes which uses doubles to initialize. +Adding FPU protection avoids context switch and probable loss of vba context +as there is potential contention while drm debug logs are enabled. + +Signed-off-by: CHANDAN VURDIGERE NATARAJ +Reviewed-by: Rodrigo Siqueira +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +@@ -2025,7 +2025,9 @@ bool dcn31_validate_bandwidth(struct dc + + BW_VAL_TRACE_COUNT(); + ++ DC_FP_START(); + out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate); ++ DC_FP_END(); + + // Disable fast_validate to set min dcfclk in alculate_wm_and_dlg + if (pipe_cnt == 0) diff --git a/queue-5.17/drm-amdgpu-display-change-pipe-policy-for-dcn-2.1.patch b/queue-5.17/drm-amdgpu-display-change-pipe-policy-for-dcn-2.1.patch new file mode 100644 index 00000000000..52a73cf8e68 --- /dev/null +++ b/queue-5.17/drm-amdgpu-display-change-pipe-policy-for-dcn-2.1.patch @@ -0,0 +1,32 @@ +From 879791ad8bf3dc5453061cad74776a617b6e3319 Mon Sep 17 00:00:00 2001 +From: Benjamin Marty +Date: Wed, 23 Mar 2022 22:08:26 +0100 +Subject: drm/amdgpu/display: change pipe policy for DCN 2.1 + +From: Benjamin Marty + +commit 879791ad8bf3dc5453061cad74776a617b6e3319 upstream. + +Fixes crash on MST Hub disconnect. + +Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1849 +Fixes: ee2698cf79cc ("drm/amd/display: Changed pipe split policy to allow for multi-display pipe split") +Signed-off-by: Benjamin Marty +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c +@@ -873,7 +873,7 @@ static const struct dc_debug_options deb + .clock_trace = true, + .disable_pplib_clock_request = true, + .min_disp_clk_khz = 100000, +- .pipe_split_policy = MPC_SPLIT_DYNAMIC, ++ .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP, + .force_single_disp_pipe_split = false, + .disable_dcc = DCC_ENABLE, + .vsr_support = true, diff --git a/queue-5.17/drm-amdgpu-don-t-use-baco-for-reset-in-s3.patch b/queue-5.17/drm-amdgpu-don-t-use-baco-for-reset-in-s3.patch new file mode 100644 index 00000000000..85ebc97a7bc --- /dev/null +++ b/queue-5.17/drm-amdgpu-don-t-use-baco-for-reset-in-s3.patch @@ -0,0 +1,42 @@ +From ebc002e3ee78409c42156e62e4e27ad1d09c5a75 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 25 Mar 2022 11:53:39 -0400 +Subject: drm/amdgpu: don't use BACO for reset in S3 + +From: Alex Deucher + +commit ebc002e3ee78409c42156e62e4e27ad1d09c5a75 upstream. + +Seems to cause a reboots or hangs on some systems. + +Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1924 +Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1953 +Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)") +Reviewed-by: Lijo Lazar +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c ++++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c +@@ -1045,6 +1045,17 @@ bool amdgpu_dpm_is_baco_supported(struct + + if (!pp_funcs || !pp_funcs->get_asic_baco_capability) + return false; ++ /* Don't use baco for reset in S3. ++ * This is a workaround for some platforms ++ * where entering BACO during suspend ++ * seems to cause reboots or hangs. ++ * This might be related to the fact that BACO controls ++ * power to the whole GPU including devices like audio and USB. ++ * Powering down/up everything may adversely affect these other ++ * devices. Needs more investigation. ++ */ ++ if (adev->in_s3) ++ return false; + + if (pp_funcs->get_asic_baco_capability(pp_handle, &baco_cap)) + return false; diff --git a/queue-5.17/drm-amdgpu-smu10-fix-soc-fclk-units-in-auto-mode.patch b/queue-5.17/drm-amdgpu-smu10-fix-soc-fclk-units-in-auto-mode.patch new file mode 100644 index 00000000000..c46fb4e84a2 --- /dev/null +++ b/queue-5.17/drm-amdgpu-smu10-fix-soc-fclk-units-in-auto-mode.patch @@ -0,0 +1,54 @@ +From 2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 1 Apr 2022 11:08:48 -0400 +Subject: drm/amdgpu/smu10: fix SoC/fclk units in auto mode + +From: Alex Deucher + +commit 2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb upstream. + +SMU takes clock limits in Mhz units. socclk and fclk were +using 10 khz units in some cases. Switch to Mhz units. +Fixes higher than required SoC clocks. + +Fixes: 97cf32996c46d9 ("drm/amd/pm: Removed fixed clock in auto mode DPM") +Reviewed-by: Paul Menzel +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c ++++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c +@@ -773,13 +773,13 @@ static int smu10_dpm_force_dpm_level(str + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_SetHardMinFclkByFreq, + hwmgr->display_config->num_display > 3 ? +- data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk : ++ (data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk / 100) : + min_mclk, + NULL); + + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_SetHardMinSocclkByFreq, +- data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk, ++ data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk / 100, + NULL); + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_SetHardMinVcn, +@@ -792,11 +792,11 @@ static int smu10_dpm_force_dpm_level(str + NULL); + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_SetSoftMaxFclkByFreq, +- data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk, ++ data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk / 100, + NULL); + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_SetSoftMaxSocclkByFreq, +- data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk, ++ data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk / 100, + NULL); + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_SetSoftMaxVcn, diff --git a/queue-5.17/drm-amdgpu-vcn-fix-the-register-setting-for-vcn1.patch b/queue-5.17/drm-amdgpu-vcn-fix-the-register-setting-for-vcn1.patch new file mode 100644 index 00000000000..e9a75d94bca --- /dev/null +++ b/queue-5.17/drm-amdgpu-vcn-fix-the-register-setting-for-vcn1.patch @@ -0,0 +1,34 @@ +From 02fc996d5098f4c3f65bdf6cdb6b28e3f29ba789 Mon Sep 17 00:00:00 2001 +From: Emily Deng +Date: Mon, 21 Mar 2022 16:25:24 +0800 +Subject: drm/amdgpu/vcn: Fix the register setting for vcn1 + +From: Emily Deng + +commit 02fc996d5098f4c3f65bdf6cdb6b28e3f29ba789 upstream. + +Correct the code error for setting register UVD_GFX10_ADDR_CONFIG. +Need to use inst_idx, or it only will set VCN0. + +Signed-off-by: Emily Deng +Reviewed-by: James Zhu +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c +@@ -569,8 +569,8 @@ static void vcn_v3_0_mc_resume_dpg_mode( + AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_fw_shared)), 0, indirect); + + /* VCN global tiling registers */ +- WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( +- UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); ++ WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( ++ UVD, inst_idx, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); + } + + static void vcn_v3_0_disable_static_power_gating(struct amdgpu_device *adev, int inst) diff --git a/queue-5.17/drm-amdkfd-create-file-descriptor-after-client-is-added-to-smi_clients-list.patch b/queue-5.17/drm-amdkfd-create-file-descriptor-after-client-is-added-to-smi_clients-list.patch new file mode 100644 index 00000000000..ade7fa4e367 --- /dev/null +++ b/queue-5.17/drm-amdkfd-create-file-descriptor-after-client-is-added-to-smi_clients-list.patch @@ -0,0 +1,73 @@ +From e79a2398e1b2d47060474dca291542368183bc0f Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Thu, 31 Mar 2022 13:21:17 +0100 +Subject: drm/amdkfd: Create file descriptor after client is added to smi_clients list +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lee Jones + +commit e79a2398e1b2d47060474dca291542368183bc0f upstream. + +This ensures userspace cannot prematurely clean-up the client before +it is fully initialised which has been proven to cause issues in the +past. + +Cc: Felix Kuehling +Cc: Alex Deucher +Cc: "Christian König" +Cc: "Pan, Xinhui" +Cc: David Airlie +Cc: Daniel Vetter +Cc: amd-gfx@lists.freedesktop.org +Cc: dri-devel@lists.freedesktop.org +Signed-off-by: Lee Jones +Reviewed-by: Felix Kuehling +Signed-off-by: Felix Kuehling +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c | 24 +++++++++++++++--------- + 1 file changed, 15 insertions(+), 9 deletions(-) + +--- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c +@@ -268,15 +268,6 @@ int kfd_smi_event_open(struct kfd_dev *d + return ret; + } + +- ret = anon_inode_getfd(kfd_smi_name, &kfd_smi_ev_fops, (void *)client, +- O_RDWR); +- if (ret < 0) { +- kfifo_free(&client->fifo); +- kfree(client); +- return ret; +- } +- *fd = ret; +- + init_waitqueue_head(&client->wait_queue); + spin_lock_init(&client->lock); + client->events = 0; +@@ -286,5 +277,20 @@ int kfd_smi_event_open(struct kfd_dev *d + list_add_rcu(&client->list, &dev->smi_clients); + spin_unlock(&dev->smi_lock); + ++ ret = anon_inode_getfd(kfd_smi_name, &kfd_smi_ev_fops, (void *)client, ++ O_RDWR); ++ if (ret < 0) { ++ spin_lock(&dev->smi_lock); ++ list_del_rcu(&client->list); ++ spin_unlock(&dev->smi_lock); ++ ++ synchronize_rcu(); ++ ++ kfifo_free(&client->fifo); ++ kfree(client); ++ return ret; ++ } ++ *fd = ret; ++ + return 0; + } diff --git a/queue-5.17/drm-nouveau-pmu-add-missing-callbacks-for-tegra-devices.patch b/queue-5.17/drm-nouveau-pmu-add-missing-callbacks-for-tegra-devices.patch new file mode 100644 index 00000000000..505ad6bbb53 --- /dev/null +++ b/queue-5.17/drm-nouveau-pmu-add-missing-callbacks-for-tegra-devices.patch @@ -0,0 +1,69 @@ +From 38d4e5cf5b08798f093374e53c2f4609d5382dd5 Mon Sep 17 00:00:00 2001 +From: Karol Herbst +Date: Tue, 22 Mar 2022 13:48:00 +0100 +Subject: drm/nouveau/pmu: Add missing callbacks for Tegra devices + +From: Karol Herbst + +commit 38d4e5cf5b08798f093374e53c2f4609d5382dd5 upstream. + +Fixes a crash booting on those platforms with nouveau. + +Fixes: 4cdd2450bf73 ("drm/nouveau/pmu/gm200-: use alternate falcon reset sequence") +Cc: Ben Skeggs +Cc: Karol Herbst +Cc: dri-devel@lists.freedesktop.org +Cc: nouveau@lists.freedesktop.org +Cc: # v5.17+ +Signed-off-by: Karol Herbst +Reviewed-by: Lyude Paul +Link: https://patchwork.freedesktop.org/patch/msgid/20220322124800.2605463-1-kherbst@redhat.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c | 1 + + drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c | 2 +- + drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c | 1 + + drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h | 1 + + 4 files changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c +@@ -216,6 +216,7 @@ gm20b_pmu = { + .intr = gt215_pmu_intr, + .recv = gm20b_pmu_recv, + .initmsg = gm20b_pmu_initmsg, ++ .reset = gf100_pmu_reset, + }; + + #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c +@@ -23,7 +23,7 @@ + */ + #include "priv.h" + +-static void ++void + gp102_pmu_reset(struct nvkm_pmu *pmu) + { + struct nvkm_device *device = pmu->subdev.device; +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c +@@ -83,6 +83,7 @@ gp10b_pmu = { + .intr = gt215_pmu_intr, + .recv = gm20b_pmu_recv, + .initmsg = gm20b_pmu_initmsg, ++ .reset = gp102_pmu_reset, + }; + + #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h +@@ -41,6 +41,7 @@ int gt215_pmu_send(struct nvkm_pmu *, u3 + + bool gf100_pmu_enabled(struct nvkm_pmu *); + void gf100_pmu_reset(struct nvkm_pmu *); ++void gp102_pmu_reset(struct nvkm_pmu *pmu); + + void gk110_pmu_pgob(struct nvkm_pmu *, bool); + diff --git a/queue-5.17/drm-panel-ili9341-fix-optional-regulator-handling.patch b/queue-5.17/drm-panel-ili9341-fix-optional-regulator-handling.patch new file mode 100644 index 00000000000..052a23f9c49 --- /dev/null +++ b/queue-5.17/drm-panel-ili9341-fix-optional-regulator-handling.patch @@ -0,0 +1,37 @@ +From d14eb80e27795b7b20060f7b151cdfe39722a813 Mon Sep 17 00:00:00 2001 +From: Daniel Mack +Date: Thu, 17 Mar 2022 23:55:37 +0100 +Subject: drm/panel: ili9341: fix optional regulator handling + +From: Daniel Mack + +commit d14eb80e27795b7b20060f7b151cdfe39722a813 upstream. + +If the optional regulator lookup fails, reset the pointer to NULL. +Other functions such as mipi_dbi_poweron_reset_conditional() only do +a NULL pointer check and will otherwise dereference the error pointer. + +Fixes: 5a04227326b04c15 ("drm/panel: Add ilitek ili9341 panel driver") +Signed-off-by: Daniel Mack +Cc: stable@vger.kernel.org +Signed-off-by: Daniel Vetter +Link: https://patchwork.freedesktop.org/patch/msgid/20220317225537.826302-1-daniel@zonque.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c ++++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c +@@ -612,8 +612,10 @@ static int ili9341_dbi_probe(struct spi_ + int ret; + + vcc = devm_regulator_get_optional(dev, "vcc"); +- if (IS_ERR(vcc)) ++ if (IS_ERR(vcc)) { + dev_err(dev, "get optional vcc failed\n"); ++ vcc = NULL; ++ } + + dbidev = devm_drm_dev_alloc(dev, &ili9341_dbi_driver, + struct mipi_dbi_dev, drm); diff --git a/queue-5.17/series b/queue-5.17/series index fc749cb00fb..e29aaff38d0 100644 --- a/queue-5.17/series +++ b/queue-5.17/series @@ -301,3 +301,12 @@ perf-core-inherit-event_caps.patch irqchip-gic-v3-fix-gicr_ctlr.rwp-polling.patch fbdev-fix-unregistering-of-framebuffers-without-device.patch amd-display-set-backlight-only-if-required.patch +drm-panel-ili9341-fix-optional-regulator-handling.patch +drm-amd-display-fix-by-adding-fpu-protection-for-dcn30_internal_validate_bw.patch +drm-amdgpu-display-change-pipe-policy-for-dcn-2.1.patch +drm-amdgpu-smu10-fix-soc-fclk-units-in-auto-mode.patch +drm-amdgpu-vcn-fix-the-register-setting-for-vcn1.patch +drm-nouveau-pmu-add-missing-callbacks-for-tegra-devices.patch +drm-amdkfd-create-file-descriptor-after-client-is-added-to-smi_clients-list.patch +drm-amdgpu-don-t-use-baco-for-reset-in-s3.patch +sunrpc-ensure-we-flush-any-closed-sockets-before-xs_xprt_free.patch diff --git a/queue-5.17/sunrpc-ensure-we-flush-any-closed-sockets-before-xs_xprt_free.patch b/queue-5.17/sunrpc-ensure-we-flush-any-closed-sockets-before-xs_xprt_free.patch new file mode 100644 index 00000000000..be1a7a4f611 --- /dev/null +++ b/queue-5.17/sunrpc-ensure-we-flush-any-closed-sockets-before-xs_xprt_free.patch @@ -0,0 +1,125 @@ +From f00432063db1a0db484e85193eccc6845435b80e Mon Sep 17 00:00:00 2001 +From: Trond Myklebust +Date: Sun, 3 Apr 2022 15:58:11 -0400 +Subject: SUNRPC: Ensure we flush any closed sockets before xs_xprt_free() + +From: Trond Myklebust + +commit f00432063db1a0db484e85193eccc6845435b80e upstream. + +We must ensure that all sockets are closed before we call xprt_free() +and release the reference to the net namespace. The problem is that +calling fput() will defer closing the socket until delayed_fput() gets +called. +Let's fix the situation by allowing rpciod and the transport teardown +code (which runs on the system wq) to call __fput_sync(), and directly +close the socket. + +Reported-by: Felix Fu +Acked-by: Al Viro +Fixes: a73881c96d73 ("SUNRPC: Fix an Oops in udp_poll()") +Cc: stable@vger.kernel.org # 5.1.x: 3be232f11a3c: SUNRPC: Prevent immediate close+reconnect +Cc: stable@vger.kernel.org # 5.1.x: 89f42494f92f: SUNRPC: Don't call connect() more than once on a TCP socket +Cc: stable@vger.kernel.org # 5.1.x +Signed-off-by: Trond Myklebust +Signed-off-by: Greg Kroah-Hartman +--- + fs/file_table.c | 1 + + include/trace/events/sunrpc.h | 1 - + net/sunrpc/xprt.c | 7 +------ + net/sunrpc/xprtsock.c | 16 +++++++++++++--- + 4 files changed, 15 insertions(+), 10 deletions(-) + +diff --git a/fs/file_table.c b/fs/file_table.c +index 7d2e692b66a9..ada8fe814db9 100644 +--- a/fs/file_table.c ++++ b/fs/file_table.c +@@ -412,6 +412,7 @@ void __fput_sync(struct file *file) + } + + EXPORT_SYMBOL(fput); ++EXPORT_SYMBOL(__fput_sync); + + void __init files_init(void) + { +diff --git a/include/trace/events/sunrpc.h b/include/trace/events/sunrpc.h +index ac33892da411..a4848c7bab80 100644 +--- a/include/trace/events/sunrpc.h ++++ b/include/trace/events/sunrpc.h +@@ -1004,7 +1004,6 @@ DEFINE_RPC_XPRT_LIFETIME_EVENT(connect); + DEFINE_RPC_XPRT_LIFETIME_EVENT(disconnect_auto); + DEFINE_RPC_XPRT_LIFETIME_EVENT(disconnect_done); + DEFINE_RPC_XPRT_LIFETIME_EVENT(disconnect_force); +-DEFINE_RPC_XPRT_LIFETIME_EVENT(disconnect_cleanup); + DEFINE_RPC_XPRT_LIFETIME_EVENT(destroy); + + DECLARE_EVENT_CLASS(rpc_xprt_event, +diff --git a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c +index 73344ffb2692..ad62eba540a4 100644 +--- a/net/sunrpc/xprt.c ++++ b/net/sunrpc/xprt.c +@@ -930,12 +930,7 @@ void xprt_connect(struct rpc_task *task) + if (!xprt_lock_write(xprt, task)) + return; + +- if (test_and_clear_bit(XPRT_CLOSE_WAIT, &xprt->state)) { +- trace_xprt_disconnect_cleanup(xprt); +- xprt->ops->close(xprt); +- } +- +- if (!xprt_connected(xprt)) { ++ if (!xprt_connected(xprt) && !test_bit(XPRT_CLOSE_WAIT, &xprt->state)) { + task->tk_rqstp->rq_connect_cookie = xprt->connect_cookie; + rpc_sleep_on_timeout(&xprt->pending, task, NULL, + xprt_request_timeout(task->tk_rqstp)); +diff --git a/net/sunrpc/xprtsock.c b/net/sunrpc/xprtsock.c +index 9b75891b3cc0..c6a13893e308 100644 +--- a/net/sunrpc/xprtsock.c ++++ b/net/sunrpc/xprtsock.c +@@ -879,7 +879,7 @@ static int xs_local_send_request(struct rpc_rqst *req) + + /* Close the stream if the previous transmission was incomplete */ + if (xs_send_request_was_aborted(transport, req)) { +- xs_close(xprt); ++ xprt_force_disconnect(xprt); + return -ENOTCONN; + } + +@@ -915,7 +915,7 @@ static int xs_local_send_request(struct rpc_rqst *req) + -status); + fallthrough; + case -EPIPE: +- xs_close(xprt); ++ xprt_force_disconnect(xprt); + status = -ENOTCONN; + } + +@@ -1185,6 +1185,16 @@ static void xs_reset_transport(struct sock_xprt *transport) + + if (sk == NULL) + return; ++ /* ++ * Make sure we're calling this in a context from which it is safe ++ * to call __fput_sync(). In practice that means rpciod and the ++ * system workqueue. ++ */ ++ if (!(current->flags & PF_WQ_WORKER)) { ++ WARN_ON_ONCE(1); ++ set_bit(XPRT_CLOSE_WAIT, &xprt->state); ++ return; ++ } + + if (atomic_read(&transport->xprt.swapper)) + sk_clear_memalloc(sk); +@@ -1208,7 +1218,7 @@ static void xs_reset_transport(struct sock_xprt *transport) + mutex_unlock(&transport->recv_mutex); + + trace_rpc_socket_close(xprt, sock); +- fput(filp); ++ __fput_sync(filp); + + xprt_disconnect_done(xprt); + } +-- +2.35.1 +