From: Jamin Lin Date: Thu, 15 May 2025 08:09:57 +0000 (+0800) Subject: test/qtest/hace: Support 64-bit source and digest addresses for AST2700 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5ced818e42ddb9516137e68556eb03c16a486758;p=thirdparty%2Fqemu.git test/qtest/hace: Support 64-bit source and digest addresses for AST2700 Added "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI", "HACE_HASH_KEY_BUFF_HI" registers to store upper 32 bits. Updated "write_regs" to handle 64-bit source and digest addresses. Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater Acked-by: Fabiano Rosas Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-26-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c index 1b54870dd4..842bf5630d 100644 --- a/tests/qtest/aspeed-hace-utils.c +++ b/tests/qtest/aspeed-hace-utils.c @@ -157,7 +157,9 @@ static void write_regs(QTestState *s, uint32_t base, uint64_t src, uint32_t length, uint64_t out, uint32_t method) { qtest_writel(s, base + HACE_HASH_SRC, extract64(src, 0, 32)); + qtest_writel(s, base + HACE_HASH_SRC_HI, extract64(src, 32, 32)); qtest_writel(s, base + HACE_HASH_DIGEST, extract64(out, 0, 32)); + qtest_writel(s, base + HACE_HASH_DIGEST_HI, extract64(out, 32, 32)); qtest_writel(s, base + HACE_HASH_DATA_LEN, length); qtest_writel(s, base + HACE_HASH_CMD, HACE_SHA_BE_EN | method); } diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-utils.h index 0382570fa2..d8684d3f83 100644 --- a/tests/qtest/aspeed-hace-utils.h +++ b/tests/qtest/aspeed-hace-utils.h @@ -36,6 +36,9 @@ #define HACE_HASH_KEY_BUFF 0x28 #define HACE_HASH_DATA_LEN 0x2c #define HACE_HASH_CMD 0x30 +#define HACE_HASH_SRC_HI 0x90 +#define HACE_HASH_DIGEST_HI 0x94 +#define HACE_HASH_KEY_BUFF_HI 0x98 /* Scatter-Gather Hash */ #define SG_LIST_LEN_LAST BIT(31)