From: Michael Strauss Date: Wed, 8 Sep 2021 18:39:09 +0000 (-0400) Subject: drm/amd/display: Disable mem low power for CM HW block on DCN3.1 X-Git-Tag: v5.16-rc1~140^2~13^2~15 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5d694266bd14d5a0ac359ef6aef88dbc93efda70;p=thirdparty%2Fkernel%2Flinux.git drm/amd/display: Disable mem low power for CM HW block on DCN3.1 [WHY] Currently causes visible flicker in some scenarios on OLED eDPs Reviewed-by: Haonan Wang Acked-by: Rodrigo Siqueira Signed-off-by: Michael Strauss Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c index a823a64d02a57..0b60ac676423c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c @@ -1013,7 +1013,7 @@ static const struct dc_debug_options debug_defaults_drv = { .i2c = true, .dmcu = false, // This is previously known to cause hang on S3 cycles if enabled .dscl = true, - .cm = true, + .cm = false, // visible flicker on OLED eDPs .mpc = true, .optc = true, .vpg = true,