From: Samson Tam Date: Wed, 15 May 2024 21:32:29 +0000 (-0400) Subject: drm/amd/display: fix YUV video color corruption in DCN401 X-Git-Tag: v6.11-rc1~141^2~25^2~7 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5d74be8c3a941993299c78f7d3d70c27f826af0b;p=thirdparty%2Fkernel%2Flinux.git drm/amd/display: fix YUV video color corruption in DCN401 [Why] Missing check causes sequence error which results in chroma filter coefficients not being updated in certain modes when we display YUV video in fullscreen. This results in color corruption in video [How] Add back chroma_coef_mode check in dscl_set_scl_filter so that filter coefficients are calculated and updated when we have YUV surface Reviewed-by: Alvin Lee Acked-by: Zaeem Mohamed Signed-off-by: Samson Tam Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c index 6cb3fa4b585ce..505929800426d 100644 --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c @@ -297,17 +297,21 @@ static void dpp401_dscl_set_scl_filter( if ((dpp->base.ctx->dc->config.use_spl) && (!dpp->base.ctx->dc->debug.disable_spl)) { filter_h = scl_data->dscl_prog_data.filter_h; filter_v = scl_data->dscl_prog_data.filter_v; - filter_h_c = scl_data->dscl_prog_data.filter_h_c; - filter_v_c = scl_data->dscl_prog_data.filter_v_c; + if (chroma_coef_mode) { + filter_h_c = scl_data->dscl_prog_data.filter_h_c; + filter_v_c = scl_data->dscl_prog_data.filter_v_c; + } } else { filter_h = dpp401_dscl_get_filter_coeffs_64p( scl_data->taps.h_taps, scl_data->ratios.horz); filter_v = dpp401_dscl_get_filter_coeffs_64p( scl_data->taps.v_taps, scl_data->ratios.vert); - filter_h_c = dpp401_dscl_get_filter_coeffs_64p( - scl_data->taps.h_taps_c, scl_data->ratios.horz_c); - filter_v_c = dpp401_dscl_get_filter_coeffs_64p( - scl_data->taps.v_taps_c, scl_data->ratios.vert_c); + if (chroma_coef_mode) { + filter_h_c = dpp401_dscl_get_filter_coeffs_64p( + scl_data->taps.h_taps_c, scl_data->ratios.horz_c); + filter_v_c = dpp401_dscl_get_filter_coeffs_64p( + scl_data->taps.v_taps_c, scl_data->ratios.vert_c); + } } h_2tap_hardcode_coef_en = scl_data->taps.h_taps < 3