From: Carl Love <cel@us.ibm.com>
Date: Mon, 22 Feb 2021 18:11:05 +0000 (-0600)
Subject: PPC64: Fix naming trinary to ternary
X-Git-Tag: VALGRIND_3_17_0~40
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5defeb017f94686aa4c746729ff5eca35aa79fb1;p=thirdparty%2Fvalgrind.git

PPC64: Fix naming trinary to ternary
---

diff --git a/VEX/priv/host_ppc_defs.c b/VEX/priv/host_ppc_defs.c
index 6c298fa18b..843009422e 100644
--- a/VEX/priv/host_ppc_defs.c
+++ b/VEX/priv/host_ppc_defs.c
@@ -1007,13 +1007,13 @@ PPCInstr* PPCInstr_Fp128Binary(PPCFpOp op, HReg dst, HReg srcL, HReg srcR) {
    i->Pin.Fp128Binary.srcR = srcR;
    return i;
 }
-PPCInstr* PPCInstr_Fp128Trinary(PPCFpOp op, HReg dst, HReg srcL, HReg srcR) {
+PPCInstr* PPCInstr_Fp128Ternnary(PPCFpOp op, HReg dst, HReg srcL, HReg srcR) {
    PPCInstr* i = LibVEX_Alloc_inline( sizeof(PPCInstr) );
-   i->tag = Pin_Fp128Trinary;
-   i->Pin.Fp128Trinary.op = op;
-   i->Pin.Fp128Trinary.dst = dst;
-   i->Pin.Fp128Trinary.srcL = srcL;
-   i->Pin.Fp128Trinary.srcR = srcR;
+   i->tag = Pin_Fp128Ternnary;
+   i->Pin.Fp128Ternnary.op = op;
+   i->Pin.Fp128Ternnary.dst = dst;
+   i->Pin.Fp128Ternnary.srcL = srcL;
+   i->Pin.Fp128Ternnary.srcR = srcR;
    return i;
 }
 PPCInstr* PPCInstr_FpMulAcc ( PPCFpOp op, HReg dst, HReg srcML, 
@@ -1831,13 +1831,13 @@ void ppPPCInstr ( const PPCInstr* i, Bool mode64 )
       vex_printf(",");
       ppHRegPPC(i->Pin.Fp128Binary.srcR);
       return;
-   case Pin_Fp128Trinary:
-      vex_printf("%s ", showPPCFpOp(i->Pin.Fp128Trinary.op));
-      ppHRegPPC(i->Pin.Fp128Trinary.dst);
+   case Pin_Fp128Ternnary:
+      vex_printf("%s ", showPPCFpOp(i->Pin.Fp128Ternnary.op));
+      ppHRegPPC(i->Pin.Fp128Ternnary.dst);
       vex_printf(",");
-      ppHRegPPC(i->Pin.Fp128Trinary.srcL);
+      ppHRegPPC(i->Pin.Fp128Ternary.srcL);
       vex_printf(",");
-      ppHRegPPC(i->Pin.Fp128Trinary.srcR);
+      ppHRegPPC(i->Pin.Fp128Ternary.srcR);
       return;
    case Pin_FpMulAcc:
       vex_printf("%s ", showPPCFpOp(i->Pin.FpMulAcc.op));
@@ -2520,10 +2520,10 @@ void getRegUsage_PPCInstr ( HRegUsage* u, const PPCInstr* i, Bool mode64 )
       addHRegUse(u, HRmRead, i->Pin.Fp128Binary.srcL);
       addHRegUse(u, HRmRead, i->Pin.Fp128Binary.srcR);
       return;
-   case Pin_Fp128Trinary:
-      addHRegUse(u, HRmModify, i->Pin.Fp128Trinary.dst);
-      addHRegUse(u, HRmRead, i->Pin.Fp128Trinary.srcL);
-      addHRegUse(u, HRmRead, i->Pin.Fp128Trinary.srcR);
+   case Pin_Fp128Ternary:
+      addHRegUse(u, HRmModify, i->Pin.Fp128Ternary.dst);
+      addHRegUse(u, HRmRead, i->Pin.Fp128Ternary.srcL);
+      addHRegUse(u, HRmRead, i->Pin.Fp128Ternary.srcR);
       return;
    case Pin_FpMulAcc:
       addHRegUse(u, HRmWrite, i->Pin.FpMulAcc.dst);
@@ -2889,10 +2889,10 @@ void mapRegs_PPCInstr ( HRegRemap* m, PPCInstr* i, Bool mode64 )
       mapReg(m, &i->Pin.Fp128Binary.srcL);
       mapReg(m, &i->Pin.Fp128Binary.srcR);
       return;
-   case Pin_Fp128Trinary:
-      mapReg(m, &i->Pin.Fp128Trinary.dst);
-      mapReg(m, &i->Pin.Fp128Trinary.srcL);
-      mapReg(m, &i->Pin.Fp128Trinary.srcR);
+   case Pin_Fp128Ternary:
+      mapReg(m, &i->Pin.Fp128Ternary.dst);
+      mapReg(m, &i->Pin.Fp128Ternary.srcL);
+      mapReg(m, &i->Pin.Fp128Ternary.srcR);
       return;
    case Pin_FpMulAcc:
       mapReg(m, &i->Pin.FpMulAcc.dst);
@@ -4992,7 +4992,7 @@ Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc,
       goto done;
    }
 
-   case Pin_Fp128Trinary: {
+   case Pin_Fp128Ternary: {
       /* Note Fp128 instructions use the vector registers */
       UInt fr_dst  = vregEnc(i->Pin.Fp128Binary.dst);
       UInt fr_srcL = vregEnc(i->Pin.Fp128Binary.srcL);
diff --git a/VEX/priv/host_ppc_defs.h b/VEX/priv/host_ppc_defs.h
index 70c3b6cb96..de21826a21 100644
--- a/VEX/priv/host_ppc_defs.h
+++ b/VEX/priv/host_ppc_defs.h
@@ -526,7 +526,7 @@ typedef
       Pin_FpBinary,   /* FP binary op */
       Pin_Fp128Unary,   /* FP unary op for 128-bit floating point */
       Pin_Fp128Binary,  /* FP binary op for 128-bit floating point */
-      Pin_Fp128Trinary, /* FP trinary op for 128-bit floating point */
+      Pin_Fp128Ternary, /* FP ternary op for 128-bit floating point */
       Pin_FpMulAcc,   /* FP multipy-accumulate style op */
       Pin_FpLdSt,     /* FP load/store */
       Pin_FpSTFIW,    /* stfiwx */
@@ -776,7 +776,7 @@ typedef
             HReg dst;
             HReg srcL;
             HReg srcR;
-         } Fp128Trinary;
+         } Fp128Ternary;
          struct {
             PPCFpOp op;
             HReg    dst;
@@ -1112,7 +1112,7 @@ extern PPCInstr* PPCInstr_MFence     ( void );
 
 extern PPCInstr* PPCInstr_Fp128Unary    ( PPCFpOp op, HReg dst, HReg src );
 extern PPCInstr* PPCInstr_Fp128Binary   ( PPCFpOp op, HReg dst, HReg srcL, HReg srcR );
-extern PPCInstr* PPCInstr_Fp128Trinary  ( PPCFpOp op, HReg dst, HReg srcL,
+extern PPCInstr* PPCInstr_Fp128Ternary  ( PPCFpOp op, HReg dst, HReg srcL,
                                           HReg srcR);
 
 extern PPCInstr* PPCInstr_FpUnary    ( PPCFpOp op, HReg dst, HReg src );
diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c
index 3c76feb2d5..38801a19e6 100644
--- a/VEX/priv/host_ppc_isel.c
+++ b/VEX/priv/host_ppc_isel.c
@@ -5002,7 +5002,7 @@ static HReg iselFp128Expr_wrk( ISelEnv* env, const IRExpr* e,
          HReg r_srcR = iselFp128Expr(env, qop->arg4,
                                      IEndianess);
 
-         addInstr(env, PPCInstr_Fp128Trinary(fpop, r_dst, r_srcL, r_srcR));
+         addInstr(env, PPCInstr_Fp128Ternary(fpop, r_dst, r_srcL, r_srcR));
          return r_dst;
          }