From: Greg Kroah-Hartman Date: Mon, 22 Jul 2013 20:22:52 +0000 (-0700) Subject: 3.0-stable patches X-Git-Tag: v3.10.3~26 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5f558f09851dc610ea903d75a96d9589201a2433;p=thirdparty%2Fkernel%2Fstable-queue.git 3.0-stable patches added patches: asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch rt2x00-read-5ghz-tx-power-values-from-the-correct-offset.patch tick-prevent-uncontrolled-switch-to-oneshot-mode.patch --- diff --git a/queue-3.0/asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch b/queue-3.0/asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch new file mode 100644 index 00000000000..acdd77bb643 --- /dev/null +++ b/queue-3.0/asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch @@ -0,0 +1,32 @@ +From 5c78dfe87ea04b501ee000a7f03b9432ac9d008c Mon Sep 17 00:00:00 2001 +From: Fabio Estevam +Date: Thu, 4 Jul 2013 20:01:03 -0300 +Subject: ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK + +From: Fabio Estevam + +commit 5c78dfe87ea04b501ee000a7f03b9432ac9d008c upstream. + +SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of +register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range. + +Reported-by: Oskar Schirmer +Signed-off-by: Fabio Estevam +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/codecs/sgtl5000.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/soc/codecs/sgtl5000.h ++++ b/sound/soc/codecs/sgtl5000.h +@@ -347,7 +347,7 @@ + #define SGTL5000_PLL_INT_DIV_MASK 0xf800 + #define SGTL5000_PLL_INT_DIV_SHIFT 11 + #define SGTL5000_PLL_INT_DIV_WIDTH 5 +-#define SGTL5000_PLL_FRAC_DIV_MASK 0x0700 ++#define SGTL5000_PLL_FRAC_DIV_MASK 0x07ff + #define SGTL5000_PLL_FRAC_DIV_SHIFT 0 + #define SGTL5000_PLL_FRAC_DIV_WIDTH 11 + diff --git a/queue-3.0/rt2x00-read-5ghz-tx-power-values-from-the-correct-offset.patch b/queue-3.0/rt2x00-read-5ghz-tx-power-values-from-the-correct-offset.patch new file mode 100644 index 00000000000..dd2f6ea4cc1 --- /dev/null +++ b/queue-3.0/rt2x00-read-5ghz-tx-power-values-from-the-correct-offset.patch @@ -0,0 +1,69 @@ +From 0a6f3a8ebaf13407523c2c7d575b4ca2debd23ba Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Sat, 22 Jun 2013 13:13:25 +0200 +Subject: rt2x00: read 5GHz TX power values from the correct offset + +From: Gabor Juhos + +commit 0a6f3a8ebaf13407523c2c7d575b4ca2debd23ba upstream. + +The current code uses the same index value both +for the channel information array and for the TX +power table. The index starts from 14, however the +index of the TX power table must start from zero. + +Fix it, in order to get the correct TX power value +for a given channel. + +The changes in rt61pci.c and rt73usb.c are compile +tested only. + +Signed-off-by: Gabor Juhos +Acked-by: Stanislaw Gruszka +Acked-by: Gertjan van Wingerde +Signed-off-by: John W. Linville +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/rt2x00/rt2800lib.c | 4 ++-- + drivers/net/wireless/rt2x00/rt61pci.c | 3 ++- + drivers/net/wireless/rt2x00/rt73usb.c | 3 ++- + 3 files changed, 6 insertions(+), 4 deletions(-) + +--- a/drivers/net/wireless/rt2x00/rt2800lib.c ++++ b/drivers/net/wireless/rt2x00/rt2800lib.c +@@ -4075,8 +4075,8 @@ int rt2800_probe_hw_mode(struct rt2x00_d + default_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2); + + for (i = 14; i < spec->num_channels; i++) { +- info[i].default_power1 = default_power1[i]; +- info[i].default_power2 = default_power2[i]; ++ info[i].default_power1 = default_power1[i - 14]; ++ info[i].default_power2 = default_power2[i - 14]; + } + } + +--- a/drivers/net/wireless/rt2x00/rt61pci.c ++++ b/drivers/net/wireless/rt2x00/rt61pci.c +@@ -2830,7 +2830,8 @@ static int rt61pci_probe_hw_mode(struct + tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START); + for (i = 14; i < spec->num_channels; i++) { + info[i].max_power = MAX_TXPOWER; +- info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); ++ info[i].default_power1 = ++ TXPOWER_FROM_DEV(tx_power[i - 14]); + } + } + +--- a/drivers/net/wireless/rt2x00/rt73usb.c ++++ b/drivers/net/wireless/rt2x00/rt73usb.c +@@ -2167,7 +2167,8 @@ static int rt73usb_probe_hw_mode(struct + tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START); + for (i = 14; i < spec->num_channels; i++) { + info[i].max_power = MAX_TXPOWER; +- info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); ++ info[i].default_power1 = ++ TXPOWER_FROM_DEV(tx_power[i - 14]); + } + } + diff --git a/queue-3.0/series b/queue-3.0/series new file mode 100644 index 00000000000..9782299cdd4 --- /dev/null +++ b/queue-3.0/series @@ -0,0 +1,3 @@ +tick-prevent-uncontrolled-switch-to-oneshot-mode.patch +asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch +rt2x00-read-5ghz-tx-power-values-from-the-correct-offset.patch diff --git a/queue-3.0/tick-prevent-uncontrolled-switch-to-oneshot-mode.patch b/queue-3.0/tick-prevent-uncontrolled-switch-to-oneshot-mode.patch new file mode 100644 index 00000000000..c0eca40da44 --- /dev/null +++ b/queue-3.0/tick-prevent-uncontrolled-switch-to-oneshot-mode.patch @@ -0,0 +1,84 @@ +From 1f73a9806bdd07a5106409bbcab3884078bd34fe Mon Sep 17 00:00:00 2001 +From: Thomas Gleixner +Date: Mon, 1 Jul 2013 22:14:10 +0200 +Subject: tick: Prevent uncontrolled switch to oneshot mode + +From: Thomas Gleixner + +commit 1f73a9806bdd07a5106409bbcab3884078bd34fe upstream. + +When the system switches from periodic to oneshot mode, the broadcast +logic causes a possibility that a CPU which has not yet switched to +oneshot mode puts its own clock event device into oneshot mode without +updating the state and the timer handler. + +CPU0 CPU1 + per cpu tickdev is in periodic mode + and switched to broadcast + +Switch to oneshot mode + tick_broadcast_switch_to_oneshot() + cpumask_copy(tick_oneshot_broacast_mask, + tick_broadcast_mask); + + broadcast device mode = oneshot + + Timer interrupt + + irq_enter() + tick_check_oneshot_broadcast() + dev->set_mode(ONESHOT); + + tick_handle_periodic() + if (dev->mode == ONESHOT) + dev->next_event += period; + FAIL. + +We fail, because dev->next_event contains KTIME_MAX, if the device was +in periodic mode before the uncontrolled switch to oneshot happened. + +We must copy the broadcast bits over to the oneshot mask, because +otherwise a CPU which relies on the broadcast would not been woken up +anymore after the broadcast device switched to oneshot mode. + +So we need to verify in tick_check_oneshot_broadcast() whether the CPU +has already switched to oneshot mode. If not, leave the device +untouched and let the CPU switch controlled into oneshot mode. + +This is a long standing bug, which was never noticed, because the main +user of the broadcast x86 cannot run into that scenario, AFAICT. The +nonarchitected timer mess of ARM creates a gazillion of differently +broken abominations which trigger the shortcomings of that broadcast +code, which better had never been necessary in the first place. + +Reported-and-tested-by: Stehle Vincent-B46079 +Reviewed-by: Stephen Boyd +Cc: John Stultz , +Cc: Mark Rutland +Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1307012153060.4013@ionos.tec.linutronix.de +Signed-off-by: Thomas Gleixner +Signed-off-by: Greg Kroah-Hartman + +--- + kernel/time/tick-broadcast.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +--- a/kernel/time/tick-broadcast.c ++++ b/kernel/time/tick-broadcast.c +@@ -396,7 +396,15 @@ void tick_check_oneshot_broadcast(int cp + if (cpumask_test_cpu(cpu, to_cpumask(tick_broadcast_oneshot_mask))) { + struct tick_device *td = &per_cpu(tick_cpu_device, cpu); + +- clockevents_set_mode(td->evtdev, CLOCK_EVT_MODE_ONESHOT); ++ /* ++ * We might be in the middle of switching over from ++ * periodic to oneshot. If the CPU has not yet ++ * switched over, leave the device alone. ++ */ ++ if (td->mode == TICKDEV_MODE_ONESHOT) { ++ clockevents_set_mode(td->evtdev, ++ CLOCK_EVT_MODE_ONESHOT); ++ } + } + } +