From: Tal Cohen Date: Wed, 3 Apr 2024 10:09:42 +0000 (+0300) Subject: accel/habanalabs: disable EQ interrupt after disabling pci X-Git-Tag: v6.11-rc1~141^2~14^2~9 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=61f4f624eaaeefcdcbef368b31960b0336e014fb;p=thirdparty%2Fkernel%2Flinux.git accel/habanalabs: disable EQ interrupt after disabling pci When sending disable pci msg towards firmware, there is a possibility that an EQ packet is already pending, disabling EQ interrupt will prevent this from happening. The interrupt will be re-enabled after reset. Signed-off-by: Tal Cohen Reviewed-by: Ofir Bitton Signed-off-by: Ofir Bitton --- diff --git a/drivers/accel/habanalabs/common/device.c b/drivers/accel/habanalabs/common/device.c index 5ca7014def009..78e65c6b76a7d 100644 --- a/drivers/accel/habanalabs/common/device.c +++ b/drivers/accel/habanalabs/common/device.c @@ -1502,10 +1502,11 @@ static void send_disable_pci_access(struct hl_device *hdev, u32 flags) if (hl_fw_send_pci_access_msg(hdev, CPUCP_PACKET_DISABLE_PCI_ACCESS, 0x0)) return; - /* verify that last EQs are handled before disabled is set */ + /* disable_irq also generates sync irq, this verifies that last EQs are handled + * before disabled is set. The IRQ will be enabled again in request_irq call. + */ if (hdev->cpu_queues_enable) - synchronize_irq(pci_irq_vector(hdev->pdev, - hdev->asic_prop.eq_interrupt_id)); + disable_irq(pci_irq_vector(hdev->pdev, hdev->asic_prop.eq_interrupt_id)); } }