From: Radhakrishna Sripada Date: Tue, 30 Oct 2018 08:45:01 +0000 (-0700) Subject: drm/i915/icl: Add WaEnable32PlaneMode X-Git-Tag: v5.0-rc1~185^2~15^2~133 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=622b3f68139e93266447ddb584ad7e057c85627e;p=thirdparty%2Fkernel%2Flinux.git drm/i915/icl: Add WaEnable32PlaneMode Gen11 Display suports 32 planes in total. Enable the new format in context status to be used and expanded to 32 planes. V2: Move the WA to display WA's(Chris) Cc: Chris Wilson Cc: Michel Thierry Cc: James Ausmus Reviewed-by: Anusha Srivatsa Signed-off-by: Radhakrishna Sripada Signed-off-by: Rodrigo Vivi Link: https://patchwork.freedesktop.org/patch/msgid/20181030084504.21537-1-radhakrishna.sripada@intel.com --- diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6c7df179da282..41f3020730624 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2541,6 +2541,7 @@ enum i915_power_well_id { /* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */ #define GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4) #define GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2) +#define GEN11_ENABLE_32_PLANE_MODE (1 << 7) /* WaClearTdlStateAckDirtyBits */ #define GEN8_STATE_ACK _MMIO(0x20F0) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2c3dc10f0255f..9da8ff263d360 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8854,6 +8854,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv) /* This is not an Wa. Enable to reduce Sampler power */ I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN, I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & ~DFR_DISABLE); + + /* WaEnable32PlaneMode:icl */ + I915_WRITE(GEN9_CSFE_CHICKEN1_RCS, + _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE)); } static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)