From: Greg Kroah-Hartman Date: Thu, 19 Apr 2012 16:54:06 +0000 (-0700) Subject: 3.0-stable patches X-Git-Tag: v3.2.16~19 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=629556a7fa4b8b6eb57b71409a15f03418da8339;p=thirdparty%2Fkernel%2Fstable-queue.git 3.0-stable patches added patches: pch_phub-care-funcsel-register-in-pm.patch pch_phub-fix-register-miss-setting-issue.patch pch_phub-improve-ade-address-decode-enable-control.patch --- diff --git a/queue-3.0/pch_phub-care-funcsel-register-in-pm.patch b/queue-3.0/pch_phub-care-funcsel-register-in-pm.patch new file mode 100644 index 00000000000..4ac7d9d8632 --- /dev/null +++ b/queue-3.0/pch_phub-care-funcsel-register-in-pm.patch @@ -0,0 +1,65 @@ +From dd7d7fea29c18b818e94f252a76f495490d399c3 Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Thu, 21 Jul 2011 17:07:08 +0900 +Subject: pch_phub: Care FUNCSEL register in PM + +From: Tomoya MORINAGA + +commit dd7d7fea29c18b818e94f252a76f495490d399c3 upstream. + +Only ML7213/ML7223(Bus-n) has this register. +Currently,this driver doesn't care register "FUNCSEL" in suspend/resume. +This patch saves/restores FUNCSEL register only when the device is ML7213 or +ML7223(Bus-n). + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/misc/pch_phub.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/drivers/misc/pch_phub.c ++++ b/drivers/misc/pch_phub.c +@@ -93,6 +93,7 @@ + #define PCH_PHUB_INTPIN_REG_WPERMIT_REG3 0x002C + #define PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE 0x0040 + #define CLKCFG_REG_OFFSET 0x500 ++#define FUNCSEL_REG_OFFSET 0x508 + + #define PCH_PHUB_OROM_SIZE 15360 + +@@ -111,6 +112,7 @@ + * @intpin_reg_wpermit_reg3: INTPIN_REG_WPERMIT register 3 val + * @int_reduce_control_reg: INT_REDUCE_CONTROL registers val + * @clkcfg_reg: CLK CFG register val ++ * @funcsel_reg: Function select register value + * @pch_phub_base_address: Register base address + * @pch_phub_extrom_base_address: external rom base address + * @pch_mac_start_address: MAC address area start address +@@ -131,6 +133,7 @@ struct pch_phub_reg { + u32 intpin_reg_wpermit_reg3; + u32 int_reduce_control_reg[MAX_NUM_INT_REDUCE_CONTROL_REG]; + u32 clkcfg_reg; ++ u32 funcsel_reg; + void __iomem *pch_phub_base_address; + void __iomem *pch_phub_extrom_base_address; + u32 pch_mac_start_address; +@@ -214,6 +217,8 @@ static void pch_phub_save_reg_conf(struc + __func__, i, chip->int_reduce_control_reg[i]); + } + chip->clkcfg_reg = ioread32(p + CLKCFG_REG_OFFSET); ++ if ((chip->ioh_type == 2) || (chip->ioh_type == 4)) ++ chip->funcsel_reg = ioread32(p + FUNCSEL_REG_OFFSET); + } + + /* pch_phub_restore_reg_conf - restore register configuration */ +@@ -274,6 +279,8 @@ static void pch_phub_restore_reg_conf(st + } + + iowrite32(chip->clkcfg_reg, p + CLKCFG_REG_OFFSET); ++ if ((chip->ioh_type == 2) || (chip->ioh_type == 4)) ++ iowrite32(chip->funcsel_reg, p + FUNCSEL_REG_OFFSET); + } + + /** diff --git a/queue-3.0/pch_phub-fix-register-miss-setting-issue.patch b/queue-3.0/pch_phub-fix-register-miss-setting-issue.patch new file mode 100644 index 00000000000..b7d617b336c --- /dev/null +++ b/queue-3.0/pch_phub-fix-register-miss-setting-issue.patch @@ -0,0 +1,41 @@ +From 20ae6d0b307963416db0e8433602e5d5c95e942b Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Fri, 17 Jun 2011 10:13:26 +0900 +Subject: pch_phub: Fix register miss-setting issue + +From: Tomoya MORINAGA + +commit 20ae6d0b307963416db0e8433602e5d5c95e942b upstream. + +Register "interrupt delay value" is for GbE which is connected to Bus-m of PCIe. +However currently, the value is set for Bus-n. +As a result, the value is not set correctly. +This patch moves setting the value processing of Bus-n to Bus-m. + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/misc/pch_phub.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/misc/pch_phub.c ++++ b/drivers/misc/pch_phub.c +@@ -735,6 +735,8 @@ static int __devinit pch_phub_probe(stru + * Device8(GbE) + */ + iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14); ++ /* set the interrupt delay value */ ++ iowrite32(0x25, chip->pch_phub_base_address + 0x140); + chip->pch_opt_rom_start_address =\ + PCH_PHUB_ROM_START_ADDR_ML7223; + chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223; +@@ -752,8 +754,6 @@ static int __devinit pch_phub_probe(stru + * Device6(SATA 2):f + */ + iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14); +- /* set the interrupt delay value */ +- iowrite32(0x25, chip->pch_phub_base_address + 0x140); + chip->pch_opt_rom_start_address =\ + PCH_PHUB_ROM_START_ADDR_ML7223; + chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223; diff --git a/queue-3.0/pch_phub-improve-ade-address-decode-enable-control.patch b/queue-3.0/pch_phub-improve-ade-address-decode-enable-control.patch new file mode 100644 index 00000000000..5bb21b55e99 --- /dev/null +++ b/queue-3.0/pch_phub-improve-ade-address-decode-enable-control.patch @@ -0,0 +1,196 @@ +From 9914a0de7a27ef2cb5d9aacfe50ae97ebb532f28 Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Fri, 11 Nov 2011 10:12:17 +0900 +Subject: pch_phub: Improve ADE(Address Decode Enable) control + +From: Tomoya MORINAGA + +commit 9914a0de7a27ef2cb5d9aacfe50ae97ebb532f28 upstream. + +Currently, external ROM access is enabled/disabled in probe()/remove(). +So, when a buggy software access unanticipated memory area, +in case of enabling this ADE bit, +external ROM memory area can be broken. + +This patch enables the ADE bit only accessing external ROM area. + +Signed-off-by: Tomoya MORINAGA +Cc: Masayuki Ohtak +Cc: Alexander Stein +Cc: Denis Turischev +Signed-off-by: Andrew Morton +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/misc/pch_phub.c | 51 ++++++++++++++++++++++++++++++++---------------- + 1 file changed, 34 insertions(+), 17 deletions(-) + +--- a/drivers/misc/pch_phub.c ++++ b/drivers/misc/pch_phub.c +@@ -118,6 +118,7 @@ + * @pch_mac_start_address: MAC address area start address + * @pch_opt_rom_start_address: Option ROM start address + * @ioh_type: Save IOH type ++ * @pdev: pointer to pci device struct + */ + struct pch_phub_reg { + u32 phub_id_reg; +@@ -139,6 +140,7 @@ struct pch_phub_reg { + u32 pch_mac_start_address; + u32 pch_opt_rom_start_address; + int ioh_type; ++ struct pci_dev *pdev; + }; + + /* SROM SPEC for MAC address assignment offset */ +@@ -501,6 +503,7 @@ static ssize_t pch_phub_bin_read(struct + unsigned int orom_size; + int ret; + int err; ++ ssize_t rom_size; + + struct pch_phub_reg *chip = + dev_get_drvdata(container_of(kobj, struct device, kobj)); +@@ -512,6 +515,10 @@ static ssize_t pch_phub_bin_read(struct + } + + /* Get Rom signature */ ++ chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); ++ if (!chip->pch_phub_extrom_base_address) ++ goto exrom_map_err; ++ + pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address, + (unsigned char *)&rom_signature); + rom_signature &= 0xff; +@@ -542,10 +549,13 @@ static ssize_t pch_phub_bin_read(struct + goto return_err; + } + return_ok: ++ pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); + mutex_unlock(&pch_phub_mutex); + return addr_offset; + + return_err: ++ pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); ++exrom_map_err: + mutex_unlock(&pch_phub_mutex); + return_err_nomutex: + return err; +@@ -558,6 +568,7 @@ static ssize_t pch_phub_bin_write(struct + int err; + unsigned int addr_offset; + int ret; ++ ssize_t rom_size; + struct pch_phub_reg *chip = + dev_get_drvdata(container_of(kobj, struct device, kobj)); + +@@ -574,6 +585,12 @@ static ssize_t pch_phub_bin_write(struct + goto return_ok; + } + ++ chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); ++ if (!chip->pch_phub_extrom_base_address) { ++ err = -ENOMEM; ++ goto exrom_map_err; ++ } ++ + for (addr_offset = 0; addr_offset < count; addr_offset++) { + if (PCH_PHUB_OROM_SIZE < off + addr_offset) + goto return_ok; +@@ -588,10 +605,14 @@ static ssize_t pch_phub_bin_write(struct + } + + return_ok: ++ pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); + mutex_unlock(&pch_phub_mutex); + return addr_offset; + + return_err: ++ pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); ++ ++exrom_map_err: + mutex_unlock(&pch_phub_mutex); + return err; + } +@@ -601,8 +622,14 @@ static ssize_t show_pch_mac(struct devic + { + u8 mac[8]; + struct pch_phub_reg *chip = dev_get_drvdata(dev); ++ ssize_t rom_size; ++ ++ chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); ++ if (!chip->pch_phub_extrom_base_address) ++ return -ENOMEM; + + pch_phub_read_gbe_mac_addr(chip, mac); ++ pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); + + return sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); +@@ -612,6 +639,7 @@ static ssize_t store_pch_mac(struct devi + const char *buf, size_t count) + { + u8 mac[6]; ++ ssize_t rom_size; + struct pch_phub_reg *chip = dev_get_drvdata(dev); + + if (count != 18) +@@ -621,7 +649,12 @@ static ssize_t store_pch_mac(struct devi + (u32 *)&mac[0], (u32 *)&mac[1], (u32 *)&mac[2], (u32 *)&mac[3], + (u32 *)&mac[4], (u32 *)&mac[5]); + ++ chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); ++ if (!chip->pch_phub_extrom_base_address) ++ return -ENOMEM; ++ + pch_phub_write_gbe_mac_addr(chip, mac); ++ pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); + + return count; + } +@@ -644,7 +677,6 @@ static int __devinit pch_phub_probe(stru + int retval; + + int ret; +- ssize_t rom_size; + struct pch_phub_reg *chip; + + chip = kzalloc(sizeof(struct pch_phub_reg), GFP_KERNEL); +@@ -681,19 +713,7 @@ static int __devinit pch_phub_probe(stru + "in pch_phub_base_address variable is %p\n", __func__, + chip->pch_phub_base_address); + +- if (id->driver_data != 3) { +- chip->pch_phub_extrom_base_address =\ +- pci_map_rom(pdev, &rom_size); +- if (chip->pch_phub_extrom_base_address == 0) { +- dev_err(&pdev->dev, "%s: pci_map_rom FAILED", __func__); +- ret = -ENOMEM; +- goto err_pci_map; +- } +- dev_dbg(&pdev->dev, "%s : " +- "pci_map_rom SUCCESS and value in " +- "pch_phub_extrom_base_address variable is %p\n", +- __func__, chip->pch_phub_extrom_base_address); +- } ++ chip->pdev = pdev; /* Save pci device struct */ + + if (id->driver_data == 1) { /* EG20T PCH */ + retval = sysfs_create_file(&pdev->dev.kobj, +@@ -790,8 +810,6 @@ exit_bin_attr: + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr); + + err_sysfs_create: +- pci_unmap_rom(pdev, chip->pch_phub_extrom_base_address); +-err_pci_map: + pci_iounmap(pdev, chip->pch_phub_base_address); + err_pci_iomap: + pci_release_regions(pdev); +@@ -809,7 +827,6 @@ static void __devexit pch_phub_remove(st + + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr); + sysfs_remove_bin_file(&pdev->dev.kobj, &pch_bin_attr); +- pci_unmap_rom(pdev, chip->pch_phub_extrom_base_address); + pci_iounmap(pdev, chip->pch_phub_base_address); + pci_release_regions(pdev); + pci_disable_device(pdev); diff --git a/queue-3.0/series b/queue-3.0/series index f2a6b03e880..44c59c88420 100644 --- a/queue-3.0/series +++ b/queue-3.0/series @@ -32,3 +32,6 @@ fcaps-clear-the-same-personality-flags-as-suid-when-fcaps-are-used.patch ath9k-fix-max-noise-floor-threshold.patch xhci-fix-register-save-restore-order.patch bluetooth-hci_core-fix-null-pointer-dereference-at.patch +pch_phub-fix-register-miss-setting-issue.patch +pch_phub-care-funcsel-register-in-pm.patch +pch_phub-improve-ade-address-decode-enable-control.patch