From: Simon Cook <simon.cook@embecosm.com>
Date: Wed, 25 May 2022 13:25:43 +0000 (+0100)
Subject: RISC-V: Don't unconditionally add m,a,f,d in arch-canonicalize
X-Git-Tag: basepoints/gcc-14~6446
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=63f198553d3940495bfaa49da30b2ce93375c916;p=thirdparty%2Fgcc.git

RISC-V: Don't unconditionally add m,a,f,d in arch-canonicalize

This solves an issue where rv32i, etc. are canonicalized to rv32imafd
since the g->i addition of 'm', 'a', 'f', 'd' is not actually gated by
whether the input was rv32g/rv64g.

gcc/ChangeLog:

	* config/riscv/arch-canonicalize: Only add mafd extension if
	base was rv32/rv64g.
---

diff --git a/gcc/config/riscv/arch-canonicalize b/gcc/config/riscv/arch-canonicalize
index 71b2232b29e..fd7651ac491 100755
--- a/gcc/config/riscv/arch-canonicalize
+++ b/gcc/config/riscv/arch-canonicalize
@@ -73,8 +73,8 @@ def arch_canonicalize(arch, isa_spec):
   std_exts = []
   if arch[:5] in ['rv32e', 'rv32i', 'rv32g', 'rv64i', 'rv64g']:
     new_arch = arch[:5].replace("g", "i")
-    std_exts = ['m', 'a', 'f', 'd']
     if arch[:5] in ['rv32g', 'rv64g']:
+      std_exts = ['m', 'a', 'f', 'd']
       if not is_isa_spec_2p2:
         extra_long_ext = ['zicsr', 'zifencei']
   else: