From: Kito Cheng <kito.cheng@sifive.com>
Date: Wed, 10 Sep 2025 10:23:12 +0000 (+0800)
Subject: RISC-V: Fix vendor intrinsic tests for disabled multilib configurations
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6485b105655c2179eb9f74ac35d535912f43cac5;p=thirdparty%2Fgcc.git

RISC-V: Fix vendor intrinsic tests for disabled multilib configurations

Add wrapper headers that prevent vendor vector headers from including
system stdint.h, ensuring tests work correctly when multilib is disabled.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/andes_vector.h: New file.
	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c
	(#include): Use local andes_vector.h instead of system header.
	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c
	(#include): Likewise.
	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/andes_vector.h: New file.
	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c
	(#include): Use local andes_vector.h instead of system header.
	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c
	(#include): Likewise.
	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/andes_vector.h: New file.
	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c
	(#include): Use local andes_vector.h instead of system header.
	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c
	(#include): Likewise.
	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/andes_vector.h: New file.
	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c
	(#include): Use local andes_vector.h instead of system header.
	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c
	(#include): Likewise.
	* gcc.target/riscv/rvv/xsfvector/sifive_vector.h: New file.
	* gcc.target/riscv/rvv/xtheadvector/riscv_th_vector.h: New file.
	* gcc.target/riscv/rvv/xtheadvector/riscv_vector.h: New file.
---

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/andes_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/andes_vector.h
new file mode 100644
index 00000000000..0d0a8efef6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/andes_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of andes_vector.h, prevent andes_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _ANDES_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <andes_vector.h>
+#define _ANDES_VECTOR_WRAP_H
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c
index 8b03564d4ff..5f15d7f235c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4(vfloat32mf2_t vs2, size_t vl) {
     return __riscv_nds_vfncvt_bf16_s_bf16mf4(vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c
index b5aba62150b..63b52978aa3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2(vbfloat16mf4_t vs2, size_t vl) {
     return __riscv_nds_vfwcvt_s_bf16_f32mf2(vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/andes_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/andes_vector.h
new file mode 100644
index 00000000000..0d0a8efef6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/andes_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of andes_vector.h, prevent andes_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _ANDES_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <andes_vector.h>
+#define _ANDES_VECTOR_WRAP_H
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c
index 0409d6f5049..5a6702809a2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4(vfloat32mf2_t vs2, size_t vl) {
     return __riscv_nds_vfncvt_bf16(vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c
index eefe6e257cd..aca15295ec5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2(vbfloat16mf4_t vs2, size_t vl) {
     return __riscv_nds_vfwcvt_s(vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/andes_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/andes_vector.h
new file mode 100644
index 00000000000..289664c9c25
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/andes_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of riscv_vector.h, prevent riscv_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _ANDES_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <andes_vector.h>
+#define _ANDES_VECTOR_WRAP_H
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c
index 35061eaf935..65a9260a3b9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_tu(vbfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl) {
     return __riscv_nds_vfncvt_bf16_s_bf16mf4_tu(vd, vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c
index 142b1b47ea8..b424d276e34 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2_tu(vfloat32mf2_t vd, vbfloat16mf4_t vs2, size_t vl) {
     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/andes_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/andes_vector.h
new file mode 100644
index 00000000000..289664c9c25
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/andes_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of riscv_vector.h, prevent riscv_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _ANDES_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <andes_vector.h>
+#define _ANDES_VECTOR_WRAP_H
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c
index bce60f19926..7343c6343d1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_tu(vbfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl) {
     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c
index 142b1b47ea8..b424d276e34 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
 /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
 
-#include <andes_vector.h>
+#include "andes_vector.h"
 
 vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2_tu(vfloat32mf2_t vd, vbfloat16mf4_t vs2, size_t vl) {
     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sifive_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sifive_vector.h
new file mode 100644
index 00000000000..b94b24a6bd0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sifive_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of sifive_vector.h, prevent sifive_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _SIFIVE_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <riscv_vector.h>
+#define _SIFIVE_VECTOR_WRAP_H
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_th_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_th_vector.h
new file mode 100644
index 00000000000..d824c6185e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_th_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of riscv_th_vector.h, prevent riscv_th_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _RISCV_TH_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <riscv_th_vector.h>
+#define _RISCV_TH_VECTOR_WRAP_H
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_vector.h b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_vector.h
new file mode 100644
index 00000000000..fbb4858fc86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_vector.h
@@ -0,0 +1,11 @@
+/* Wrapper of riscv_vector.h, prevent riscv_vector.h including stdint.h from
+   C library, that might cause problem on testing RV32 related testcase when
+   we disable multilib.  */
+#ifndef _RISCV_VECTOR_WRAP_H
+
+#define _GCC_WRAP_STDINT_H
+#include "stdint-gcc.h"
+#include_next <riscv_vector.h>
+#define _RISCV_VECTOR_WRAP_H
+
+#endif