From: Sasha Levin Date: Fri, 12 May 2023 06:32:35 +0000 (-0400) Subject: Fixes for 6.1 X-Git-Tag: v4.14.315~107 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6544556bc7c1e40ba0e80cb0c5a656cc43ba6c93;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 6.1 Signed-off-by: Sasha Levin --- diff --git a/queue-6.1/af_packet-don-t-send-zero-byte-data-in-packet_sendms.patch b/queue-6.1/af_packet-don-t-send-zero-byte-data-in-packet_sendms.patch new file mode 100644 index 00000000000..44ae381b3bd --- /dev/null +++ b/queue-6.1/af_packet-don-t-send-zero-byte-data-in-packet_sendms.patch @@ -0,0 +1,111 @@ +From 4160f67eda721799608097817f90f418d258ef72 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 May 2023 13:28:57 -0700 +Subject: af_packet: Don't send zero-byte data in packet_sendmsg_spkt(). + +From: Kuniyuki Iwashima + +[ Upstream commit 6a341729fb31b4c5df9f74f24b4b1c98410c9b87 ] + +syzkaller reported a warning below [0]. + +We can reproduce it by sending 0-byte data from the (AF_PACKET, +SOCK_PACKET) socket via some devices whose dev->hard_header_len +is 0. + + struct sockaddr_pkt addr = { + .spkt_family = AF_PACKET, + .spkt_device = "tun0", + }; + int fd; + + fd = socket(AF_PACKET, SOCK_PACKET, 0); + sendto(fd, NULL, 0, 0, (struct sockaddr *)&addr, sizeof(addr)); + +We have a similar fix for the (AF_PACKET, SOCK_RAW) socket as +commit dc633700f00f ("net/af_packet: check len when min_header_len +equals to 0"). + +Let's add the same test for the SOCK_PACKET socket. + +[0]: +skb_assert_len +WARNING: CPU: 1 PID: 19945 at include/linux/skbuff.h:2552 skb_assert_len include/linux/skbuff.h:2552 [inline] +WARNING: CPU: 1 PID: 19945 at include/linux/skbuff.h:2552 __dev_queue_xmit+0x1f26/0x31d0 net/core/dev.c:4159 +Modules linked in: +CPU: 1 PID: 19945 Comm: syz-executor.0 Not tainted 6.3.0-rc7-02330-gca6270c12e20 #1 +Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org 04/01/2014 +RIP: 0010:skb_assert_len include/linux/skbuff.h:2552 [inline] +RIP: 0010:__dev_queue_xmit+0x1f26/0x31d0 net/core/dev.c:4159 +Code: 89 de e8 1d a2 85 fd 84 db 75 21 e8 64 a9 85 fd 48 c7 c6 80 2a 1f 86 48 c7 c7 c0 06 1f 86 c6 05 23 cf 27 04 01 e8 fa ee 56 fd <0f> 0b e8 43 a9 85 fd 0f b6 1d 0f cf 27 04 31 ff 89 de e8 e3 a1 85 +RSP: 0018:ffff8880217af6e0 EFLAGS: 00010282 +RAX: 0000000000000000 RBX: 0000000000000000 RCX: ffffc90001133000 +RDX: 0000000000040000 RSI: ffffffff81186922 RDI: 0000000000000001 +RBP: ffff8880217af8b0 R08: 0000000000000001 R09: 0000000000000000 +R10: 0000000000000001 R11: 0000000000000001 R12: ffff888030045640 +R13: ffff8880300456b0 R14: ffff888030045650 R15: ffff888030045718 +FS: 00007fc5864da640(0000) GS:ffff88806cd00000(0000) knlGS:0000000000000000 +CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +CR2: 0000000020005740 CR3: 000000003f856003 CR4: 0000000000770ee0 +DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 +DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 +PKRU: 55555554 +Call Trace: + + dev_queue_xmit include/linux/netdevice.h:3085 [inline] + packet_sendmsg_spkt+0xc4b/0x1230 net/packet/af_packet.c:2066 + sock_sendmsg_nosec net/socket.c:724 [inline] + sock_sendmsg+0x1b4/0x200 net/socket.c:747 + ____sys_sendmsg+0x331/0x970 net/socket.c:2503 + ___sys_sendmsg+0x11d/0x1c0 net/socket.c:2557 + __sys_sendmmsg+0x18c/0x430 net/socket.c:2643 + __do_sys_sendmmsg net/socket.c:2672 [inline] + __se_sys_sendmmsg net/socket.c:2669 [inline] + __x64_sys_sendmmsg+0x9c/0x100 net/socket.c:2669 + do_syscall_x64 arch/x86/entry/common.c:50 [inline] + do_syscall_64+0x3c/0x90 arch/x86/entry/common.c:80 + entry_SYSCALL_64_after_hwframe+0x72/0xdc +RIP: 0033:0x7fc58791de5d +Code: ff c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 73 9f 1b 00 f7 d8 64 89 01 48 +RSP: 002b:00007fc5864d9cc8 EFLAGS: 00000246 ORIG_RAX: 0000000000000133 +RAX: ffffffffffffffda RBX: 00000000004bbf80 RCX: 00007fc58791de5d +RDX: 0000000000000001 RSI: 0000000020005740 RDI: 0000000000000004 +RBP: 00000000004bbf80 R08: 0000000000000000 R09: 0000000000000000 +R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000 +R13: 000000000000000b R14: 00007fc58797e530 R15: 0000000000000000 + +---[ end trace 0000000000000000 ]--- +skb len=0 headroom=16 headlen=0 tailroom=304 +mac=(16,0) net=(16,-1) trans=-1 +shinfo(txflags=0 nr_frags=0 gso(size=0 type=0 segs=0)) +csum(0x0 ip_summed=0 complete_sw=0 valid=0 level=0) +hash(0x0 sw=0 l4=0) proto=0x0000 pkttype=0 iif=0 +dev name=sit0 feat=0x00000006401d7869 +sk family=17 type=10 proto=0 + +Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") +Reported-by: syzbot +Signed-off-by: Kuniyuki Iwashima +Reviewed-by: Willem de Bruijn +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/packet/af_packet.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c +index ac9335d76fb73..2af2ab924d64a 100644 +--- a/net/packet/af_packet.c ++++ b/net/packet/af_packet.c +@@ -2035,7 +2035,7 @@ static int packet_sendmsg_spkt(struct socket *sock, struct msghdr *msg, + goto retry; + } + +- if (!dev_validate_header(dev, skb->data, len)) { ++ if (!dev_validate_header(dev, skb->data, len) || !skb->len) { + err = -EINVAL; + goto out_unlock; + } +-- +2.39.2 + diff --git a/queue-6.1/alsa-caiaq-input-add-error-handling-for-unsupported-.patch b/queue-6.1/alsa-caiaq-input-add-error-handling-for-unsupported-.patch new file mode 100644 index 00000000000..3122daa68df --- /dev/null +++ b/queue-6.1/alsa-caiaq-input-add-error-handling-for-unsupported-.patch @@ -0,0 +1,44 @@ +From b6ac5ef96d11efef88850650ba1db84bc91cbf53 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 May 2023 14:50:53 +0800 +Subject: ALSA: caiaq: input: Add error handling for unsupported input methods + in `snd_usb_caiaq_input_init` + +From: Ruliang Lin + +[ Upstream commit 0d727e1856ef22dd9337199430258cb64cbbc658 ] + +Smatch complains that: +snd_usb_caiaq_input_init() warn: missing error code 'ret' + +This patch adds a new case to handle the situation where the +device does not support any input methods in the +`snd_usb_caiaq_input_init` function. It returns an `-EINVAL` error code +to indicate that no input methods are supported on the device. + +Fixes: 523f1dce3743 ("[ALSA] Add Native Instrument usb audio device support") +Signed-off-by: Ruliang Lin +Reviewed-by: Dongliang Mu +Acked-by: Daniel Mack +Link: https://lore.kernel.org/r/20230504065054.3309-1-u202112092@hust.edu.cn +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + sound/usb/caiaq/input.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/usb/caiaq/input.c b/sound/usb/caiaq/input.c +index 1e2cf2f08eecd..84f26dce7f5d0 100644 +--- a/sound/usb/caiaq/input.c ++++ b/sound/usb/caiaq/input.c +@@ -804,6 +804,7 @@ int snd_usb_caiaq_input_init(struct snd_usb_caiaqdev *cdev) + + default: + /* no input methods supported on this device */ ++ ret = -EINVAL; + goto exit_free_idev; + } + +-- +2.39.2 + diff --git a/queue-6.1/asoc-intel-soc-acpi-byt-fix-wm510205-match-no-longer.patch b/queue-6.1/asoc-intel-soc-acpi-byt-fix-wm510205-match-no-longer.patch new file mode 100644 index 00000000000..faef2aff2dc --- /dev/null +++ b/queue-6.1/asoc-intel-soc-acpi-byt-fix-wm510205-match-no-longer.patch @@ -0,0 +1,42 @@ +From b42d8a13d329a198443dd1c6886b393a2a0a4f3e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Apr 2023 20:37:14 +0200 +Subject: ASoC: Intel: soc-acpi-byt: Fix "WM510205" match no longer working + +From: Hans de Goede + +[ Upstream commit c963e2ec095cb3f855890be53f56f5a6c6fbe371 ] + +Commit 7e1d728a94ca ("ASoC: Intel: soc-acpi-byt: Add new WM5102 ACPI HID") +added an extra HID to wm5102_comp_ids.codecs, but it forgot to bump +wm5102_comp_ids.num_codecs, causing the last codec HID in the codecs list +to no longer work. + +Bump wm5102_comp_ids.num_codecs to fix this. + +Fixes: 7e1d728a94ca ("ASoC: Intel: soc-acpi-byt: Add new WM5102 ACPI HID") +Signed-off-by: Hans de Goede +Acked-by: Pierre-Louis Bossart +Link: https://lore.kernel.org/r/20230421183714.35186-1-hdegoede@redhat.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/intel/common/soc-acpi-intel-byt-match.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/intel/common/soc-acpi-intel-byt-match.c b/sound/soc/intel/common/soc-acpi-intel-byt-match.c +index db5a92b9875a8..87c44f284971a 100644 +--- a/sound/soc/intel/common/soc-acpi-intel-byt-match.c ++++ b/sound/soc/intel/common/soc-acpi-intel-byt-match.c +@@ -124,7 +124,7 @@ static const struct snd_soc_acpi_codecs rt5640_comp_ids = { + }; + + static const struct snd_soc_acpi_codecs wm5102_comp_ids = { +- .num_codecs = 2, ++ .num_codecs = 3, + .codecs = { "10WM5102", "WM510204", "WM510205"}, + }; + +-- +2.39.2 + diff --git a/queue-6.1/block-skip-destroyed-blkg-when-restart-in-blkg_destr.patch b/queue-6.1/block-skip-destroyed-blkg-when-restart-in-blkg_destr.patch new file mode 100644 index 00000000000..58cbad186ea --- /dev/null +++ b/queue-6.1/block-skip-destroyed-blkg-when-restart-in-blkg_destr.patch @@ -0,0 +1,48 @@ +From 6325f0adbe5fbccb37c63713b17a011e898f5bd0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 12:51:49 +0800 +Subject: block: Skip destroyed blkg when restart in blkg_destroy_all() + +From: Tao Su + +[ Upstream commit 8176080d59e6d4ff9fc97ae534063073b4f7a715 ] + +Kernel hang in blkg_destroy_all() when total blkg greater than +BLKG_DESTROY_BATCH_SIZE, because of not removing destroyed blkg in +blkg_list. So the size of blkg_list is same after destroying a +batch of blkg, and the infinite 'restart' occurs. + +Since blkg should stay on the queue list until blkg_free_workfn(), +skip destroyed blkg when restart a new round, which will solve this +kernel hang issue and satisfy the previous will to restart. + +Reported-by: Xiangfei Ma +Tested-by: Xiangfei Ma +Tested-by: Farrah Chen +Signed-off-by: Tao Su +Fixes: f1c006f1c685 ("blk-cgroup: synchronize pd_free_fn() from blkg_free_workfn() and blkcg_deactivate_policy()") +Suggested-and-reviewed-by: Yu Kuai +Link: https://lore.kernel.org/r/20230428045149.1310073-1-tao1.su@linux.intel.com +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + block/blk-cgroup.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c +index 7c91d9195da8d..60f366f98fa2b 100644 +--- a/block/blk-cgroup.c ++++ b/block/blk-cgroup.c +@@ -468,6 +468,9 @@ static void blkg_destroy_all(struct gendisk *disk) + list_for_each_entry_safe(blkg, n, &q->blkg_list, q_node) { + struct blkcg *blkcg = blkg->blkcg; + ++ if (hlist_unhashed(&blkg->blkcg_node)) ++ continue; ++ + spin_lock(&blkcg->lock); + blkg_destroy(blkg); + spin_unlock(&blkcg->lock); +-- +2.39.2 + diff --git a/queue-6.1/crypto-api-add-scaffolding-to-change-completion-func.patch b/queue-6.1/crypto-api-add-scaffolding-to-change-completion-func.patch new file mode 100644 index 00000000000..f691e2deea4 --- /dev/null +++ b/queue-6.1/crypto-api-add-scaffolding-to-change-completion-func.patch @@ -0,0 +1,79 @@ +From 62fc672db300770592243b581e443f89ec26bf9b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 31 Jan 2023 16:01:45 +0800 +Subject: crypto: api - Add scaffolding to change completion function signature + +From: Herbert Xu + +[ Upstream commit c35e03eaece71101ff6cbf776b86403860ac8cc3 ] + +The crypto completion function currently takes a pointer to a +struct crypto_async_request object. However, in reality the API +does not allow the use of any part of the object apart from the +data field. For example, ahash/shash will create a fake object +on the stack to pass along a different data field. + +This leads to potential bugs where the user may try to dereference +or otherwise use the crypto_async_request object. + +This patch adds some temporary scaffolding so that the completion +function can take a void * instead. Once affected users have been +converted this can be removed. + +The helper crypto_request_complete will remain even after the +conversion is complete. It should be used instead of calling +the completion function directly. + +Signed-off-by: Herbert Xu +Reviewed-by: Giovanni Cabiddu +Signed-off-by: Herbert Xu +Stable-dep-of: 4140aafcff16 ("crypto: engine - fix crypto_queue backlog handling") +Signed-off-by: Sasha Levin +--- + include/crypto/algapi.h | 7 +++++++ + include/linux/crypto.h | 6 ++++++ + 2 files changed, 13 insertions(+) + +diff --git a/include/crypto/algapi.h b/include/crypto/algapi.h +index f50c5d1725da5..224b860647083 100644 +--- a/include/crypto/algapi.h ++++ b/include/crypto/algapi.h +@@ -265,4 +265,11 @@ enum { + CRYPTO_MSG_ALG_LOADED, + }; + ++static inline void crypto_request_complete(struct crypto_async_request *req, ++ int err) ++{ ++ crypto_completion_t complete = req->complete; ++ complete(req, err); ++} ++ + #endif /* _CRYPTO_ALGAPI_H */ +diff --git a/include/linux/crypto.h b/include/linux/crypto.h +index 2324ab6f1846b..e3c4be29aaccb 100644 +--- a/include/linux/crypto.h ++++ b/include/linux/crypto.h +@@ -176,6 +176,7 @@ struct crypto_async_request; + struct crypto_tfm; + struct crypto_type; + ++typedef struct crypto_async_request crypto_completion_data_t; + typedef void (*crypto_completion_t)(struct crypto_async_request *req, int err); + + /** +@@ -595,6 +596,11 @@ struct crypto_wait { + /* + * Async ops completion helper functioons + */ ++static inline void *crypto_get_completion_data(crypto_completion_data_t *req) ++{ ++ return req->data; ++} ++ + void crypto_req_done(struct crypto_async_request *req, int err); + + static inline int crypto_wait_req(int err, struct crypto_wait *wait) +-- +2.39.2 + diff --git a/queue-6.1/crypto-engine-fix-crypto_queue-backlog-handling.patch b/queue-6.1/crypto-engine-fix-crypto_queue-backlog-handling.patch new file mode 100644 index 00000000000..f9ab35beafe --- /dev/null +++ b/queue-6.1/crypto-engine-fix-crypto_queue-backlog-handling.patch @@ -0,0 +1,87 @@ +From 64a5ea692ba7538e7de37a645d5b577bca1e5d4b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Apr 2023 11:00:35 -0400 +Subject: crypto: engine - fix crypto_queue backlog handling + +From: Olivier Bacon + +[ Upstream commit 4140aafcff167b5b9e8dae6a1709a6de7cac6f74 ] + +CRYPTO_TFM_REQ_MAY_BACKLOG tells the crypto driver that it should +internally backlog requests until the crypto hw's queue becomes +full. At that point, crypto_engine backlogs the request and returns +-EBUSY. Calling driver such as dm-crypt then waits until the +complete() function is called with a status of -EINPROGRESS before +sending a new request. + +The problem lies in the call to complete() with a value of -EINPROGRESS +that is made when a backlog item is present on the queue. The call is +done before the successful execution of the crypto request. In the case +that do_one_request() returns < 0 and the retry support is available, +the request is put back in the queue. This leads upper drivers to send +a new request even if the queue is still full. + +The problem can be reproduced by doing a large dd into a crypto +dm-crypt device. This is pretty easy to see when using +Freescale CAAM crypto driver and SWIOTLB dma. Since the actual amount +of requests that can be hold in the queue is unlimited we get IOs error +and dma allocation. + +The fix is to call complete with a value of -EINPROGRESS only if +the request is not enqueued back in crypto_queue. This is done +by calling complete() later in the code. In order to delay the decision, +crypto_queue is modified to correctly set the backlog pointer +when a request is enqueued back. + +Fixes: 6a89f492f8e5 ("crypto: engine - support for parallel requests based on retry mechanism") +Co-developed-by: Sylvain Ouellet +Signed-off-by: Sylvain Ouellet +Signed-off-by: Olivier Bacon +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + crypto/algapi.c | 3 +++ + crypto/crypto_engine.c | 6 +++--- + 2 files changed, 6 insertions(+), 3 deletions(-) + +diff --git a/crypto/algapi.c b/crypto/algapi.c +index c72622f20f52b..8c3a869cc43a9 100644 +--- a/crypto/algapi.c ++++ b/crypto/algapi.c +@@ -944,6 +944,9 @@ EXPORT_SYMBOL_GPL(crypto_enqueue_request); + void crypto_enqueue_request_head(struct crypto_queue *queue, + struct crypto_async_request *request) + { ++ if (unlikely(queue->qlen >= queue->max_qlen)) ++ queue->backlog = queue->backlog->prev; ++ + queue->qlen++; + list_add(&request->list, &queue->list); + } +diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c +index 48c15f4079bb8..50bac2ab55f17 100644 +--- a/crypto/crypto_engine.c ++++ b/crypto/crypto_engine.c +@@ -129,9 +129,6 @@ static void crypto_pump_requests(struct crypto_engine *engine, + if (!engine->retry_support) + engine->cur_req = async_req; + +- if (backlog) +- crypto_request_complete(backlog, -EINPROGRESS); +- + if (engine->busy) + was_busy = true; + else +@@ -217,6 +214,9 @@ static void crypto_pump_requests(struct crypto_engine *engine, + crypto_request_complete(async_req, ret); + + retry: ++ if (backlog) ++ crypto_request_complete(backlog, -EINPROGRESS); ++ + /* If retry mechanism is supported, send new requests to engine */ + if (engine->retry_support) { + spin_lock_irqsave(&engine->queue_lock, flags); +-- +2.39.2 + diff --git a/queue-6.1/crypto-engine-use-crypto_request_complete.patch b/queue-6.1/crypto-engine-use-crypto_request_complete.patch new file mode 100644 index 00000000000..15c69d63c70 --- /dev/null +++ b/queue-6.1/crypto-engine-use-crypto_request_complete.patch @@ -0,0 +1,53 @@ +From 8afdd6c51505eed258a3a7b0129ad3a6a2257b74 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 31 Jan 2023 16:02:02 +0800 +Subject: crypto: engine - Use crypto_request_complete + +From: Herbert Xu + +[ Upstream commit 6909823d47c17cba84e9244d04050b5db8d53789 ] + +Use the crypto_request_complete helper instead of calling the +completion function directly. + +Signed-off-by: Herbert Xu +Stable-dep-of: 4140aafcff16 ("crypto: engine - fix crypto_queue backlog handling") +Signed-off-by: Sasha Levin +--- + crypto/crypto_engine.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c +index bb8e77077f020..48c15f4079bb8 100644 +--- a/crypto/crypto_engine.c ++++ b/crypto/crypto_engine.c +@@ -54,7 +54,7 @@ static void crypto_finalize_request(struct crypto_engine *engine, + } + } + lockdep_assert_in_softirq(); +- req->complete(req, err); ++ crypto_request_complete(req, err); + + kthread_queue_work(engine->kworker, &engine->pump_requests); + } +@@ -130,7 +130,7 @@ static void crypto_pump_requests(struct crypto_engine *engine, + engine->cur_req = async_req; + + if (backlog) +- backlog->complete(backlog, -EINPROGRESS); ++ crypto_request_complete(backlog, -EINPROGRESS); + + if (engine->busy) + was_busy = true; +@@ -214,7 +214,7 @@ static void crypto_pump_requests(struct crypto_engine *engine, + } + + req_err_2: +- async_req->complete(async_req, ret); ++ crypto_request_complete(async_req, ret); + + retry: + /* If retry mechanism is supported, send new requests to engine */ +-- +2.39.2 + diff --git a/queue-6.1/crypto-sun8i-ss-fix-a-test-in-sun8i_ss_setup_ivs.patch b/queue-6.1/crypto-sun8i-ss-fix-a-test-in-sun8i_ss_setup_ivs.patch new file mode 100644 index 00000000000..83921856217 --- /dev/null +++ b/queue-6.1/crypto-sun8i-ss-fix-a-test-in-sun8i_ss_setup_ivs.patch @@ -0,0 +1,38 @@ +From dcd991b7686404a4ae78b8102aa5eadf361b26d9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Apr 2023 22:25:09 +0200 +Subject: crypto: sun8i-ss - Fix a test in sun8i_ss_setup_ivs() + +From: Christophe JAILLET + +[ Upstream commit 8fd91151ebcb21b3f2f2bf158ac6092192550b2b ] + +SS_ENCRYPTION is (0 << 7 = 0), so the test can never be true. +Use a direct comparison to SS_ENCRYPTION instead. + +The same king of test is already done the same way in sun8i_ss_run_task(). + +Fixes: 359e893e8af4 ("crypto: sun8i-ss - rework handling of IV") +Signed-off-by: Christophe JAILLET +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c +index 902f6be057ec6..e97fb203690ae 100644 +--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c ++++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c +@@ -151,7 +151,7 @@ static int sun8i_ss_setup_ivs(struct skcipher_request *areq) + } + rctx->p_iv[i] = a; + /* we need to setup all others IVs only in the decrypt way */ +- if (rctx->op_dir & SS_ENCRYPTION) ++ if (rctx->op_dir == SS_ENCRYPTION) + return 0; + todo = min(len, sg_dma_len(sg)); + len -= todo; +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-add-missing-wa-and-mclk-validation.patch b/queue-6.1/drm-amd-display-add-missing-wa-and-mclk-validation.patch new file mode 100644 index 00000000000..931605352f5 --- /dev/null +++ b/queue-6.1/drm-amd-display-add-missing-wa-and-mclk-validation.patch @@ -0,0 +1,89 @@ +From 757f8e80d8b2c94ec388f9ee4e93046f010293d3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Apr 2023 14:54:05 -0600 +Subject: drm/amd/display: Add missing WA and MCLK validation + +From: Rodrigo Siqueira + +[ Upstream commit 822b84ecfc646da0f87fd947fa00dc3be5e45ecc ] + +When the commit fff7eb56b376 ("drm/amd/display: Don't set dram clock +change requirement for SubVP") was merged, we missed some parts +associated with the MCLK switch. This commit adds all the missing parts. + +Fixes: fff7eb56b376 ("drm/amd/display: Don't set dram clock change requirement for SubVP") +Reviewed-by: Aurabindo Pillai +Signed-off-by: Rodrigo Siqueira +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + .../gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 1 + + .../drm/amd/display/dc/dcn32/dcn32_resource.c | 2 +- + .../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c | 18 +++++++++++++++++- + 3 files changed, 19 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c +index 1a85509c12f23..e9188bce62e0b 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c +@@ -984,6 +984,7 @@ void dcn32_init_hw(struct dc *dc) + if (dc->ctx->dmub_srv) { + dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub); + dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; ++ dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch; + } + + /* Enable support for ODM and windowed MPO if policy flag is set */ +diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c +index a942e2812183a..903f80a8c200c 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c +@@ -1984,7 +1984,7 @@ int dcn32_populate_dml_pipes_from_context( + // In general cases we want to keep the dram clock change requirement + // (prefer configs that support MCLK switch). Only override to false + // for SubVP +- if (subvp_in_use) ++ if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || subvp_in_use) + context->bw_ctx.dml.soc.dram_clock_change_requirement_final = false; + else + context->bw_ctx.dml.soc.dram_clock_change_requirement_final = true; +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c +index 4fa6363647937..fdfb19337ea6e 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c +@@ -368,7 +368,9 @@ void dcn30_fpu_update_soc_for_wm_a(struct dc *dc, struct dc_state *context) + dc_assert_fp_enabled(); + + if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) { +- context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; ++ if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || ++ context->bw_ctx.dml.soc.dram_clock_change_latency_us == 0) ++ context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; + context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us; + context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us; + } +@@ -520,6 +522,20 @@ void dcn30_fpu_calculate_wm_and_dlg( + pipe_idx++; + } + ++ // WA: restrict FPO to use first non-strobe mode (NV24 BW issue) ++ if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching && ++ dc->dml.soc.num_chans <= 4 && ++ context->bw_ctx.dml.vba.DRAMSpeed <= 1700 && ++ context->bw_ctx.dml.vba.DRAMSpeed >= 1500) { ++ ++ for (i = 0; i < dc->dml.soc.num_states; i++) { ++ if (dc->dml.soc.clock_limits[i].dram_speed_mts > 1700) { ++ context->bw_ctx.dml.vba.DRAMSpeed = dc->dml.soc.clock_limits[i].dram_speed_mts; ++ break; ++ } ++ } ++ } ++ + dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel); + + if (!pstate_en) +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-do-not-clear-gpint-register-when-rel.patch b/queue-6.1/drm-amd-display-do-not-clear-gpint-register-when-rel.patch new file mode 100644 index 00000000000..08b8b2e6bf7 --- /dev/null +++ b/queue-6.1/drm-amd-display-do-not-clear-gpint-register-when-rel.patch @@ -0,0 +1,39 @@ +From f9ccce0d185524735b75fb42bf6fbd8069b04630 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Apr 2023 15:48:48 -0400 +Subject: drm/amd/display: Do not clear GPINT register when releasing DMUB from + reset + +From: Aurabindo Pillai + +[ Upstream commit 99d92eaca5d915763b240aae24669f5bf3227ecf ] + +[Why & How] +There's no need to clear GPINT register for DMUB +when releasing it from reset. Fix that. + +Fixes: ac2e555e0a7f ("drm/amd/display: Add DMCUB source files and changes for DCN32/321") +Reviewed-by: Leo Li +Signed-off-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c +index b0adbf783aae9..9c20516be066c 100644 +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c +@@ -137,7 +137,6 @@ void dmub_dcn32_reset(struct dmub_srv *dmub) + + void dmub_dcn32_reset_release(struct dmub_srv *dmub) + { +- REG_WRITE(DMCUB_GPINT_DATAIN1, 0); + REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 0); + REG_WRITE(DMCUB_SCRATCH15, dmub->psp_version & 0x001100FF); + REG_UPDATE_2(DMCUB_CNTL, DMCUB_ENABLE, 1, DMCUB_TRACEPORT_EN, 1); +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-fixes-for-dcn32_clk_mgr-implementati.patch b/queue-6.1/drm-amd-display-fixes-for-dcn32_clk_mgr-implementati.patch new file mode 100644 index 00000000000..77ec82e7279 --- /dev/null +++ b/queue-6.1/drm-amd-display-fixes-for-dcn32_clk_mgr-implementati.patch @@ -0,0 +1,56 @@ +From 75f2d55f4d15155e54f935ee108be60f809b1617 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Apr 2023 12:28:59 -0400 +Subject: drm/amd/display: Fixes for dcn32_clk_mgr implementation + +From: Aurabindo Pillai + +[ Upstream commit d1c5c3e252b8a911a524e6ee33b82aca81397745 ] + +[Why&How] +Fix CLK MGR early initialization and add logging. + +Fixes: 265280b99822 ("drm/amd/display: add CLKMGR changes for DCN32/321") +Reviewed-by: Leo Li +Reviewed-by: Qingqing Zhuo +Signed-off-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +index 9eb9fe5b8d2c5..1d84a04acb3f0 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +@@ -756,6 +756,8 @@ void dcn32_clk_mgr_construct( + struct pp_smu_funcs *pp_smu, + struct dccg *dccg) + { ++ struct clk_log_info log_info = {0}; ++ + clk_mgr->base.ctx = ctx; + clk_mgr->base.funcs = &dcn32_funcs; + if (ASICREV_IS_GC_11_0_2(clk_mgr->base.ctx->asic_id.hw_internal_rev)) { +@@ -789,6 +791,7 @@ void dcn32_clk_mgr_construct( + clk_mgr->base.clks.ref_dtbclk_khz = 268750; + } + ++ + /* integer part is now VCO frequency in kHz */ + clk_mgr->base.dentist_vco_freq_khz = dcn32_get_vco_frequency_from_reg(clk_mgr); + +@@ -796,6 +799,8 @@ void dcn32_clk_mgr_construct( + if (clk_mgr->base.dentist_vco_freq_khz == 0) + clk_mgr->base.dentist_vco_freq_khz = 4300000; /* Updated as per HW docs */ + ++ dcn32_dump_clk_registers(&clk_mgr->base.boot_snapshot, &clk_mgr->base, &log_info); ++ + if (ctx->dc->debug.disable_dtb_ref_clk_switch && + clk_mgr->base.clks.ref_dtbclk_khz != clk_mgr->base.boot_snapshot.dtbclk) { + clk_mgr->base.clks.ref_dtbclk_khz = clk_mgr->base.boot_snapshot.dtbclk; +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-remove-fpu-guards-from-the-dml-folde.patch b/queue-6.1/drm-amd-display-remove-fpu-guards-from-the-dml-folde.patch new file mode 100644 index 00000000000..1c19f376984 --- /dev/null +++ b/queue-6.1/drm-amd-display-remove-fpu-guards-from-the-dml-folde.patch @@ -0,0 +1,129 @@ +From 7b7aaa8c242e2361aefa10e775671c2741419961 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Oct 2022 11:46:31 -0400 +Subject: drm/amd/display: Remove FPU guards from the DML folder + +From: Rodrigo Siqueira + +[ Upstream commit bbfbf09d193ac831c40db50ef4b31d11548a9eef ] + +As part of the programming expectation for using DML functions, DC +requires that any DML function invoked outside DML uses: + + DC_FP_START(); + ... dml function ... + DC_FP_END(); + +Additionally, all the DML functions that can be invoked outside the DML +folder call the function dc_assert_fp_enabled(), which is responsible +for triggering a warning in the case that the DML function was not +guarded by the DC_FP_START/END. For this reason, call DC_FP_START/END +inside DML is wrong, and this commit removes all of those references. + +Tested-by: Mark Broadworth +Reviewed-by: Nevenko Stupar +Reviewed-by: Jun Lei +Acked-by: Rodrigo Siqueira +Signed-off-by: Rodrigo Siqueira +Signed-off-by: Alex Deucher +Stable-dep-of: 822b84ecfc64 ("drm/amd/display: Add missing WA and MCLK validation") +Signed-off-by: Sasha Levin +--- + .../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c | 2 -- + .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 17 +---------------- + 2 files changed, 1 insertion(+), 18 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c +index 990dbd736e2ce..4fa6363647937 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c +@@ -520,9 +520,7 @@ void dcn30_fpu_calculate_wm_and_dlg( + pipe_idx++; + } + +- DC_FP_START(); + dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel); +- DC_FP_END(); + + if (!pstate_en) + /* Restore full p-state latency */ +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +index e22b4b3880af9..d2b184fdd7e02 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +@@ -1200,9 +1200,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc, + } + } else { + // Most populate phantom DLG params before programming hardware / timing for phantom pipe +- DC_FP_START(); + dcn32_helper_populate_phantom_dlg_params(dc, context, pipes, *pipe_cnt); +- DC_FP_END(); + + /* Call validate_apply_pipe_split flags after calling DML getters for + * phantom dlg params, or some of the VBA params indicating pipe split +@@ -1503,11 +1501,8 @@ bool dcn32_internal_validate_bw(struct dc *dc, + + dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt); + +- if (!fast_validate) { +- DC_FP_START(); ++ if (!fast_validate) + dcn32_full_validate_bw_helper(dc, context, pipes, &vlevel, split, merge, &pipe_cnt); +- DC_FP_END(); +- } + + if (fast_validate || + (dc->debug.dml_disallow_alternate_prefetch_modes && +@@ -2172,9 +2167,7 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params, + entry.fabricclk_mhz = 0; + entry.dram_speed_mts = 0; + +- DC_FP_START(); + insert_entry_into_table_sorted(table, num_entries, &entry); +- DC_FP_END(); + } + + // Insert the max DCFCLK +@@ -2182,9 +2175,7 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params, + entry.fabricclk_mhz = 0; + entry.dram_speed_mts = 0; + +- DC_FP_START(); + insert_entry_into_table_sorted(table, num_entries, &entry); +- DC_FP_END(); + + // Insert the UCLK DPMS + for (i = 0; i < num_uclk_dpms; i++) { +@@ -2192,9 +2183,7 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params, + entry.fabricclk_mhz = 0; + entry.dram_speed_mts = bw_params->clk_table.entries[i].memclk_mhz * 16; + +- DC_FP_START(); + insert_entry_into_table_sorted(table, num_entries, &entry); +- DC_FP_END(); + } + + // If FCLK is coarse grained, insert individual DPMs. +@@ -2204,9 +2193,7 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params, + entry.fabricclk_mhz = bw_params->clk_table.entries[i].fclk_mhz; + entry.dram_speed_mts = 0; + +- DC_FP_START(); + insert_entry_into_table_sorted(table, num_entries, &entry); +- DC_FP_END(); + } + } + // If FCLK fine grained, only insert max +@@ -2215,9 +2202,7 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params, + entry.fabricclk_mhz = max_fclk_mhz; + entry.dram_speed_mts = 0; + +- DC_FP_START(); + insert_entry_into_table_sorted(table, num_entries, &entry); +- DC_FP_END(); + } + + // At this point, the table contains all "points of interest" based on +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-reset-outbox0-r-w-pointer-on-dmub-re.patch b/queue-6.1/drm-amd-display-reset-outbox0-r-w-pointer-on-dmub-re.patch new file mode 100644 index 00000000000..be853c09774 --- /dev/null +++ b/queue-6.1/drm-amd-display-reset-outbox0-r-w-pointer-on-dmub-re.patch @@ -0,0 +1,39 @@ +From c94be63facece94aa74d5b4502b2638039edae8a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 13 May 2022 09:16:42 +0800 +Subject: drm/amd/display: Reset OUTBOX0 r/w pointer on DMUB reset + +From: Cruise Hung + +[ Upstream commit 425afa0ac99a05b39e6cd00704fa0e3e925cee2b ] + +[Why & How] +We missed resetting OUTBOX0 mailbox r/w pointer on DMUB reset. +Fix it. + +Fixes: 6ecf9773a503 ("drm/amd/display: Fix DMUB outbox trace in S4 (#4465)") +Signed-off-by: Cruise Hung +Acked-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c +index a76da0131addd..b0adbf783aae9 100644 +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c +@@ -130,6 +130,8 @@ void dmub_dcn32_reset(struct dmub_srv *dmub) + REG_WRITE(DMCUB_INBOX1_WPTR, 0); + REG_WRITE(DMCUB_OUTBOX1_RPTR, 0); + REG_WRITE(DMCUB_OUTBOX1_WPTR, 0); ++ REG_WRITE(DMCUB_OUTBOX0_RPTR, 0); ++ REG_WRITE(DMCUB_OUTBOX0_WPTR, 0); + REG_WRITE(DMCUB_SCRATCH0, 0); + } + +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-return-error-code-on-dsc-atomic-chec.patch b/queue-6.1/drm-amd-display-return-error-code-on-dsc-atomic-chec.patch new file mode 100644 index 00000000000..fad8c8de5f0 --- /dev/null +++ b/queue-6.1/drm-amd-display-return-error-code-on-dsc-atomic-chec.patch @@ -0,0 +1,50 @@ +From 587434609a3e9ad8f18072912260b7c29950719f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 29 May 2022 10:54:30 -0400 +Subject: drm/amd/display: Return error code on DSC atomic check failure + +From: Hersen Wu + +[ Upstream commit dd24662d9dfbad281bbf030f06d68c7938fa0c66 ] + +[Why&How] +We were not returning -EINVAL on DSC atomic check fail. Add it. + +Fixes: 71be4b16d39a ("drm/amd/display: dsc validate fail not pass to atomic check") +Reviewed-by: Aurabindo Pillai +Signed-off-by: Hersen Wu +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 + + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 9f637e360755d..8584049158510 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -9746,6 +9746,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, + ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars); + if (ret) { + DRM_DEBUG_DRIVER("compute_mst_dsc_configs_for_state() failed\n"); ++ ret = -EINVAL; + goto fail; + } + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +index df74bc88e4600..e2f9141d6d938 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +@@ -1368,6 +1368,7 @@ int pre_validate_dsc(struct drm_atomic_state *state, + ret = pre_compute_mst_dsc_configs_for_state(state, local_dc_state, vars); + if (ret != 0) { + DRM_INFO_ONCE("pre_compute_mst_dsc_configs_for_state() failed\n"); ++ ret = -EINVAL; + goto clean_exit; + } + +-- +2.39.2 + diff --git a/queue-6.1/drm-amd-display-update-bounding-box-values-for-dcn32.patch b/queue-6.1/drm-amd-display-update-bounding-box-values-for-dcn32.patch new file mode 100644 index 00000000000..e57337c7193 --- /dev/null +++ b/queue-6.1/drm-amd-display-update-bounding-box-values-for-dcn32.patch @@ -0,0 +1,74 @@ +From 99a4b3e7b0954c38cc4dcd26c657e0ef04ded5af Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Apr 2023 15:59:45 -0400 +Subject: drm/amd/display: Update bounding box values for DCN321 + +From: Aurabindo Pillai + +[ Upstream commit 989cd3e76a4aab76fe7dd50090ac3fa501c537f6 ] + +[Why&how] + +Update bounding box values as per hardware spec + +Fixes: 197485c69543 ("drm/amd/display: Create dcn321_fpu file") +Acked-by: Leo Li +Signed-off-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + .../amd/display/dc/dml/dcn321/dcn321_fpu.c | 24 +++++++++---------- + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c +index b80cef70fa60f..383a409a3f54c 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c +@@ -106,16 +106,16 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_21_soc = { + .clock_limits = { + { + .state = 0, +- .dcfclk_mhz = 1564.0, +- .fabricclk_mhz = 400.0, +- .dispclk_mhz = 2150.0, +- .dppclk_mhz = 2150.0, ++ .dcfclk_mhz = 1434.0, ++ .fabricclk_mhz = 2250.0, ++ .dispclk_mhz = 1720.0, ++ .dppclk_mhz = 1720.0, + .phyclk_mhz = 810.0, + .phyclk_d18_mhz = 667.0, +- .phyclk_d32_mhz = 625.0, ++ .phyclk_d32_mhz = 313.0, + .socclk_mhz = 1200.0, +- .dscclk_mhz = 716.667, +- .dram_speed_mts = 1600.0, ++ .dscclk_mhz = 573.333, ++ .dram_speed_mts = 16000.0, + .dtbclk_mhz = 1564.0, + }, + }, +@@ -125,14 +125,14 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_21_soc = { + .sr_exit_z8_time_us = 285.0, + .sr_enter_plus_exit_z8_time_us = 320, + .writeback_latency_us = 12.0, +- .round_trip_ping_latency_dcfclk_cycles = 263, ++ .round_trip_ping_latency_dcfclk_cycles = 207, + .urgent_latency_pixel_data_only_us = 4, + .urgent_latency_pixel_mixed_with_vm_data_us = 4, + .urgent_latency_vm_data_only_us = 4, +- .fclk_change_latency_us = 20, +- .usr_retraining_latency_us = 2, +- .smn_latency_us = 2, +- .mall_allocated_for_dcn_mbytes = 64, ++ .fclk_change_latency_us = 7, ++ .usr_retraining_latency_us = 0, ++ .smn_latency_us = 0, ++ .mall_allocated_for_dcn_mbytes = 32, + .urgent_out_of_order_return_per_channel_pixel_only_bytes = 4096, + .urgent_out_of_order_return_per_channel_pixel_and_vm_bytes = 4096, + .urgent_out_of_order_return_per_channel_vm_only_bytes = 4096, +-- +2.39.2 + diff --git a/queue-6.1/drm-amdgpu-add-a-missing-lock-for-amdgpu_sched.patch b/queue-6.1/drm-amdgpu-add-a-missing-lock-for-amdgpu_sched.patch new file mode 100644 index 00000000000..e4567e21224 --- /dev/null +++ b/queue-6.1/drm-amdgpu-add-a-missing-lock-for-amdgpu_sched.patch @@ -0,0 +1,54 @@ +From 78de69c8344b154061eb0449cb5429151a4c4562 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 15:54:55 -0700 +Subject: drm/amdgpu: add a missing lock for AMDGPU_SCHED +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Chia-I Wu + +[ Upstream commit 2397e3d8d2e120355201a8310b61929f5a8bd2c0 ] + +mgr->ctx_handles should be protected by mgr->lock. + +v2: improve commit message +v3: add a Fixes tag + +Signed-off-by: Chia-I Wu +Reviewed-by: Christian König +Fixes: 52c6a62c64fa ("drm/amdgpu: add interface for editing a foreign process's priority v3") +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c +index e9b45089a28a6..863b2a34b2d64 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c +@@ -38,6 +38,7 @@ static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, + { + struct fd f = fdget(fd); + struct amdgpu_fpriv *fpriv; ++ struct amdgpu_ctx_mgr *mgr; + struct amdgpu_ctx *ctx; + uint32_t id; + int r; +@@ -51,8 +52,11 @@ static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, + return r; + } + +- idr_for_each_entry(&fpriv->ctx_mgr.ctx_handles, ctx, id) ++ mgr = &fpriv->ctx_mgr; ++ mutex_lock(&mgr->lock); ++ idr_for_each_entry(&mgr->ctx_handles, ctx, id) + amdgpu_ctx_priority_override(ctx, priority); ++ mutex_unlock(&mgr->lock); + + fdput(f); + return 0; +-- +2.39.2 + diff --git a/queue-6.1/drm-i915-mtl-add-the-missing-cpu-transcoder-mask-in-.patch b/queue-6.1/drm-i915-mtl-add-the-missing-cpu-transcoder-mask-in-.patch new file mode 100644 index 00000000000..61e76a9705e --- /dev/null +++ b/queue-6.1/drm-i915-mtl-add-the-missing-cpu-transcoder-mask-in-.patch @@ -0,0 +1,53 @@ +From b9a53a978d767a0e3367a063aabfcb85a4ee448e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Apr 2023 15:12:47 -0700 +Subject: drm/i915/mtl: Add the missing CPU transcoder mask in + intel_device_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Radhakrishna Sripada + +[ Upstream commit 6ece90e3665a9b7fb2637fcca26cebd42991580b ] + +CPU transcoder mask is used to iterate over the available +CPU transcoders in the macro for_each_cpu_transcoder(). + +The macro is broken on MTL and got highlighted when audio +state was being tracked for each transcoder added in [1]. + +Add the missing CPU transcoder mask which is similar to ADL-P +mask but without DSI transcoders. + +[1]: https://patchwork.freedesktop.org/patch/523723/ + +Fixes: 7835303982d1 ("drm/i915/mtl: Add MeteorLake PCI IDs") +Cc: Ville Syrjälä +Signed-off-by: Radhakrishna Sripada +Acked-by: Haridhar Kalvala +Reviewed-by: Gustavo Sousa +Link: https://patchwork.freedesktop.org/patch/msgid/20230420221248.2511314-1-radhakrishna.sripada@intel.com +(cherry picked from commit bddc18913bd44adae5c828fd514d570f43ba1576) +Signed-off-by: Joonas Lahtinen +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/i915/i915_pci.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c +index fe4f279aaeb3e..a2efc0b9d50c8 100644 +--- a/drivers/gpu/drm/i915/i915_pci.c ++++ b/drivers/gpu/drm/i915/i915_pci.c +@@ -1133,6 +1133,8 @@ static const struct intel_gt_definition xelpmp_extra_gt[] = { + static const struct intel_device_info mtl_info = { + XE_HP_FEATURES, + XE_LPDP_FEATURES, ++ .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | ++ BIT(TRANSCODER_C) | BIT(TRANSCODER_D), + /* + * Real graphics IP version will be obtained from hardware GMD_ID + * register. Value provided here is just for sanity checking. +-- +2.39.2 + diff --git a/queue-6.1/ethtool-fix-uninitialized-number-of-lanes.patch b/queue-6.1/ethtool-fix-uninitialized-number-of-lanes.patch new file mode 100644 index 00000000000..735773bc95f --- /dev/null +++ b/queue-6.1/ethtool-fix-uninitialized-number-of-lanes.patch @@ -0,0 +1,130 @@ +From 51b84b7ba2a7a688e64d941d72d0892f284e78b3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 May 2023 15:20:50 +0300 +Subject: ethtool: Fix uninitialized number of lanes + +From: Ido Schimmel + +[ Upstream commit 9ad685dbfe7e856bbf17a7177b64676d324d6ed7 ] + +It is not possible to set the number of lanes when setting link modes +using the legacy IOCTL ethtool interface. Since 'struct +ethtool_link_ksettings' is not initialized in this path, drivers receive +an uninitialized number of lanes in 'struct +ethtool_link_ksettings::lanes'. + +When this information is later queried from drivers, it results in the +ethtool code making decisions based on uninitialized memory, leading to +the following KMSAN splat [1]. In practice, this most likely only +happens with the tun driver that simply returns whatever it got in the +set operation. + +As far as I can tell, this uninitialized memory is not leaked to user +space thanks to the 'ethtool_ops->cap_link_lanes_supported' check in +linkmodes_prepare_data(). + +Fix by initializing the structure in the IOCTL path. Did not find any +more call sites that pass an uninitialized structure when calling +'ethtool_ops::set_link_ksettings()'. + +[1] +BUG: KMSAN: uninit-value in ethnl_update_linkmodes net/ethtool/linkmodes.c:273 [inline] +BUG: KMSAN: uninit-value in ethnl_set_linkmodes+0x190b/0x19d0 net/ethtool/linkmodes.c:333 + ethnl_update_linkmodes net/ethtool/linkmodes.c:273 [inline] + ethnl_set_linkmodes+0x190b/0x19d0 net/ethtool/linkmodes.c:333 + ethnl_default_set_doit+0x88d/0xde0 net/ethtool/netlink.c:640 + genl_family_rcv_msg_doit net/netlink/genetlink.c:968 [inline] + genl_family_rcv_msg net/netlink/genetlink.c:1048 [inline] + genl_rcv_msg+0x141a/0x14c0 net/netlink/genetlink.c:1065 + netlink_rcv_skb+0x3f8/0x750 net/netlink/af_netlink.c:2577 + genl_rcv+0x40/0x60 net/netlink/genetlink.c:1076 + netlink_unicast_kernel net/netlink/af_netlink.c:1339 [inline] + netlink_unicast+0xf41/0x1270 net/netlink/af_netlink.c:1365 + netlink_sendmsg+0x127d/0x1430 net/netlink/af_netlink.c:1942 + sock_sendmsg_nosec net/socket.c:724 [inline] + sock_sendmsg net/socket.c:747 [inline] + ____sys_sendmsg+0xa24/0xe40 net/socket.c:2501 + ___sys_sendmsg+0x2a1/0x3f0 net/socket.c:2555 + __sys_sendmsg net/socket.c:2584 [inline] + __do_sys_sendmsg net/socket.c:2593 [inline] + __se_sys_sendmsg net/socket.c:2591 [inline] + __x64_sys_sendmsg+0x36b/0x540 net/socket.c:2591 + do_syscall_x64 arch/x86/entry/common.c:50 [inline] + do_syscall_64+0x41/0xc0 arch/x86/entry/common.c:80 + entry_SYSCALL_64_after_hwframe+0x63/0xcd + +Uninit was stored to memory at: + tun_get_link_ksettings+0x37/0x60 drivers/net/tun.c:3544 + __ethtool_get_link_ksettings+0x17b/0x260 net/ethtool/ioctl.c:441 + ethnl_set_linkmodes+0xee/0x19d0 net/ethtool/linkmodes.c:327 + ethnl_default_set_doit+0x88d/0xde0 net/ethtool/netlink.c:640 + genl_family_rcv_msg_doit net/netlink/genetlink.c:968 [inline] + genl_family_rcv_msg net/netlink/genetlink.c:1048 [inline] + genl_rcv_msg+0x141a/0x14c0 net/netlink/genetlink.c:1065 + netlink_rcv_skb+0x3f8/0x750 net/netlink/af_netlink.c:2577 + genl_rcv+0x40/0x60 net/netlink/genetlink.c:1076 + netlink_unicast_kernel net/netlink/af_netlink.c:1339 [inline] + netlink_unicast+0xf41/0x1270 net/netlink/af_netlink.c:1365 + netlink_sendmsg+0x127d/0x1430 net/netlink/af_netlink.c:1942 + sock_sendmsg_nosec net/socket.c:724 [inline] + sock_sendmsg net/socket.c:747 [inline] + ____sys_sendmsg+0xa24/0xe40 net/socket.c:2501 + ___sys_sendmsg+0x2a1/0x3f0 net/socket.c:2555 + __sys_sendmsg net/socket.c:2584 [inline] + __do_sys_sendmsg net/socket.c:2593 [inline] + __se_sys_sendmsg net/socket.c:2591 [inline] + __x64_sys_sendmsg+0x36b/0x540 net/socket.c:2591 + do_syscall_x64 arch/x86/entry/common.c:50 [inline] + do_syscall_64+0x41/0xc0 arch/x86/entry/common.c:80 + entry_SYSCALL_64_after_hwframe+0x63/0xcd + +Uninit was stored to memory at: + tun_set_link_ksettings+0x37/0x60 drivers/net/tun.c:3553 + ethtool_set_link_ksettings+0x600/0x690 net/ethtool/ioctl.c:609 + __dev_ethtool net/ethtool/ioctl.c:3024 [inline] + dev_ethtool+0x1db9/0x2a70 net/ethtool/ioctl.c:3078 + dev_ioctl+0xb07/0x1270 net/core/dev_ioctl.c:524 + sock_do_ioctl+0x295/0x540 net/socket.c:1213 + sock_ioctl+0x729/0xd90 net/socket.c:1316 + vfs_ioctl fs/ioctl.c:51 [inline] + __do_sys_ioctl fs/ioctl.c:870 [inline] + __se_sys_ioctl+0x222/0x400 fs/ioctl.c:856 + __x64_sys_ioctl+0x96/0xe0 fs/ioctl.c:856 + do_syscall_x64 arch/x86/entry/common.c:50 [inline] + do_syscall_64+0x41/0xc0 arch/x86/entry/common.c:80 + entry_SYSCALL_64_after_hwframe+0x63/0xcd + +Local variable link_ksettings created at: + ethtool_set_link_ksettings+0x54/0x690 net/ethtool/ioctl.c:577 + __dev_ethtool net/ethtool/ioctl.c:3024 [inline] + dev_ethtool+0x1db9/0x2a70 net/ethtool/ioctl.c:3078 + +Fixes: 012ce4dd3102 ("ethtool: Extend link modes settings uAPI with lanes") +Reported-and-tested-by: syzbot+ef6edd9f1baaa54d6235@syzkaller.appspotmail.com +Link: https://lore.kernel.org/netdev/0000000000004bb41105fa70f361@google.com/ +Reviewed-by: Danielle Ratson +Signed-off-by: Ido Schimmel +Reviewed-by: Leon Romanovsky +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/ethtool/ioctl.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/ethtool/ioctl.c b/net/ethtool/ioctl.c +index 038398d41a937..940c0e27be735 100644 +--- a/net/ethtool/ioctl.c ++++ b/net/ethtool/ioctl.c +@@ -580,8 +580,8 @@ static int ethtool_get_link_ksettings(struct net_device *dev, + static int ethtool_set_link_ksettings(struct net_device *dev, + void __user *useraddr) + { ++ struct ethtool_link_ksettings link_ksettings = {}; + int err; +- struct ethtool_link_ksettings link_ksettings; + + ASSERT_RTNL(); + +-- +2.39.2 + diff --git a/queue-6.1/i2c-tegra-fix-pec-support-for-smbus-block-read.patch b/queue-6.1/i2c-tegra-fix-pec-support-for-smbus-block-read.patch new file mode 100644 index 00000000000..8a329c36a5a --- /dev/null +++ b/queue-6.1/i2c-tegra-fix-pec-support-for-smbus-block-read.patch @@ -0,0 +1,127 @@ +From b022c93d9d9249942a11083ee2e86f688fd349d5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Apr 2023 18:09:14 +0530 +Subject: i2c: tegra: Fix PEC support for SMBUS block read + +From: Akhil R + +[ Upstream commit 9f855779a3874eee70e9f6be57b5f7774f14e510 ] + +Update the msg->len value correctly for SMBUS block read. The discrepancy +went unnoticed as msg->len is used in SMBUS transfers only when a PEC +byte is added. + +Fixes: d7583c8a5748 ("i2c: tegra: Add SMBus block read function") +Signed-off-by: Akhil R +Acked-by: Thierry Reding +Signed-off-by: Wolfram Sang +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-tegra.c | 40 +++++++++++++++++++++++----------- + 1 file changed, 27 insertions(+), 13 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c +index 3869c258a5296..2bc40f957e509 100644 +--- a/drivers/i2c/busses/i2c-tegra.c ++++ b/drivers/i2c/busses/i2c-tegra.c +@@ -242,9 +242,10 @@ struct tegra_i2c_hw_feature { + * @is_dvc: identifies the DVC I2C controller, has a different register layout + * @is_vi: identifies the VI I2C controller, has a different register layout + * @msg_complete: transfer completion notifier ++ * @msg_buf_remaining: size of unsent data in the message buffer ++ * @msg_len: length of message in current transfer + * @msg_err: error code for completed message + * @msg_buf: pointer to current message data +- * @msg_buf_remaining: size of unsent data in the message buffer + * @msg_read: indicates that the transfer is a read access + * @timings: i2c timings information like bus frequency + * @multimaster_mode: indicates that I2C controller is in multi-master mode +@@ -277,6 +278,7 @@ struct tegra_i2c_dev { + + struct completion msg_complete; + size_t msg_buf_remaining; ++ unsigned int msg_len; + int msg_err; + u8 *msg_buf; + +@@ -1169,7 +1171,7 @@ static void tegra_i2c_push_packet_header(struct tegra_i2c_dev *i2c_dev, + else + i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); + +- packet_header = msg->len - 1; ++ packet_header = i2c_dev->msg_len - 1; + + if (i2c_dev->dma_mode && !i2c_dev->msg_read) + *dma_buf++ = packet_header; +@@ -1242,20 +1244,32 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, + return err; + + i2c_dev->msg_buf = msg->buf; ++ i2c_dev->msg_len = msg->len; + +- /* The condition true implies smbus block read and len is already read */ +- if (msg->flags & I2C_M_RECV_LEN && end_state != MSG_END_CONTINUE) +- i2c_dev->msg_buf = msg->buf + 1; +- +- i2c_dev->msg_buf_remaining = msg->len; + i2c_dev->msg_err = I2C_ERR_NONE; + i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); + reinit_completion(&i2c_dev->msg_complete); + ++ /* ++ * For SMBUS block read command, read only 1 byte in the first transfer. ++ * Adjust that 1 byte for the next transfer in the msg buffer and msg ++ * length. ++ */ ++ if (msg->flags & I2C_M_RECV_LEN) { ++ if (end_state == MSG_END_CONTINUE) { ++ i2c_dev->msg_len = 1; ++ } else { ++ i2c_dev->msg_buf += 1; ++ i2c_dev->msg_len -= 1; ++ } ++ } ++ ++ i2c_dev->msg_buf_remaining = i2c_dev->msg_len; ++ + if (i2c_dev->msg_read) +- xfer_size = msg->len; ++ xfer_size = i2c_dev->msg_len; + else +- xfer_size = msg->len + I2C_PACKET_HEADER_SIZE; ++ xfer_size = i2c_dev->msg_len + I2C_PACKET_HEADER_SIZE; + + xfer_size = ALIGN(xfer_size, BYTES_PER_FIFO_WORD); + +@@ -1295,7 +1309,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, + if (!i2c_dev->msg_read) { + if (i2c_dev->dma_mode) { + memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, +- msg->buf, msg->len); ++ msg->buf, i2c_dev->msg_len); + + dma_sync_single_for_device(i2c_dev->dma_dev, + i2c_dev->dma_phys, +@@ -1352,7 +1366,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, + i2c_dev->dma_phys, + xfer_size, DMA_FROM_DEVICE); + +- memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, msg->len); ++ memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, i2c_dev->msg_len); + } + } + +@@ -1408,8 +1422,8 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], + ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], MSG_END_CONTINUE); + if (ret) + break; +- /* Set the read byte as msg len */ +- msgs[i].len = msgs[i].buf[0]; ++ /* Set the msg length from first byte */ ++ msgs[i].len += msgs[i].buf[0]; + dev_dbg(i2c_dev->dev, "reading %d bytes\n", msgs[i].len); + } + ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); +-- +2.39.2 + diff --git a/queue-6.1/ice-block-lan-in-case-of-vf-to-vf-offload.patch b/queue-6.1/ice-block-lan-in-case-of-vf-to-vf-offload.patch new file mode 100644 index 00000000000..d5778abc1a0 --- /dev/null +++ b/queue-6.1/ice-block-lan-in-case-of-vf-to-vf-offload.patch @@ -0,0 +1,52 @@ +From 407591c8a6a73b2ba301838f48b9060031846473 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 08:39:35 -0700 +Subject: ice: block LAN in case of VF to VF offload + +From: Michal Swiatkowski + +[ Upstream commit 9f699b71c2f31c51bd1483a20e1c8ddc5986a8c9 ] + +VF to VF traffic shouldn't go outside. To enforce it, set only the loopback +enable bit in case of all ingress type rules added via the tc tool. + +Fixes: 0d08a441fb1a ("ice: ndo_setup_tc implementation for PF") +Reported-by: Sujai Buvaneswaran +Signed-off-by: Michal Swiatkowski +Tested-by: George Kuruvinakunnel +Reviewed-by: Simon Horman +Signed-off-by: Tony Nguyen +Reviewed-by: Leon Romanovsky +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/intel/ice/ice_tc_lib.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/intel/ice/ice_tc_lib.c b/drivers/net/ethernet/intel/ice/ice_tc_lib.c +index 71cb15fcf63b9..652ef09eeb305 100644 +--- a/drivers/net/ethernet/intel/ice/ice_tc_lib.c ++++ b/drivers/net/ethernet/intel/ice/ice_tc_lib.c +@@ -693,17 +693,18 @@ ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr) + * results into order of switch rule evaluation. + */ + rule_info.priority = 7; ++ rule_info.flags_info.act_valid = true; + + if (fltr->direction == ICE_ESWITCH_FLTR_INGRESS) { + rule_info.sw_act.flag |= ICE_FLTR_RX; + rule_info.sw_act.src = hw->pf_id; + rule_info.rx = true; ++ rule_info.flags_info.act = ICE_SINGLE_ACT_LB_ENABLE; + } else { + rule_info.sw_act.flag |= ICE_FLTR_TX; + rule_info.sw_act.src = vsi->idx; + rule_info.rx = false; + rule_info.flags_info.act = ICE_SINGLE_ACT_LAN_ENABLE; +- rule_info.flags_info.act_valid = true; + } + + /* specify the cookie as filter_rule_id */ +-- +2.39.2 + diff --git a/queue-6.1/ionic-catch-failure-from-devlink_alloc.patch b/queue-6.1/ionic-catch-failure-from-devlink_alloc.patch new file mode 100644 index 00000000000..d585655defa --- /dev/null +++ b/queue-6.1/ionic-catch-failure-from-devlink_alloc.patch @@ -0,0 +1,40 @@ +From 4d04a9b9ca5e4074307c4f88f90345a996449f0e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 May 2023 11:35:36 -0700 +Subject: ionic: catch failure from devlink_alloc + +From: Shannon Nelson + +[ Upstream commit 4a54903ff68ddb33b6463c94b4eb37fc584ef760 ] + +Add a check for NULL on the alloc return. If devlink_alloc() fails and +we try to use devlink_priv() on the NULL return, the kernel gets very +unhappy and panics. With this fix, the driver load will still fail, +but at least it won't panic the kernel. + +Fixes: df69ba43217d ("ionic: Add basic framework for IONIC Network device driver") +Signed-off-by: Shannon Nelson +Reviewed-by: Simon Horman +Reviewed-by: Jiri Pirko +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/pensando/ionic/ionic_devlink.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/net/ethernet/pensando/ionic/ionic_devlink.c b/drivers/net/ethernet/pensando/ionic/ionic_devlink.c +index 4297ed9024c01..2696dac21b096 100644 +--- a/drivers/net/ethernet/pensando/ionic/ionic_devlink.c ++++ b/drivers/net/ethernet/pensando/ionic/ionic_devlink.c +@@ -65,6 +65,8 @@ struct ionic *ionic_devlink_alloc(struct device *dev) + struct devlink *dl; + + dl = devlink_alloc(&ionic_dl_ops, sizeof(struct ionic), dev); ++ if (!dl) ++ return NULL; + + return devlink_priv(dl); + } +-- +2.39.2 + diff --git a/queue-6.1/ionic-remove-noise-from-ethtool-rxnfc-error-msg.patch b/queue-6.1/ionic-remove-noise-from-ethtool-rxnfc-error-msg.patch new file mode 100644 index 00000000000..b2ee7c4a95d --- /dev/null +++ b/queue-6.1/ionic-remove-noise-from-ethtool-rxnfc-error-msg.patch @@ -0,0 +1,38 @@ +From e7f745ea7eb156719af47dcb45cf832899283512 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 May 2023 11:47:40 -0700 +Subject: ionic: remove noise from ethtool rxnfc error msg + +From: Shannon Nelson + +[ Upstream commit 3711d44fac1f80ea69ecb7315fed05b3812a7401 ] + +It seems that ethtool is calling into .get_rxnfc more often with +ETHTOOL_GRXCLSRLCNT which ionic doesn't know about. We don't +need to log a message about it, just return not supported. + +Fixes: aa3198819bea6 ("ionic: Add RSS support") +Signed-off-by: Shannon Nelson +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/pensando/ionic/ionic_ethtool.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c b/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c +index 01c22701482d9..d7370fb60a168 100644 +--- a/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c ++++ b/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c +@@ -691,7 +691,7 @@ static int ionic_get_rxnfc(struct net_device *netdev, + info->data = lif->nxqs; + break; + default: +- netdev_err(netdev, "Command parameter %d is not supported\n", ++ netdev_dbg(netdev, "Command parameter %d is not supported\n", + info->cmd); + err = -EOPNOTSUPP; + } +-- +2.39.2 + diff --git a/queue-6.1/ixgbe-fix-panic-during-xdp_tx-with-64-cpus.patch b/queue-6.1/ixgbe-fix-panic-during-xdp_tx-with-64-cpus.patch new file mode 100644 index 00000000000..902651ac21a --- /dev/null +++ b/queue-6.1/ixgbe-fix-panic-during-xdp_tx-with-64-cpus.patch @@ -0,0 +1,145 @@ +From 9201b8cc44f66365ca2394d24f81388054735b28 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Apr 2023 10:03:08 -0700 +Subject: ixgbe: Fix panic during XDP_TX with > 64 CPUs + +From: John Hickey + +[ Upstream commit c23ae5091a8b3e50fe755257df020907e7c029bb ] + +Commit 4fe815850bdc ("ixgbe: let the xdpdrv work with more than 64 cpus") +adds support to allow XDP programs to run on systems with more than +64 CPUs by locking the XDP TX rings and indexing them using cpu % 64 +(IXGBE_MAX_XDP_QS). + +Upon trying this out patch on a system with more than 64 cores, +the kernel paniced with an array-index-out-of-bounds at the return in +ixgbe_determine_xdp_ring in ixgbe.h, which means ixgbe_determine_xdp_q_idx +was just returning the cpu instead of cpu % IXGBE_MAX_XDP_QS. An example +splat: + + ========================================================================== + UBSAN: array-index-out-of-bounds in + /var/lib/dkms/ixgbe/5.18.6+focal-1/build/src/ixgbe.h:1147:26 + index 65 is out of range for type 'ixgbe_ring *[64]' + ========================================================================== + BUG: kernel NULL pointer dereference, address: 0000000000000058 + #PF: supervisor read access in kernel mode + #PF: error_code(0x0000) - not-present page + PGD 0 P4D 0 + Oops: 0000 [#1] SMP NOPTI + CPU: 65 PID: 408 Comm: ksoftirqd/65 + Tainted: G IOE 5.15.0-48-generic #54~20.04.1-Ubuntu + Hardware name: Dell Inc. PowerEdge R640/0W23H8, BIOS 2.5.4 01/13/2020 + RIP: 0010:ixgbe_xmit_xdp_ring+0x1b/0x1c0 [ixgbe] + Code: 3b 52 d4 cf e9 42 f2 ff ff 66 0f 1f 44 00 00 0f 1f 44 00 00 55 b9 + 00 00 00 00 48 89 e5 41 57 41 56 41 55 41 54 53 48 83 ec 08 <44> 0f b7 + 47 58 0f b7 47 5a 0f b7 57 54 44 0f b7 76 08 66 41 39 c0 + RSP: 0018:ffffbc3fcd88fcb0 EFLAGS: 00010282 + RAX: ffff92a253260980 RBX: ffffbc3fe68b00a0 RCX: 0000000000000000 + RDX: ffff928b5f659000 RSI: ffff928b5f659000 RDI: 0000000000000000 + RBP: ffffbc3fcd88fce0 R08: ffff92b9dfc20580 R09: 0000000000000001 + R10: 3d3d3d3d3d3d3d3d R11: 3d3d3d3d3d3d3d3d R12: 0000000000000000 + R13: ffff928b2f0fa8c0 R14: ffff928b9be20050 R15: 000000000000003c + FS: 0000000000000000(0000) GS:ffff92b9dfc00000(0000) + knlGS:0000000000000000 + CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + CR2: 0000000000000058 CR3: 000000011dd6a002 CR4: 00000000007706e0 + DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 + PKRU: 55555554 + Call Trace: + + ixgbe_poll+0x103e/0x1280 [ixgbe] + ? sched_clock_cpu+0x12/0xe0 + __napi_poll+0x30/0x160 + net_rx_action+0x11c/0x270 + __do_softirq+0xda/0x2ee + run_ksoftirqd+0x2f/0x50 + smpboot_thread_fn+0xb7/0x150 + ? sort_range+0x30/0x30 + kthread+0x127/0x150 + ? set_kthread_struct+0x50/0x50 + ret_from_fork+0x1f/0x30 + + +I think this is how it happens: + +Upon loading the first XDP program on a system with more than 64 CPUs, +ixgbe_xdp_locking_key is incremented in ixgbe_xdp_setup. However, +immediately after this, the rings are reconfigured by ixgbe_setup_tc. +ixgbe_setup_tc calls ixgbe_clear_interrupt_scheme which calls +ixgbe_free_q_vectors which calls ixgbe_free_q_vector in a loop. +ixgbe_free_q_vector decrements ixgbe_xdp_locking_key once per call if +it is non-zero. Commenting out the decrement in ixgbe_free_q_vector +stopped my system from panicing. + +I suspect to make the original patch work, I would need to load an XDP +program and then replace it in order to get ixgbe_xdp_locking_key back +above 0 since ixgbe_setup_tc is only called when transitioning between +XDP and non-XDP ring configurations, while ixgbe_xdp_locking_key is +incremented every time ixgbe_xdp_setup is called. + +Also, ixgbe_setup_tc can be called via ethtool --set-channels, so this +becomes another path to decrement ixgbe_xdp_locking_key to 0 on systems +with more than 64 CPUs. + +Since ixgbe_xdp_locking_key only protects the XDP_TX path and is tied +to the number of CPUs present, there is no reason to disable it upon +unloading an XDP program. To avoid confusion, I have moved enabling +ixgbe_xdp_locking_key into ixgbe_sw_init, which is part of the probe path. + +Fixes: 4fe815850bdc ("ixgbe: let the xdpdrv work with more than 64 cpus") +Signed-off-by: John Hickey +Reviewed-by: Maciej Fijalkowski +Tested-by: Chandan Kumar Rout (A Contingent Worker at Intel) +Signed-off-by: Tony Nguyen +Link: https://lore.kernel.org/r/20230425170308.2522429-1-anthony.l.nguyen@intel.com +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 3 --- + drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 6 ++++-- + 2 files changed, 4 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c +index f8156fe4b1dc4..0ee943db3dc92 100644 +--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c ++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c +@@ -1035,9 +1035,6 @@ static void ixgbe_free_q_vector(struct ixgbe_adapter *adapter, int v_idx) + adapter->q_vector[v_idx] = NULL; + __netif_napi_del(&q_vector->napi); + +- if (static_key_enabled(&ixgbe_xdp_locking_key)) +- static_branch_dec(&ixgbe_xdp_locking_key); +- + /* + * after a call to __netif_napi_del() napi may still be used and + * ixgbe_get_stats64() might access the rings on this vector, +diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +index faf3a094ac540..9b8848daeb430 100644 +--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c ++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +@@ -6495,6 +6495,10 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter, + set_bit(0, adapter->fwd_bitmask); + set_bit(__IXGBE_DOWN, &adapter->state); + ++ /* enable locking for XDP_TX if we have more CPUs than queues */ ++ if (nr_cpu_ids > IXGBE_MAX_XDP_QS) ++ static_branch_enable(&ixgbe_xdp_locking_key); ++ + return 0; + } + +@@ -10288,8 +10292,6 @@ static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog) + */ + if (nr_cpu_ids > IXGBE_MAX_XDP_QS * 2) + return -ENOMEM; +- else if (nr_cpu_ids > IXGBE_MAX_XDP_QS) +- static_branch_inc(&ixgbe_xdp_locking_key); + + old_prog = xchg(&adapter->xdp_prog, prog); + need_reset = (!!prog != !!old_prog); +-- +2.39.2 + diff --git a/queue-6.1/kvm-s390-fix-race-in-gmap_make_secure.patch b/queue-6.1/kvm-s390-fix-race-in-gmap_make_secure.patch new file mode 100644 index 00000000000..043810953db --- /dev/null +++ b/queue-6.1/kvm-s390-fix-race-in-gmap_make_secure.patch @@ -0,0 +1,94 @@ +From 6818afb67884cbfec2804dc64e18e7be2a4f7ae0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 11:27:53 +0200 +Subject: KVM: s390: fix race in gmap_make_secure() + +From: Claudio Imbrenda + +[ Upstream commit c148dc8e2fa403be501612ee409db866eeed35c0 ] + +Fix a potential race in gmap_make_secure() and remove the last user of +follow_page() without FOLL_GET. + +The old code is locking something it doesn't have a reference to, and +as explained by Jason and David in this discussion: +https://lore.kernel.org/linux-mm/Y9J4P%2FRNvY1Ztn0Q@nvidia.com/ +it can lead to all kind of bad things, including the page getting +unmapped (MADV_DONTNEED), freed, reallocated as a larger folio and the +unlock_page() would target the wrong bit. +There is also another race with the FOLL_WRITE, which could race +between the follow_page() and the get_locked_pte(). + +The main point is to remove the last use of follow_page() without +FOLL_GET or FOLL_PIN, removing the races can be considered a nice +bonus. + +Link: https://lore.kernel.org/linux-mm/Y9J4P%2FRNvY1Ztn0Q@nvidia.com/ +Suggested-by: Jason Gunthorpe +Fixes: 214d9bbcd3a6 ("s390/mm: provide memory management functions for protected KVM guests") +Reviewed-by: Jason Gunthorpe +Signed-off-by: Claudio Imbrenda +Message-Id: <20230428092753.27913-2-imbrenda@linux.ibm.com> +Signed-off-by: Sasha Levin +--- + arch/s390/kernel/uv.c | 32 +++++++++++--------------------- + 1 file changed, 11 insertions(+), 21 deletions(-) + +diff --git a/arch/s390/kernel/uv.c b/arch/s390/kernel/uv.c +index f9810d2a267c6..5caa0ed2b594a 100644 +--- a/arch/s390/kernel/uv.c ++++ b/arch/s390/kernel/uv.c +@@ -192,21 +192,10 @@ static int expected_page_refs(struct page *page) + return res; + } + +-static int make_secure_pte(pte_t *ptep, unsigned long addr, +- struct page *exp_page, struct uv_cb_header *uvcb) ++static int make_page_secure(struct page *page, struct uv_cb_header *uvcb) + { +- pte_t entry = READ_ONCE(*ptep); +- struct page *page; + int expected, cc = 0; + +- if (!pte_present(entry)) +- return -ENXIO; +- if (pte_val(entry) & _PAGE_INVALID) +- return -ENXIO; +- +- page = pte_page(entry); +- if (page != exp_page) +- return -ENXIO; + if (PageWriteback(page)) + return -EAGAIN; + expected = expected_page_refs(page); +@@ -297,17 +286,18 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + goto out; + + rc = -ENXIO; +- page = follow_page(vma, uaddr, FOLL_WRITE); +- if (IS_ERR_OR_NULL(page)) +- goto out; +- +- lock_page(page); + ptep = get_locked_pte(gmap->mm, uaddr, &ptelock); +- if (should_export_before_import(uvcb, gmap->mm)) +- uv_convert_from_secure(page_to_phys(page)); +- rc = make_secure_pte(ptep, uaddr, page, uvcb); ++ if (pte_present(*ptep) && !(pte_val(*ptep) & _PAGE_INVALID) && pte_write(*ptep)) { ++ page = pte_page(*ptep); ++ rc = -EAGAIN; ++ if (trylock_page(page)) { ++ if (should_export_before_import(uvcb, gmap->mm)) ++ uv_convert_from_secure(page_to_phys(page)); ++ rc = make_page_secure(page, uvcb); ++ unlock_page(page); ++ } ++ } + pte_unmap_unlock(ptep, ptelock); +- unlock_page(page); + out: + mmap_read_unlock(gmap->mm); + +-- +2.39.2 + diff --git a/queue-6.1/net-bcmgenet-remove-phy_stop-from-bcmgenet_netif_sto.patch b/queue-6.1/net-bcmgenet-remove-phy_stop-from-bcmgenet_netif_sto.patch new file mode 100644 index 00000000000..c272c451b58 --- /dev/null +++ b/queue-6.1/net-bcmgenet-remove-phy_stop-from-bcmgenet_netif_sto.patch @@ -0,0 +1,37 @@ +From 103c5f233bdeeabb1b3b3d03fbebd237d213eef2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 May 2023 16:07:27 -0700 +Subject: net: bcmgenet: Remove phy_stop() from bcmgenet_netif_stop() + +From: Florian Fainelli + +[ Upstream commit 93e0401e0fc0c54b0ac05b687cd135c2ac38187c ] + +The call to phy_stop() races with the later call to phy_disconnect(), +resulting in concurrent phy_suspend() calls being run from different +CPUs. The final call to phy_disconnect() ensures that the PHY is +stopped and suspended, too. + +Fixes: c96e731c93ff ("net: bcmgenet: connect and disconnect from the PHY state machine") +Signed-off-by: Florian Fainelli +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/broadcom/genet/bcmgenet.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c +index f679ed54b3ef2..9860fd66f3bca 100644 +--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c ++++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c +@@ -3460,7 +3460,6 @@ static void bcmgenet_netif_stop(struct net_device *dev) + /* Disable MAC transmit. TX DMA disabled must be done before this */ + umac_enable_set(priv, CMD_TX_EN, false); + +- phy_stop(dev->phydev); + bcmgenet_disable_rx_napi(priv); + bcmgenet_intr_disable(priv); + +-- +2.39.2 + diff --git a/queue-6.1/net-dsa-mt7530-fix-corrupt-frames-using-trgmii-on-40.patch b/queue-6.1/net-dsa-mt7530-fix-corrupt-frames-using-trgmii-on-40.patch new file mode 100644 index 00000000000..98f6d739e7b --- /dev/null +++ b/queue-6.1/net-dsa-mt7530-fix-corrupt-frames-using-trgmii-on-40.patch @@ -0,0 +1,65 @@ +From 7937ea1858a53576dafe89c1f4a57a0da141e29d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 00:09:46 +0300 +Subject: net: dsa: mt7530: fix corrupt frames using trgmii on 40 MHz XTAL + MT7621 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Arınç ÜNAL + +[ Upstream commit 37c218d8021e36e226add4bab93d071d30fe0704 ] + +The multi-chip module MT7530 switch with a 40 MHz oscillator on the +MT7621AT, MT7621DAT, and MT7621ST SoCs forwards corrupt frames using +trgmii. + +This is caused by the assumption that MT7621 SoCs have got 150 MHz PLL, +hence using the ncpo1 value, 0x0780. + +My testing shows this value works on Unielec U7621-06, Bartel's testing +shows it won't work on Hi-Link HLK-MT7621A and Netgear WAC104. All devices +tested have got 40 MHz oscillators. + +Using the value for 125 MHz PLL, 0x0640, works on all boards at hand. The +definitions for 125 MHz PLL exist on the Banana Pi BPI-R2 BSP source code +whilst 150 MHz PLL don't. + +Forwarding frames using trgmii on the MCM MT7530 switch with a 25 MHz +oscillator on the said MT7621 SoCs works fine because the ncpo1 value +defined for it is for 125 MHz PLL. + +Change the 150 MHz PLL comment to 125 MHz PLL, and use the 125 MHz PLL +ncpo1 values for both oscillator frequencies. + +Link: https://github.com/BPI-SINOVOIP/BPI-R2-bsp/blob/81d24bbce7d99524d0771a8bdb2d6663e4eb4faa/u-boot-mt/drivers/net/rt2880_eth.c#L2195 +Fixes: 7ef6f6f8d237 ("net: dsa: mt7530: Add MT7621 TRGMII mode support") +Tested-by: Bartel Eerdekens +Signed-off-by: Arınç ÜNAL +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mt7530.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c +index 38bf760b5b5ee..3ef92ac7815c1 100644 +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -446,9 +446,9 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) + else + ssc_delta = 0x87; + if (priv->id == ID_MT7621) { +- /* PLL frequency: 150MHz: 1.2GBit */ ++ /* PLL frequency: 125MHz: 1.0GBit */ + if (xtal == HWTRAP_XTAL_40MHZ) +- ncpo1 = 0x0780; ++ ncpo1 = 0x0640; + if (xtal == HWTRAP_XTAL_25MHZ) + ncpo1 = 0x0a00; + } else { /* PLL frequency: 250MHz: 2.0Gbit */ +-- +2.39.2 + diff --git a/queue-6.1/net-dsa-mt7530-fix-network-connectivity-with-multipl.patch b/queue-6.1/net-dsa-mt7530-fix-network-connectivity-with-multipl.patch new file mode 100644 index 00000000000..c9781b9f8fb --- /dev/null +++ b/queue-6.1/net-dsa-mt7530-fix-network-connectivity-with-multipl.patch @@ -0,0 +1,78 @@ +From 0c9d0c4e3266ea148a647259d58f48eab6d7e0c1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 00:09:47 +0300 +Subject: net: dsa: mt7530: fix network connectivity with multiple CPU ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Arınç ÜNAL + +[ Upstream commit 120a56b01beed51ab5956a734adcfd2760307107 ] + +On mt753x_cpu_port_enable() there's code that enables flooding for the CPU +port only. Since mt753x_cpu_port_enable() runs twice when both CPU ports +are enabled, port 6 becomes the only port to forward the frames to. But +port 5 is the active port, so no frames received from the user ports will +be forwarded to port 5 which breaks network connectivity. + +Every bit of the BC_FFP, UNM_FFP, and UNU_FFP bits represents a port. Fix +this issue by setting the bit that corresponds to the CPU port without +overwriting the other bits. + +Clear the bits beforehand only for the MT7531 switch. According to the +documents MT7621 Giga Switch Programming Guide v0.3 and MT7531 Reference +Manual for Development Board v1.0, after reset, the BC_FFP, UNM_FFP, and +UNU_FFP bits are set to 1 for MT7531, 0 for MT7530. + +The commit 5e5502e012b8 ("net: dsa: mt7530: fix roaming from DSA user +ports") silently changed the method to set the bits on the MT7530_MFC. +Instead of clearing the relevant bits before mt7530_cpu_port_enable() +which runs under a for loop, the commit started doing it on +mt7530_cpu_port_enable(). + +Back then, this didn't really matter as only a single CPU port could be +used since the CPU port number was hardcoded. The driver was later changed +with commit 1f9a6abecf53 ("net: dsa: mt7530: get cpu-port via dp->cpu_dp +instead of constant") to retrieve the CPU port via dp->cpu_dp. With that, +this silent change became an issue for when using multiple CPU ports. + +Fixes: 5e5502e012b8 ("net: dsa: mt7530: fix roaming from DSA user ports") +Signed-off-by: Arınç ÜNAL +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mt7530.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c +index 4e63f14c42228..855220c5ce339 100644 +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1015,9 +1015,9 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) + mt7530_write(priv, MT7530_PVC_P(port), + PORT_SPEC_TAG); + +- /* Disable flooding by default */ +- mt7530_rmw(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | UNU_FFP_MASK, +- BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port))); ++ /* Enable flooding on the CPU port */ ++ mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | ++ UNU_FFP(BIT(port))); + + /* Set CPU port number */ + if (priv->id == ID_MT7621) +@@ -2331,6 +2331,10 @@ mt7531_setup_common(struct dsa_switch *ds) + /* Enable and reset MIB counters */ + mt7530_mib_reset(ds); + ++ /* Disable flooding on all ports */ ++ mt7530_clear(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | ++ UNU_FFP_MASK); ++ + for (i = 0; i < MT7530_NUM_PORTS; i++) { + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, +-- +2.39.2 + diff --git a/queue-6.1/net-dsa-mt7530-split-off-common-parts-from-mt7531_se.patch b/queue-6.1/net-dsa-mt7530-split-off-common-parts-from-mt7531_se.patch new file mode 100644 index 00000000000..619db83ac1d --- /dev/null +++ b/queue-6.1/net-dsa-mt7530-split-off-common-parts-from-mt7531_se.patch @@ -0,0 +1,154 @@ +From cdedf7f625f7428a3a7aeb03e809fe6456f2ab01 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Apr 2023 02:19:02 +0100 +Subject: net: dsa: mt7530: split-off common parts from mt7531_setup + +From: Daniel Golle + +[ Upstream commit 7f54cc9772ced2d76ac11832f0ada43798443ac9 ] + +MT7988 shares a significant part of the setup function with MT7531. +Split-off those parts into a shared function which is going to be used +also by mt7988_setup. + +Signed-off-by: Daniel Golle +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +Stable-dep-of: 120a56b01bee ("net: dsa: mt7530: fix network connectivity with multiple CPU ports") +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mt7530.c | 99 ++++++++++++++++++++++------------------ + 1 file changed, 55 insertions(+), 44 deletions(-) + +diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c +index 3ef92ac7815c1..4e63f14c42228 100644 +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2312,12 +2312,65 @@ mt7530_setup(struct dsa_switch *ds) + return 0; + } + ++static int ++mt7531_setup_common(struct dsa_switch *ds) ++{ ++ struct mt7530_priv *priv = ds->priv; ++ struct dsa_port *cpu_dp; ++ int ret, i; ++ ++ /* BPDU to CPU port */ ++ dsa_switch_for_each_cpu_port(cpu_dp, ds) { ++ mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, ++ BIT(cpu_dp->index)); ++ break; ++ } ++ mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, ++ MT753X_BPDU_CPU_ONLY); ++ ++ /* Enable and reset MIB counters */ ++ mt7530_mib_reset(ds); ++ ++ for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ /* Disable forwarding by default on all ports */ ++ mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, ++ PCR_MATRIX_CLR); ++ ++ /* Disable learning by default on all ports */ ++ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); ++ ++ mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); ++ ++ if (dsa_is_cpu_port(ds, i)) { ++ ret = mt753x_cpu_port_enable(ds, i); ++ if (ret) ++ return ret; ++ } else { ++ mt7530_port_disable(ds, i); ++ ++ /* Set default PVID to 0 on all user ports */ ++ mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, ++ G0_PORT_VID_DEF); ++ } ++ ++ /* Enable consistent egress tag */ ++ mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, ++ PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); ++ } ++ ++ /* Flush the FDB table */ ++ ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ + static int + mt7531_setup(struct dsa_switch *ds) + { + struct mt7530_priv *priv = ds->priv; + struct mt7530_dummy_poll p; +- struct dsa_port *cpu_dp; + u32 val, id; + int ret, i; + +@@ -2395,44 +2448,7 @@ mt7531_setup(struct dsa_switch *ds) + mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2, + CORE_PLL_GROUP4, val); + +- /* BPDU to CPU port */ +- dsa_switch_for_each_cpu_port(cpu_dp, ds) { +- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, +- BIT(cpu_dp->index)); +- break; +- } +- mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, +- MT753X_BPDU_CPU_ONLY); +- +- /* Enable and reset MIB counters */ +- mt7530_mib_reset(ds); +- +- for (i = 0; i < MT7530_NUM_PORTS; i++) { +- /* Disable forwarding by default on all ports */ +- mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, +- PCR_MATRIX_CLR); +- +- /* Disable learning by default on all ports */ +- mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); +- +- mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); +- +- if (dsa_is_cpu_port(ds, i)) { +- ret = mt753x_cpu_port_enable(ds, i); +- if (ret) +- return ret; +- } else { +- mt7530_port_disable(ds, i); +- +- /* Set default PVID to 0 on all user ports */ +- mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, +- G0_PORT_VID_DEF); +- } +- +- /* Enable consistent egress tag */ +- mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, +- PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); +- } ++ mt7531_setup_common(ds); + + /* Setup VLAN ID 0 for VLAN-unaware bridges */ + ret = mt7530_setup_vlan0(priv); +@@ -2442,11 +2458,6 @@ mt7531_setup(struct dsa_switch *ds) + ds->assisted_learning_on_cpu_port = true; + ds->mtu_enforcement_ingress = true; + +- /* Flush the FDB table */ +- ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); +- if (ret < 0) +- return ret; +- + return 0; + } + +-- +2.39.2 + diff --git a/queue-6.1/net-dsa-mv88e6xxx-add-mv88e6321-rsvd2cpu.patch b/queue-6.1/net-dsa-mv88e6xxx-add-mv88e6321-rsvd2cpu.patch new file mode 100644 index 00000000000..d5f92bb00ed --- /dev/null +++ b/queue-6.1/net-dsa-mv88e6xxx-add-mv88e6321-rsvd2cpu.patch @@ -0,0 +1,36 @@ +From 63ca50f808b372147784a551eeec27e0f6081837 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 22:28:15 +0200 +Subject: net: dsa: mv88e6xxx: add mv88e6321 rsvd2cpu + +From: Angelo Dureghello + +[ Upstream commit 6686317855c6997671982d4489ccdd946f644957 ] + +Add rsvd2cpu capability for mv88e6321 model, to allow proper bpdu +processing. + +Signed-off-by: Angelo Dureghello +Fixes: 51c901a775621 ("net: dsa: mv88e6xxx: distinguish Global 2 Rsvd2CPU") +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mv88e6xxx/chip.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c +index f1d9ee2a78b0f..12175195d3968 100644 +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -5109,6 +5109,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = { + .set_cpu_port = mv88e6095_g1_set_cpu_port, + .set_egress_port = mv88e6095_g1_set_egress_port, + .watchdog_ops = &mv88e6390_watchdog_ops, ++ .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu, + .reset = mv88e6352_g1_reset, + .vtu_getnext = mv88e6185_g1_vtu_getnext, + .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge, +-- +2.39.2 + diff --git a/queue-6.1/net-enetc-check-the-index-of-the-sfi-rather-than-the.patch b/queue-6.1/net-enetc-check-the-index-of-the-sfi-rather-than-the.patch new file mode 100644 index 00000000000..83878c9c8e7 --- /dev/null +++ b/queue-6.1/net-enetc-check-the-index-of-the-sfi-rather-than-the.patch @@ -0,0 +1,38 @@ +From cb08641b229fcfa9aab5934c672e25cb84a49f09 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 May 2023 16:03:59 +0800 +Subject: net: enetc: check the index of the SFI rather than the handle + +From: Wei Fang + +[ Upstream commit 299efdc2380aac588557f4d0b2ce7bee05bd0cf2 ] + +We should check whether the current SFI (Stream Filter Instance) table +is full before creating a new SFI entry. However, the previous logic +checks the handle by mistake and might lead to unpredictable behavior. + +Fixes: 888ae5a3952b ("net: enetc: add tc flower psfp offload driver") +Signed-off-by: Wei Fang +Reviewed-by: Leon Romanovsky +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/freescale/enetc/enetc_qos.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/freescale/enetc/enetc_qos.c b/drivers/net/ethernet/freescale/enetc/enetc_qos.c +index fcebb54224c09..a8539a8554a13 100644 +--- a/drivers/net/ethernet/freescale/enetc/enetc_qos.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc_qos.c +@@ -1255,7 +1255,7 @@ static int enetc_psfp_parse_clsflower(struct enetc_ndev_priv *priv, + int index; + + index = enetc_get_free_index(priv); +- if (sfi->handle < 0) { ++ if (index < 0) { + NL_SET_ERR_MSG_MOD(extack, "No Stream Filter resource!"); + err = -ENOSPC; + goto free_fmi; +-- +2.39.2 + diff --git a/queue-6.1/net-ipv6-fix-skb-hash-for-some-rst-packets.patch b/queue-6.1/net-ipv6-fix-skb-hash-for-some-rst-packets.patch new file mode 100644 index 00000000000..a7590382734 --- /dev/null +++ b/queue-6.1/net-ipv6-fix-skb-hash-for-some-rst-packets.patch @@ -0,0 +1,53 @@ +From 064ef4325d1575fc2b6829a3a1e6a3a78b7f7ed7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Apr 2023 11:21:59 +0200 +Subject: net: ipv6: fix skb hash for some RST packets + +From: Antoine Tenart + +[ Upstream commit dc6456e938e938d64ffb6383a286b2ac9790a37f ] + +The skb hash comes from sk->sk_txhash when using TCP, except for some +IPv6 RST packets. This is because in tcp_v6_send_reset when not in +TIME_WAIT the hash is taken from sk->sk_hash, while it should come from +sk->sk_txhash as those two hashes are not computed the same way. + +Packetdrill script to test the above, + + 0 socket(..., SOCK_STREAM, IPPROTO_TCP) = 3 + +0 fcntl(3, F_SETFL, O_RDWR|O_NONBLOCK) = 0 + +0 connect(3, ..., ...) = -1 EINPROGRESS (Operation now in progress) + + +0 > (flowlabel 0x1) S 0:0(0) <...> + + // Wrong ack seq, trigger a rst. + +0 < S. 0:0(0) ack 0 win 4000 + + // Check the flowlabel matches prior one from SYN. + +0 > (flowlabel 0x1) R 0:0(0) <...> + +Fixes: 9258b8b1be2e ("ipv6: tcp: send consistent autoflowlabel in RST packets") +Signed-off-by: Antoine Tenart +Reviewed-by: Eric Dumazet +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/ipv6/tcp_ipv6.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c +index c563a84d67b46..8d61efeab9c99 100644 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -1065,7 +1065,7 @@ static void tcp_v6_send_reset(const struct sock *sk, struct sk_buff *skb) + if (np->repflow) + label = ip6_flowlabel(ipv6h); + priority = sk->sk_priority; +- txhash = sk->sk_hash; ++ txhash = sk->sk_txhash; + } + if (sk->sk_state == TCP_TIME_WAIT) { + label = cpu_to_be32(inet_twsk(sk)->tw_flowlabel); +-- +2.39.2 + diff --git a/queue-6.1/net-ncsi-clear-tx-enable-mode-when-handling-a-config.patch b/queue-6.1/net-ncsi-clear-tx-enable-mode-when-handling-a-config.patch new file mode 100644 index 00000000000..09ac0ed05e8 --- /dev/null +++ b/queue-6.1/net-ncsi-clear-tx-enable-mode-when-handling-a-config.patch @@ -0,0 +1,41 @@ +From b46804f28843e18b2b0037dd09963920ac7b94a9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 16:13:50 +0800 +Subject: net/ncsi: clear Tx enable mode when handling a Config required AEN + +From: Cosmo Chou + +[ Upstream commit 6f75cd166a5a3c0bc50441faa8b8304f60522fdd ] + +ncsi_channel_is_tx() determines whether a given channel should be +used for Tx or not. However, when reconfiguring the channel by +handling a Configuration Required AEN, there is a misjudgment that +the channel Tx has already been enabled, which results in the Enable +Channel Network Tx command not being sent. + +Clear the channel Tx enable flag before reconfiguring the channel to +avoid the misjudgment. + +Fixes: 8d951a75d022 ("net/ncsi: Configure multi-package, multi-channel modes with failover") +Signed-off-by: Cosmo Chou +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/ncsi/ncsi-aen.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/net/ncsi/ncsi-aen.c b/net/ncsi/ncsi-aen.c +index b635c194f0a85..62fb1031763d1 100644 +--- a/net/ncsi/ncsi-aen.c ++++ b/net/ncsi/ncsi-aen.c +@@ -165,6 +165,7 @@ static int ncsi_aen_handler_cr(struct ncsi_dev_priv *ndp, + nc->state = NCSI_CHANNEL_INACTIVE; + list_add_tail_rcu(&nc->link, &ndp->channel_queue); + spin_unlock_irqrestore(&ndp->lock, flags); ++ nc->modes[NCSI_MODE_TX_ENABLE].enable = 0; + + return ncsi_process_next_channel(ndp); + } +-- +2.39.2 + diff --git a/queue-6.1/net-sched-act_mirred-add-carrier-check.patch b/queue-6.1/net-sched-act_mirred-add-carrier-check.patch new file mode 100644 index 00000000000..aedc66335b2 --- /dev/null +++ b/queue-6.1/net-sched-act_mirred-add-carrier-check.patch @@ -0,0 +1,49 @@ +From 36ae6dda69f15b6f756825f334d0195e2dcfc35e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 15:19:40 +0000 +Subject: net/sched: act_mirred: Add carrier check + +From: Victor Nogueira + +[ Upstream commit 526f28bd0fbdc699cda31426928802650c1528e5 ] + +There are cases where the device is adminstratively UP, but operationally +down. For example, we have a physical device (Nvidia ConnectX-6 Dx, 25Gbps) +who's cable was pulled out, here is its ip link output: + +5: ens2f1: mtu 1500 qdisc mq state DOWN mode DEFAULT group default qlen 1000 + link/ether b8:ce:f6:4b:68:35 brd ff:ff:ff:ff:ff:ff + altname enp179s0f1np1 + +As you can see, it's administratively UP but operationally down. +In this case, sending a packet to this port caused a nasty kernel hang (so +nasty that we were unable to capture it). Aborting a transmit based on +operational status (in addition to administrative status) fixes the issue. + +Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") +Acked-by: Jamal Hadi Salim +Signed-off-by: Victor Nogueira +v1->v2: Add fixes tag +v2->v3: Remove blank line between tags + add change log, suggested by Leon +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/sched/act_mirred.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/sched/act_mirred.c b/net/sched/act_mirred.c +index baeae5e5c8f0c..36395e5db3b40 100644 +--- a/net/sched/act_mirred.c ++++ b/net/sched/act_mirred.c +@@ -262,7 +262,7 @@ static int tcf_mirred_act(struct sk_buff *skb, const struct tc_action *a, + goto out; + } + +- if (unlikely(!(dev->flags & IFF_UP))) { ++ if (unlikely(!(dev->flags & IFF_UP)) || !netif_carrier_ok(dev)) { + net_notice_ratelimited("tc mirred to Houston: device %s is down\n", + dev->name); + goto out; +-- +2.39.2 + diff --git a/queue-6.1/net-sched-cls_api-remove-block_cb-from-driver_list-b.patch b/queue-6.1/net-sched-cls_api-remove-block_cb-from-driver_list-b.patch new file mode 100644 index 00000000000..c53541b28c6 --- /dev/null +++ b/queue-6.1/net-sched-cls_api-remove-block_cb-from-driver_list-b.patch @@ -0,0 +1,192 @@ +From 367ea6c02e3fbf8271f7a10a405f9b3c8bc3cd47 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 14:31:11 +0200 +Subject: net/sched: cls_api: remove block_cb from driver_list before freeing + +From: Vlad Buslov + +[ Upstream commit da94a7781fc3c92e7df7832bc2746f4d39bc624e ] + +Error handler of tcf_block_bind() frees the whole bo->cb_list on error. +However, by that time the flow_block_cb instances are already in the driver +list because driver ndo_setup_tc() callback is called before that up the +call chain in tcf_block_offload_cmd(). This leaves dangling pointers to +freed objects in the list and causes use-after-free[0]. Fix it by also +removing flow_block_cb instances from driver_list before deallocating them. + +[0]: +[ 279.868433] ================================================================== +[ 279.869964] BUG: KASAN: slab-use-after-free in flow_block_cb_setup_simple+0x631/0x7c0 +[ 279.871527] Read of size 8 at addr ffff888147e2bf20 by task tc/2963 + +[ 279.873151] CPU: 6 PID: 2963 Comm: tc Not tainted 6.3.0-rc6+ #4 +[ 279.874273] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014 +[ 279.876295] Call Trace: +[ 279.876882] +[ 279.877413] dump_stack_lvl+0x33/0x50 +[ 279.878198] print_report+0xc2/0x610 +[ 279.878987] ? flow_block_cb_setup_simple+0x631/0x7c0 +[ 279.879994] kasan_report+0xae/0xe0 +[ 279.880750] ? flow_block_cb_setup_simple+0x631/0x7c0 +[ 279.881744] ? mlx5e_tc_reoffload_flows_work+0x240/0x240 [mlx5_core] +[ 279.883047] flow_block_cb_setup_simple+0x631/0x7c0 +[ 279.884027] tcf_block_offload_cmd.isra.0+0x189/0x2d0 +[ 279.885037] ? tcf_block_setup+0x6b0/0x6b0 +[ 279.885901] ? mutex_lock+0x7d/0xd0 +[ 279.886669] ? __mutex_unlock_slowpath.constprop.0+0x2d0/0x2d0 +[ 279.887844] ? ingress_init+0x1c0/0x1c0 [sch_ingress] +[ 279.888846] tcf_block_get_ext+0x61c/0x1200 +[ 279.889711] ingress_init+0x112/0x1c0 [sch_ingress] +[ 279.890682] ? clsact_init+0x2b0/0x2b0 [sch_ingress] +[ 279.891701] qdisc_create+0x401/0xea0 +[ 279.892485] ? qdisc_tree_reduce_backlog+0x470/0x470 +[ 279.893473] tc_modify_qdisc+0x6f7/0x16d0 +[ 279.894344] ? tc_get_qdisc+0xac0/0xac0 +[ 279.895213] ? mutex_lock+0x7d/0xd0 +[ 279.896005] ? __mutex_lock_slowpath+0x10/0x10 +[ 279.896910] rtnetlink_rcv_msg+0x5fe/0x9d0 +[ 279.897770] ? rtnl_calcit.isra.0+0x2b0/0x2b0 +[ 279.898672] ? __sys_sendmsg+0xb5/0x140 +[ 279.899494] ? do_syscall_64+0x3d/0x90 +[ 279.900302] ? entry_SYSCALL_64_after_hwframe+0x46/0xb0 +[ 279.901337] ? kasan_save_stack+0x2e/0x40 +[ 279.902177] ? kasan_save_stack+0x1e/0x40 +[ 279.903058] ? kasan_set_track+0x21/0x30 +[ 279.903913] ? kasan_save_free_info+0x2a/0x40 +[ 279.904836] ? ____kasan_slab_free+0x11a/0x1b0 +[ 279.905741] ? kmem_cache_free+0x179/0x400 +[ 279.906599] netlink_rcv_skb+0x12c/0x360 +[ 279.907450] ? rtnl_calcit.isra.0+0x2b0/0x2b0 +[ 279.908360] ? netlink_ack+0x1550/0x1550 +[ 279.909192] ? rhashtable_walk_peek+0x170/0x170 +[ 279.910135] ? kmem_cache_alloc_node+0x1af/0x390 +[ 279.911086] ? _copy_from_iter+0x3d6/0xc70 +[ 279.912031] netlink_unicast+0x553/0x790 +[ 279.912864] ? netlink_attachskb+0x6a0/0x6a0 +[ 279.913763] ? netlink_recvmsg+0x416/0xb50 +[ 279.914627] netlink_sendmsg+0x7a1/0xcb0 +[ 279.915473] ? netlink_unicast+0x790/0x790 +[ 279.916334] ? iovec_from_user.part.0+0x4d/0x220 +[ 279.917293] ? netlink_unicast+0x790/0x790 +[ 279.918159] sock_sendmsg+0xc5/0x190 +[ 279.918938] ____sys_sendmsg+0x535/0x6b0 +[ 279.919813] ? import_iovec+0x7/0x10 +[ 279.920601] ? kernel_sendmsg+0x30/0x30 +[ 279.921423] ? __copy_msghdr+0x3c0/0x3c0 +[ 279.922254] ? import_iovec+0x7/0x10 +[ 279.923041] ___sys_sendmsg+0xeb/0x170 +[ 279.923854] ? copy_msghdr_from_user+0x110/0x110 +[ 279.924797] ? ___sys_recvmsg+0xd9/0x130 +[ 279.925630] ? __perf_event_task_sched_in+0x183/0x470 +[ 279.926656] ? ___sys_sendmsg+0x170/0x170 +[ 279.927529] ? ctx_sched_in+0x530/0x530 +[ 279.928369] ? update_curr+0x283/0x4f0 +[ 279.929185] ? perf_event_update_userpage+0x570/0x570 +[ 279.930201] ? __fget_light+0x57/0x520 +[ 279.931023] ? __switch_to+0x53d/0xe70 +[ 279.931846] ? sockfd_lookup_light+0x1a/0x140 +[ 279.932761] __sys_sendmsg+0xb5/0x140 +[ 279.933560] ? __sys_sendmsg_sock+0x20/0x20 +[ 279.934436] ? fpregs_assert_state_consistent+0x1d/0xa0 +[ 279.935490] do_syscall_64+0x3d/0x90 +[ 279.936300] entry_SYSCALL_64_after_hwframe+0x46/0xb0 +[ 279.937311] RIP: 0033:0x7f21c814f887 +[ 279.938085] Code: 0a 00 f7 d8 64 89 02 48 c7 c0 ff ff ff ff eb b9 0f 1f 00 f3 0f 1e fa 64 8b 04 25 18 00 00 00 85 c0 75 10 b8 2e 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 51 c3 48 83 ec 28 89 54 24 1c 48 89 74 24 10 +[ 279.941448] RSP: 002b:00007fff11efd478 EFLAGS: 00000246 ORIG_RAX: 000000000000002e +[ 279.942964] RAX: ffffffffffffffda RBX: 0000000064401979 RCX: 00007f21c814f887 +[ 279.944337] RDX: 0000000000000000 RSI: 00007fff11efd4e0 RDI: 0000000000000003 +[ 279.945660] RBP: 0000000000000000 R08: 0000000000000001 R09: 0000000000000000 +[ 279.947003] R10: 00007f21c8008708 R11: 0000000000000246 R12: 0000000000000001 +[ 279.948345] R13: 0000000000409980 R14: 000000000047e538 R15: 0000000000485400 +[ 279.949690] + +[ 279.950706] Allocated by task 2960: +[ 279.951471] kasan_save_stack+0x1e/0x40 +[ 279.952338] kasan_set_track+0x21/0x30 +[ 279.953165] __kasan_kmalloc+0x77/0x90 +[ 279.954006] flow_block_cb_setup_simple+0x3dd/0x7c0 +[ 279.955001] tcf_block_offload_cmd.isra.0+0x189/0x2d0 +[ 279.956020] tcf_block_get_ext+0x61c/0x1200 +[ 279.956881] ingress_init+0x112/0x1c0 [sch_ingress] +[ 279.957873] qdisc_create+0x401/0xea0 +[ 279.958656] tc_modify_qdisc+0x6f7/0x16d0 +[ 279.959506] rtnetlink_rcv_msg+0x5fe/0x9d0 +[ 279.960392] netlink_rcv_skb+0x12c/0x360 +[ 279.961216] netlink_unicast+0x553/0x790 +[ 279.962044] netlink_sendmsg+0x7a1/0xcb0 +[ 279.962906] sock_sendmsg+0xc5/0x190 +[ 279.963702] ____sys_sendmsg+0x535/0x6b0 +[ 279.964534] ___sys_sendmsg+0xeb/0x170 +[ 279.965343] __sys_sendmsg+0xb5/0x140 +[ 279.966132] do_syscall_64+0x3d/0x90 +[ 279.966908] entry_SYSCALL_64_after_hwframe+0x46/0xb0 + +[ 279.968407] Freed by task 2960: +[ 279.969114] kasan_save_stack+0x1e/0x40 +[ 279.969929] kasan_set_track+0x21/0x30 +[ 279.970729] kasan_save_free_info+0x2a/0x40 +[ 279.971603] ____kasan_slab_free+0x11a/0x1b0 +[ 279.972483] __kmem_cache_free+0x14d/0x280 +[ 279.973337] tcf_block_setup+0x29d/0x6b0 +[ 279.974173] tcf_block_offload_cmd.isra.0+0x226/0x2d0 +[ 279.975186] tcf_block_get_ext+0x61c/0x1200 +[ 279.976080] ingress_init+0x112/0x1c0 [sch_ingress] +[ 279.977065] qdisc_create+0x401/0xea0 +[ 279.977857] tc_modify_qdisc+0x6f7/0x16d0 +[ 279.978695] rtnetlink_rcv_msg+0x5fe/0x9d0 +[ 279.979562] netlink_rcv_skb+0x12c/0x360 +[ 279.980388] netlink_unicast+0x553/0x790 +[ 279.981214] netlink_sendmsg+0x7a1/0xcb0 +[ 279.982043] sock_sendmsg+0xc5/0x190 +[ 279.982827] ____sys_sendmsg+0x535/0x6b0 +[ 279.983703] ___sys_sendmsg+0xeb/0x170 +[ 279.984510] __sys_sendmsg+0xb5/0x140 +[ 279.985298] do_syscall_64+0x3d/0x90 +[ 279.986076] entry_SYSCALL_64_after_hwframe+0x46/0xb0 + +[ 279.987532] The buggy address belongs to the object at ffff888147e2bf00 + which belongs to the cache kmalloc-192 of size 192 +[ 279.989747] The buggy address is located 32 bytes inside of + freed 192-byte region [ffff888147e2bf00, ffff888147e2bfc0) + +[ 279.992367] The buggy address belongs to the physical page: +[ 279.993430] page:00000000550f405c refcount:1 mapcount:0 mapping:0000000000000000 index:0x0 pfn:0x147e2a +[ 279.995182] head:00000000550f405c order:1 entire_mapcount:0 nr_pages_mapped:0 pincount:0 +[ 279.996713] anon flags: 0x200000000010200(slab|head|node=0|zone=2) +[ 279.997878] raw: 0200000000010200 ffff888100042a00 0000000000000000 dead000000000001 +[ 279.999384] raw: 0000000000000000 0000000000200020 00000001ffffffff 0000000000000000 +[ 280.000894] page dumped because: kasan: bad access detected + +[ 280.002386] Memory state around the buggy address: +[ 280.003338] ffff888147e2be00: fa fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb +[ 280.004781] ffff888147e2be80: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc +[ 280.006224] >ffff888147e2bf00: fa fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb +[ 280.007700] ^ +[ 280.008592] ffff888147e2bf80: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc +[ 280.010035] ffff888147e2c000: fa fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb +[ 280.011564] ================================================================== + +Fixes: 59094b1e5094 ("net: sched: use flow block API") +Signed-off-by: Vlad Buslov +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/sched/cls_api.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/net/sched/cls_api.c b/net/sched/cls_api.c +index 50566db45949b..7b2aa04a7cdfd 100644 +--- a/net/sched/cls_api.c ++++ b/net/sched/cls_api.c +@@ -1483,6 +1483,7 @@ static int tcf_block_bind(struct tcf_block *block, + + err_unroll: + list_for_each_entry_safe(block_cb, next, &bo->cb_list, list) { ++ list_del(&block_cb->driver_list); + if (i-- > 0) { + list_del(&block_cb->list); + tcf_block_playback_offloads(block, block_cb->cb, +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-allow-mkex-profile-without-dmac-and-add.patch b/queue-6.1/octeontx2-af-allow-mkex-profile-without-dmac-and-add.patch new file mode 100644 index 00000000000..89d2a7988eb --- /dev/null +++ b/queue-6.1/octeontx2-af-allow-mkex-profile-without-dmac-and-add.patch @@ -0,0 +1,242 @@ +From 372b8dd86e339bcc49163ba9d3735c6243d3703b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 31 Oct 2022 14:38:56 +0530 +Subject: octeontx2-af: Allow mkex profile without DMAC and add L2M/L2B header + extraction support + +From: Suman Ghosh + +[ Upstream commit 2cee6401c4eaa562abc1d437d5d03e80bbee79c1 ] + +1. It is possible to have custom mkex profiles which do not extract +DMAC at all into the key. Hence allow mkex profiles which do not +have DMAC to be loaded into MCAM hardware. This patch also adds +debugging prints needed to identify profiles with wrong +configuration. + +2. If a mkex profile set "l2l3mb" field for Rx interface, +then Rx multicast and broadcast entry should be configured. + +Signed-off-by: Suman Ghosh +Link: https://lore.kernel.org/r/20221031090856.1404303-1-sumang@marvell.com +Signed-off-by: Jakub Kicinski +Stable-dep-of: 406bed11fb91 ("octeontx2-af: Update/Fix NPC field hash extract feature") +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/af/npc.h | 1 + + .../marvell/octeontx2/af/rvu_debugfs.c | 6 ++ + .../marvell/octeontx2/af/rvu_npc_fs.c | 81 ++++++++++++++----- + 3 files changed, 70 insertions(+), 18 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h +index f187293e3e084..d027c23b8ef8e 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h +@@ -620,6 +620,7 @@ struct rvu_npc_mcam_rule { + bool vfvlan_cfg; + u16 chan; + u16 chan_mask; ++ u8 lxmb; + }; + + #endif /* NPC_H */ +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c +index 0cab27448399c..aadc352c2ffbd 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c +@@ -2759,6 +2759,12 @@ static void rvu_dbg_npc_mcam_show_flows(struct seq_file *s, + for_each_set_bit(bit, (unsigned long *)&rule->features, 64) { + seq_printf(s, "\t%s ", npc_get_field_name(bit)); + switch (bit) { ++ case NPC_LXMB: ++ if (rule->lxmb == 1) ++ seq_puts(s, "\tL2M nibble is set\n"); ++ else ++ seq_puts(s, "\tL2B nibble is set\n"); ++ break; + case NPC_DMAC: + seq_printf(s, "%pM ", rule->packet.dmac); + seq_printf(s, "mask %pM\n", rule->mask.dmac); +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +index 67c85382eef62..282d85846647a 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +@@ -43,6 +43,7 @@ static const char * const npc_flow_names[] = { + [NPC_DPORT_UDP] = "udp destination port", + [NPC_SPORT_SCTP] = "sctp source port", + [NPC_DPORT_SCTP] = "sctp destination port", ++ [NPC_LXMB] = "Mcast/Bcast header ", + [NPC_UNKNOWN] = "unknown", + }; + +@@ -340,8 +341,10 @@ static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf) + vlan_tag2 = &key_fields[NPC_VLAN_TAG2]; + + /* if key profile programmed does not extract Ethertype at all */ +- if (!etype_ether->nr_kws && !etype_tag1->nr_kws && !etype_tag2->nr_kws) ++ if (!etype_ether->nr_kws && !etype_tag1->nr_kws && !etype_tag2->nr_kws) { ++ dev_err(rvu->dev, "mkex: Ethertype is not extracted.\n"); + goto vlan_tci; ++ } + + /* if key profile programmed extracts Ethertype from one layer */ + if (etype_ether->nr_kws && !etype_tag1->nr_kws && !etype_tag2->nr_kws) +@@ -354,35 +357,45 @@ static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf) + /* if key profile programmed extracts Ethertype from multiple layers */ + if (etype_ether->nr_kws && etype_tag1->nr_kws) { + for (i = 0; i < NPC_MAX_KWS_IN_KEY; i++) { +- if (etype_ether->kw_mask[i] != etype_tag1->kw_mask[i]) ++ if (etype_ether->kw_mask[i] != etype_tag1->kw_mask[i]) { ++ dev_err(rvu->dev, "mkex: Etype pos is different for untagged and tagged pkts.\n"); + goto vlan_tci; ++ } + } + key_fields[NPC_ETYPE] = *etype_tag1; + } + if (etype_ether->nr_kws && etype_tag2->nr_kws) { + for (i = 0; i < NPC_MAX_KWS_IN_KEY; i++) { +- if (etype_ether->kw_mask[i] != etype_tag2->kw_mask[i]) ++ if (etype_ether->kw_mask[i] != etype_tag2->kw_mask[i]) { ++ dev_err(rvu->dev, "mkex: Etype pos is different for untagged and double tagged pkts.\n"); + goto vlan_tci; ++ } + } + key_fields[NPC_ETYPE] = *etype_tag2; + } + if (etype_tag1->nr_kws && etype_tag2->nr_kws) { + for (i = 0; i < NPC_MAX_KWS_IN_KEY; i++) { +- if (etype_tag1->kw_mask[i] != etype_tag2->kw_mask[i]) ++ if (etype_tag1->kw_mask[i] != etype_tag2->kw_mask[i]) { ++ dev_err(rvu->dev, "mkex: Etype pos is different for tagged and double tagged pkts.\n"); + goto vlan_tci; ++ } + } + key_fields[NPC_ETYPE] = *etype_tag2; + } + + /* check none of higher layers overwrite Ethertype */ + start_lid = key_fields[NPC_ETYPE].layer_mdata.lid + 1; +- if (npc_check_overlap(rvu, blkaddr, NPC_ETYPE, start_lid, intf)) ++ if (npc_check_overlap(rvu, blkaddr, NPC_ETYPE, start_lid, intf)) { ++ dev_err(rvu->dev, "mkex: Ethertype is overwritten by higher layers.\n"); + goto vlan_tci; ++ } + *features |= BIT_ULL(NPC_ETYPE); + vlan_tci: + /* if key profile does not extract outer vlan tci at all */ +- if (!vlan_tag1->nr_kws && !vlan_tag2->nr_kws) ++ if (!vlan_tag1->nr_kws && !vlan_tag2->nr_kws) { ++ dev_err(rvu->dev, "mkex: Outer vlan tci is not extracted.\n"); + goto done; ++ } + + /* if key profile extracts outer vlan tci from one layer */ + if (vlan_tag1->nr_kws && !vlan_tag2->nr_kws) +@@ -393,15 +406,19 @@ static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf) + /* if key profile extracts outer vlan tci from multiple layers */ + if (vlan_tag1->nr_kws && vlan_tag2->nr_kws) { + for (i = 0; i < NPC_MAX_KWS_IN_KEY; i++) { +- if (vlan_tag1->kw_mask[i] != vlan_tag2->kw_mask[i]) ++ if (vlan_tag1->kw_mask[i] != vlan_tag2->kw_mask[i]) { ++ dev_err(rvu->dev, "mkex: Out vlan tci pos is different for tagged and double tagged pkts.\n"); + goto done; ++ } + } + key_fields[NPC_OUTER_VID] = *vlan_tag2; + } + /* check none of higher layers overwrite outer vlan tci */ + start_lid = key_fields[NPC_OUTER_VID].layer_mdata.lid + 1; +- if (npc_check_overlap(rvu, blkaddr, NPC_OUTER_VID, start_lid, intf)) ++ if (npc_check_overlap(rvu, blkaddr, NPC_OUTER_VID, start_lid, intf)) { ++ dev_err(rvu->dev, "mkex: Outer vlan tci is overwritten by higher layers.\n"); + goto done; ++ } + *features |= BIT_ULL(NPC_OUTER_VID); + done: + return; +@@ -522,6 +539,10 @@ static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf) + if (npc_check_field(rvu, blkaddr, NPC_LB, intf)) + *features |= BIT_ULL(NPC_VLAN_ETYPE_CTAG) | + BIT_ULL(NPC_VLAN_ETYPE_STAG); ++ ++ /* for L2M/L2B/L3M/L3B, check if the type is present in the key */ ++ if (npc_check_field(rvu, blkaddr, NPC_LXMB, intf)) ++ *features |= BIT_ULL(NPC_LXMB); + } + + /* Scan key extraction profile and record how fields of our interest +@@ -598,16 +619,6 @@ static int npc_scan_verify_kex(struct rvu *rvu, int blkaddr) + dev_err(rvu->dev, "Channel cannot be overwritten\n"); + return -EINVAL; + } +- /* DMAC should be present in key for unicast filter to work */ +- if (!npc_is_field_present(rvu, NPC_DMAC, NIX_INTF_RX)) { +- dev_err(rvu->dev, "DMAC not present in Key\n"); +- return -EINVAL; +- } +- /* check that none of the fields overwrite DMAC */ +- if (npc_check_overlap(rvu, blkaddr, NPC_DMAC, 0, NIX_INTF_RX)) { +- dev_err(rvu->dev, "DMAC cannot be overwritten\n"); +- return -EINVAL; +- } + + npc_set_features(rvu, blkaddr, NIX_INTF_TX); + npc_set_features(rvu, blkaddr, NIX_INTF_RX); +@@ -850,6 +861,11 @@ static void npc_update_flow(struct rvu *rvu, struct mcam_entry *entry, + npc_update_entry(rvu, NPC_LE, entry, NPC_LT_LE_ESP, + 0, ~0ULL, 0, intf); + ++ if (features & BIT_ULL(NPC_LXMB)) { ++ output->lxmb = is_broadcast_ether_addr(pkt->dmac) ? 2 : 1; ++ npc_update_entry(rvu, NPC_LXMB, entry, output->lxmb, 0, ++ output->lxmb, 0, intf); ++ } + #define NPC_WRITE_FLOW(field, member, val_lo, val_hi, mask_lo, mask_hi) \ + do { \ + if (features & BIT_ULL((field))) { \ +@@ -1152,6 +1168,7 @@ static int npc_install_flow(struct rvu *rvu, int blkaddr, u16 target, + rule->chan_mask = write_req.entry_data.kw_mask[0] & NPC_KEX_CHAN_MASK; + rule->chan = write_req.entry_data.kw[0] & NPC_KEX_CHAN_MASK; + rule->chan &= rule->chan_mask; ++ rule->lxmb = dummy.lxmb; + if (is_npc_intf_tx(req->intf)) + rule->intf = pfvf->nix_tx_intf; + else +@@ -1214,6 +1231,34 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu, + if (!is_npc_interface_valid(rvu, req->intf)) + return NPC_FLOW_INTF_INVALID; + ++ /* If DMAC is not extracted in MKEX, rules installed by AF ++ * can rely on L2MB bit set by hardware protocol checker for ++ * broadcast and multicast addresses. ++ */ ++ if (npc_check_field(rvu, blkaddr, NPC_DMAC, req->intf)) ++ goto process_flow; ++ ++ if (is_pffunc_af(req->hdr.pcifunc)) { ++ if (is_unicast_ether_addr(req->packet.dmac)) { ++ dev_err(rvu->dev, ++ "%s: mkex profile does not support ucast flow\n", ++ __func__); ++ return NPC_FLOW_NOT_SUPPORTED; ++ } ++ ++ if (!npc_is_field_present(rvu, NPC_LXMB, req->intf)) { ++ dev_err(rvu->dev, ++ "%s: mkex profile does not support bcast/mcast flow", ++ __func__); ++ return NPC_FLOW_NOT_SUPPORTED; ++ } ++ ++ /* Modify feature to use LXMB instead of DMAC */ ++ req->features &= ~BIT_ULL(NPC_DMAC); ++ req->features |= BIT_ULL(NPC_LXMB); ++ } ++ ++process_flow: + if (from_vf && req->default_rule) + return NPC_FLOW_VF_PERM_DENIED; + +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-fix-depth-of-cam-and-mem-table.patch b/queue-6.1/octeontx2-af-fix-depth-of-cam-and-mem-table.patch new file mode 100644 index 00000000000..ca745bc0e5b --- /dev/null +++ b/queue-6.1/octeontx2-af-fix-depth-of-cam-and-mem-table.patch @@ -0,0 +1,43 @@ +From 1c159bc925a06906290a470ec61caf6411b25aef Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:36 +0530 +Subject: octeontx2-af: Fix depth of cam and mem table. + +From: Ratheesh Kannoth + +[ Upstream commit 60999cb83554ebcf6cfff8894bc2c3d99ea858ba ] + +In current driver, NPC cam and mem table sizes are read from wrong +register offset. This patch fixes the register offset so that correct +values are populated on read. + +Fixes: b747923afff8 ("octeontx2-af: Exact match support") +Signed-off-by: Ratheesh Kannoth +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +index 594029007f85d..5aed3dbf3b991 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +@@ -1879,9 +1879,9 @@ int rvu_npc_exact_init(struct rvu *rvu) + rvu->hw->table = table; + + /* Read table size, ways and depth */ +- table->mem_table.depth = FIELD_GET(GENMASK_ULL(31, 24), npc_const3); + table->mem_table.ways = FIELD_GET(GENMASK_ULL(19, 16), npc_const3); +- table->cam_table.depth = FIELD_GET(GENMASK_ULL(15, 0), npc_const3); ++ table->mem_table.depth = FIELD_GET(GENMASK_ULL(15, 0), npc_const3); ++ table->cam_table.depth = FIELD_GET(GENMASK_ULL(31, 24), npc_const3); + + dev_dbg(rvu->dev, "%s: NPC exact match 4way_2k table(ways=%d, depth=%d)\n", + __func__, table->mem_table.ways, table->cam_table.depth); +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-fix-issues-with-npc-field-hash-extract.patch b/queue-6.1/octeontx2-af-fix-issues-with-npc-field-hash-extract.patch new file mode 100644 index 00000000000..487a37f5cf1 --- /dev/null +++ b/queue-6.1/octeontx2-af-fix-issues-with-npc-field-hash-extract.patch @@ -0,0 +1,273 @@ +From 5303cdaea6466ea9441c38b682073f9c5e7f9450 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:41 +0530 +Subject: octeontx2-af: Fix issues with NPC field hash extract + +From: Ratheesh Kannoth + +[ Upstream commit f66155905959076619c9c519fb099e8ae6cb6f7b ] + +1. Allow field hash configuration for both source and destination IPv6. +2. Configure hardware parser based on hash extract feature enable flag + for IPv6. +3. Fix IPv6 endianness issue while updating the source/destination IP + address via ntuple rule. + +Fixes: 56d9f5fd2246 ("octeontx2-af: Use hashed field in MCAM key") +Signed-off-by: Ratheesh Kannoth +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../marvell/octeontx2/af/rvu_npc_fs.c | 23 +++-- + .../marvell/octeontx2/af/rvu_npc_fs.h | 4 + + .../marvell/octeontx2/af/rvu_npc_hash.c | 88 ++++++++++--------- + .../marvell/octeontx2/af/rvu_npc_hash.h | 4 +- + 4 files changed, 69 insertions(+), 50 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +index 0a3b591c1ef5a..1eb5eb29a2ba6 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +@@ -13,11 +13,6 @@ + #include "rvu_npc_fs.h" + #include "rvu_npc_hash.h" + +-#define NPC_BYTESM GENMASK_ULL(19, 16) +-#define NPC_HDR_OFFSET GENMASK_ULL(15, 8) +-#define NPC_KEY_OFFSET GENMASK_ULL(5, 0) +-#define NPC_LDATA_EN BIT_ULL(7) +- + static const char * const npc_flow_names[] = { + [NPC_DMAC] = "dmac", + [NPC_SMAC] = "smac", +@@ -440,6 +435,7 @@ static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf) + static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid, + u8 lt, u64 cfg, u8 intf) + { ++ struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash; + struct npc_mcam *mcam = &rvu->hw->mcam; + u8 hdr, key, nr_bytes, bit_offset; + u8 la_ltype, la_start; +@@ -486,8 +482,21 @@ do { \ + NPC_SCAN_HDR(NPC_TOS, NPC_LID_LC, NPC_LT_LC_IP, 1, 1); + NPC_SCAN_HDR(NPC_SIP_IPV4, NPC_LID_LC, NPC_LT_LC_IP, 12, 4); + NPC_SCAN_HDR(NPC_DIP_IPV4, NPC_LID_LC, NPC_LT_LC_IP, 16, 4); +- NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16); +- NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16); ++ if (rvu->hw->cap.npc_hash_extract) { ++ if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][0]) ++ NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 4); ++ else ++ NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16); ++ ++ if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][1]) ++ NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 4); ++ else ++ NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16); ++ } else { ++ NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16); ++ NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16); ++ } ++ + NPC_SCAN_HDR(NPC_SPORT_UDP, NPC_LID_LD, NPC_LT_LD_UDP, 0, 2); + NPC_SCAN_HDR(NPC_DPORT_UDP, NPC_LID_LD, NPC_LT_LD_UDP, 2, 2); + NPC_SCAN_HDR(NPC_SPORT_TCP, NPC_LID_LD, NPC_LT_LD_TCP, 0, 2); +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h +index bdd65ce56a32d..3f5c9042d10e7 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h +@@ -9,6 +9,10 @@ + #define __RVU_NPC_FS_H + + #define IPV6_WORDS 4 ++#define NPC_BYTESM GENMASK_ULL(19, 16) ++#define NPC_HDR_OFFSET GENMASK_ULL(15, 8) ++#define NPC_KEY_OFFSET GENMASK_ULL(5, 0) ++#define NPC_LDATA_EN BIT_ULL(7) + + void npc_update_entry(struct rvu *rvu, enum key_fields type, + struct mcam_entry *entry, u64 val_lo, +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +index 18f12f9156544..3182adb7b9a80 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +@@ -78,42 +78,43 @@ static u32 rvu_npc_toeplitz_hash(const u64 *data, u64 *key, size_t data_bit_len, + return hash_out; + } + +-u32 npc_field_hash_calc(u64 *ldata, struct npc_mcam_kex_hash *mkex_hash, +- u64 *secret_key, u8 intf, u8 hash_idx) ++u32 npc_field_hash_calc(u64 *ldata, struct npc_get_field_hash_info_rsp rsp, ++ u8 intf, u8 hash_idx) + { + u64 hash_key[3]; + u64 data_padded[2]; + u32 field_hash; + +- hash_key[0] = secret_key[1] << 31; +- hash_key[0] |= secret_key[2]; +- hash_key[1] = secret_key[1] >> 33; +- hash_key[1] |= secret_key[0] << 31; +- hash_key[2] = secret_key[0] >> 33; ++ hash_key[0] = rsp.secret_key[1] << 31; ++ hash_key[0] |= rsp.secret_key[2]; ++ hash_key[1] = rsp.secret_key[1] >> 33; ++ hash_key[1] |= rsp.secret_key[0] << 31; ++ hash_key[2] = rsp.secret_key[0] >> 33; + +- data_padded[0] = mkex_hash->hash_mask[intf][hash_idx][0] & ldata[0]; +- data_padded[1] = mkex_hash->hash_mask[intf][hash_idx][1] & ldata[1]; ++ data_padded[0] = rsp.hash_mask[intf][hash_idx][0] & ldata[0]; ++ data_padded[1] = rsp.hash_mask[intf][hash_idx][1] & ldata[1]; + field_hash = rvu_npc_toeplitz_hash(data_padded, hash_key, 128, 159); + +- field_hash &= mkex_hash->hash_ctrl[intf][hash_idx] >> 32; +- field_hash |= mkex_hash->hash_ctrl[intf][hash_idx]; ++ field_hash &= FIELD_GET(GENMASK(63, 32), rsp.hash_ctrl[intf][hash_idx]); ++ field_hash += FIELD_GET(GENMASK(31, 0), rsp.hash_ctrl[intf][hash_idx]); + return field_hash; + } + +-static u64 npc_update_use_hash(int lt, int ld) ++static u64 npc_update_use_hash(struct rvu *rvu, int blkaddr, ++ u8 intf, int lid, int lt, int ld) + { +- u64 cfg = 0; +- +- switch (lt) { +- case NPC_LT_LC_IP6: +- /* Update use_hash(bit-20) and bytesm1 (bit-16:19) +- * in KEX_LD_CFG +- */ +- cfg = KEX_LD_CFG_USE_HASH(0x1, 0x03, +- ld ? 0x18 : 0x8, +- 0x1, 0x0, ld ? 0x14 : 0x10); +- break; +- } ++ u8 hdr, key; ++ u64 cfg; ++ ++ cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld)); ++ hdr = FIELD_GET(NPC_HDR_OFFSET, cfg); ++ key = FIELD_GET(NPC_KEY_OFFSET, cfg); ++ ++ /* Update use_hash(bit-20) to 'true' and ++ * bytesm1(bit-16:19) to '0x3' in KEX_LD_CFG ++ */ ++ cfg = KEX_LD_CFG_USE_HASH(0x1, 0x03, ++ hdr, 0x1, 0x0, key); + + return cfg; + } +@@ -132,11 +133,13 @@ static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr, + for (lt = 0; lt < NPC_MAX_LT; lt++) { + for (ld = 0; ld < NPC_MAX_LD; ld++) { + if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][ld]) { +- u64 cfg = npc_update_use_hash(lt, ld); ++ u64 cfg; + + if (hash_cnt == NPC_MAX_HASH) + return; + ++ cfg = npc_update_use_hash(rvu, blkaddr, ++ intf, lid, lt, ld); + /* Set updated KEX configuration */ + SET_KEX_LD(intf, lid, lt, ld, cfg); + /* Set HASH configuration */ +@@ -170,11 +173,13 @@ static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr, + for (lt = 0; lt < NPC_MAX_LT; lt++) { + for (ld = 0; ld < NPC_MAX_LD; ld++) + if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][ld]) { +- u64 cfg = npc_update_use_hash(lt, ld); ++ u64 cfg; + + if (hash_cnt == NPC_MAX_HASH) + return; + ++ cfg = npc_update_use_hash(rvu, blkaddr, ++ intf, lid, lt, ld); + /* Set updated KEX configuration */ + SET_KEX_LD(intf, lid, lt, ld, cfg); + /* Set HASH configuration */ +@@ -268,44 +273,45 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, + * is hashed to 32 bit value. + */ + case NPC_LT_LC_IP6: +- if (features & BIT_ULL(NPC_SIP_IPV6)) { ++ /* ld[0] == hash_idx[0] == Source IPv6 ++ * ld[1] == hash_idx[1] == Destination IPv6 ++ */ ++ if ((features & BIT_ULL(NPC_SIP_IPV6)) && !hash_idx) { + u32 src_ip[IPV6_WORDS]; + + be32_to_cpu_array(src_ip, pkt->ip6src, IPV6_WORDS); +- ldata[0] = (u64)src_ip[0] << 32 | src_ip[1]; +- ldata[1] = (u64)src_ip[2] << 32 | src_ip[3]; ++ ldata[1] = (u64)src_ip[0] << 32 | src_ip[1]; ++ ldata[0] = (u64)src_ip[2] << 32 | src_ip[3]; + field_hash = npc_field_hash_calc(ldata, +- mkex_hash, +- rsp.secret_key, ++ rsp, + intf, + hash_idx); + npc_update_entry(rvu, NPC_SIP_IPV6, entry, +- field_hash, 0, 32, 0, intf); ++ field_hash, 0, ++ GENMASK(31, 0), 0, intf); + memcpy(&opkt->ip6src, &pkt->ip6src, + sizeof(pkt->ip6src)); + memcpy(&omask->ip6src, &mask->ip6src, + sizeof(mask->ip6src)); +- break; +- } +- +- if (features & BIT_ULL(NPC_DIP_IPV6)) { ++ } else if ((features & BIT_ULL(NPC_DIP_IPV6)) && hash_idx) { + u32 dst_ip[IPV6_WORDS]; + + be32_to_cpu_array(dst_ip, pkt->ip6dst, IPV6_WORDS); +- ldata[0] = (u64)dst_ip[0] << 32 | dst_ip[1]; +- ldata[1] = (u64)dst_ip[2] << 32 | dst_ip[3]; ++ ldata[1] = (u64)dst_ip[0] << 32 | dst_ip[1]; ++ ldata[0] = (u64)dst_ip[2] << 32 | dst_ip[3]; + field_hash = npc_field_hash_calc(ldata, +- mkex_hash, +- rsp.secret_key, ++ rsp, + intf, + hash_idx); + npc_update_entry(rvu, NPC_DIP_IPV6, entry, +- field_hash, 0, 32, 0, intf); ++ field_hash, 0, ++ GENMASK(31, 0), 0, intf); + memcpy(&opkt->ip6dst, &pkt->ip6dst, + sizeof(pkt->ip6dst)); + memcpy(&omask->ip6dst, &mask->ip6dst, + sizeof(mask->ip6dst)); + } ++ + break; + } + } +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +index 65936f4aeaacf..a1c3d987b8044 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +@@ -62,8 +62,8 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, + struct flow_msg *omask); + void npc_config_secret_key(struct rvu *rvu, int blkaddr); + void npc_program_mkex_hash(struct rvu *rvu, int blkaddr); +-u32 npc_field_hash_calc(u64 *ldata, struct npc_mcam_kex_hash *mkex_hash, +- u64 *secret_key, u8 intf, u8 hash_idx); ++u32 npc_field_hash_calc(u64 *ldata, struct npc_get_field_hash_info_rsp rsp, ++ u8 intf, u8 hash_idx); + + static struct npc_mcam_kex_hash npc_mkex_hash_default __maybe_unused = { + .lid_lt_ld_hash_en = { +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-fix-start-and-end-bit-for-scan-config.patch b/queue-6.1/octeontx2-af-fix-start-and-end-bit-for-scan-config.patch new file mode 100644 index 00000000000..d0a25aec8ba --- /dev/null +++ b/queue-6.1/octeontx2-af-fix-start-and-end-bit-for-scan-config.patch @@ -0,0 +1,42 @@ +From 6b839913781256971e95e5442872402c850dced2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:35 +0530 +Subject: octeontx2-af: Fix start and end bit for scan config + +From: Ratheesh Kannoth + +[ Upstream commit c60a6b90e7890453f09e0d2163d6acadabe3415b ] + +In the current driver, NPC exact match feature was not getting +enabled as configured bit was not read properly. +for_each_set_bit_from() need end bit as one bit post +position in the bit map to read NPC exact nibble enable +bits properly. This patch fixes the same. + +Fixes: b747923afff8 ("octeontx2-af: Exact match support") +Signed-off-by: Ratheesh Kannoth +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +index 7c4e1acd0f77b..67c85382eef62 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +@@ -553,8 +553,7 @@ static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf) + */ + masked_cfg = cfg & NPC_EXACT_NIBBLE; + bitnr = NPC_EXACT_NIBBLE_START; +- for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, +- NPC_EXACT_NIBBLE_START) { ++ for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, NPC_EXACT_NIBBLE_END + 1) { + npc_scan_exact_result(mcam, bitnr, key_nibble, intf); + key_nibble++; + } +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-mcs-config-parser-to-skip-8b-header.patch b/queue-6.1/octeontx2-af-mcs-config-parser-to-skip-8b-header.patch new file mode 100644 index 00000000000..409b5ff5f66 --- /dev/null +++ b/queue-6.1/octeontx2-af-mcs-config-parser-to-skip-8b-header.patch @@ -0,0 +1,124 @@ +From 8fb39c29eadc7edeeef3f4199fe87be2ee0353a5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:22 +0530 +Subject: octeontx2-af: mcs: Config parser to skip 8B header + +From: Geetha sowjanya + +[ Upstream commit 65cdc2b637a5749c7dec0ce14fe2c48f1f91f671 ] + +When ptp timestamp is enabled in RPM, RPM will append 8B +timestamp header for all RX traffic. MCS need to skip these +8 bytes header while parsing the packet header, so that +correct tcam key is created for lookup. +This patch fixes the mcs parser configuration to skip this +8B header for ptp packets. + +Fixes: ca7f49ff8846 ("octeontx2-af: cn10k: Introduce driver for macsec block.") +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + .../ethernet/marvell/octeontx2/af/mcs_reg.h | 1 + + .../marvell/octeontx2/af/mcs_rvu_if.c | 37 +++++++++++++++++++ + .../net/ethernet/marvell/octeontx2/af/rvu.h | 1 + + .../ethernet/marvell/octeontx2/af/rvu_cgx.c | 2 + + 4 files changed, 41 insertions(+) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h +index c95a8b8f5eaf7..7427e3b1490f4 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h +@@ -97,6 +97,7 @@ + #define MCSX_PEX_TX_SLAVE_VLAN_CFGX(a) (0x46f8ull + (a) * 0x8ull) + #define MCSX_PEX_TX_SLAVE_CUSTOM_TAG_REL_MODE_SEL(a) (0x788ull + (a) * 0x8ull) + #define MCSX_PEX_TX_SLAVE_PORT_CONFIG(a) (0x4738ull + (a) * 0x8ull) ++#define MCSX_PEX_RX_SLAVE_PORT_CFGX(a) (0x3b98ull + (a) * 0x8ull) + #define MCSX_PEX_RX_SLAVE_RULE_ETYPE_CFGX(a) ({ \ + u64 offset; \ + \ +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c +index eb25e458266ca..dfd23580e3b8e 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c +@@ -11,6 +11,7 @@ + + #include "mcs.h" + #include "rvu.h" ++#include "mcs_reg.h" + #include "lmac_common.h" + + #define M(_name, _id, _fn_name, _req_type, _rsp_type) \ +@@ -32,6 +33,42 @@ static struct _req_type __maybe_unused \ + MBOX_UP_MCS_MESSAGES + #undef M + ++void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena) ++{ ++ struct mcs *mcs; ++ u64 cfg; ++ u8 port; ++ ++ if (!rvu->mcs_blk_cnt) ++ return; ++ ++ /* When ptp is enabled, RPM appends 8B header for all ++ * RX packets. MCS PEX need to configure to skip 8B ++ * during packet parsing. ++ */ ++ ++ /* CNF10K-B */ ++ if (rvu->mcs_blk_cnt > 1) { ++ mcs = mcs_get_pdata(rpm_id); ++ cfg = mcs_reg_read(mcs, MCSX_PEX_RX_SLAVE_PEX_CONFIGURATION); ++ if (ena) ++ cfg |= BIT_ULL(lmac_id); ++ else ++ cfg &= ~BIT_ULL(lmac_id); ++ mcs_reg_write(mcs, MCSX_PEX_RX_SLAVE_PEX_CONFIGURATION, cfg); ++ return; ++ } ++ /* CN10KB */ ++ mcs = mcs_get_pdata(0); ++ port = (rpm_id * rvu->hw->lmac_per_cgx) + lmac_id; ++ cfg = mcs_reg_read(mcs, MCSX_PEX_RX_SLAVE_PORT_CFGX(port)); ++ if (ena) ++ cfg |= BIT_ULL(0); ++ else ++ cfg &= ~BIT_ULL(0); ++ mcs_reg_write(mcs, MCSX_PEX_RX_SLAVE_PORT_CFGX(port), cfg); ++} ++ + int rvu_mbox_handler_mcs_set_lmac_mode(struct rvu *rvu, + struct mcs_set_lmac_mode *req, + struct msg_rsp *rsp) +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +index b07c6f51b461b..3ca8d2e5f979b 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +@@ -892,6 +892,7 @@ int rvu_get_hwvf(struct rvu *rvu, int pcifunc); + /* CN10K MCS */ + int rvu_mcs_init(struct rvu *rvu); + int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc); ++void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena); + void rvu_mcs_exit(struct rvu *rvu); + + #endif /* RVU_H */ +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c +index addc69f4b65c6..9eca38547b783 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c +@@ -761,6 +761,8 @@ static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable) + /* This flag is required to clean up CGX conf if app gets killed */ + pfvf->hw_rx_tstamp_en = enable; + ++ /* Inform MCS about 8B RX header */ ++ rvu_mcs_ptp_cfg(rvu, cgx_id, lmac_id, enable); + return 0; + } + +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-mcs-fix-mcs-block-interrupt.patch b/queue-6.1/octeontx2-af-mcs-fix-mcs-block-interrupt.patch new file mode 100644 index 00000000000..91de254bc62 --- /dev/null +++ b/queue-6.1/octeontx2-af-mcs-fix-mcs-block-interrupt.patch @@ -0,0 +1,404 @@ +From 01c3d1e24fe3b09ecb3465521e75e82b0bb466c9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:23 +0530 +Subject: octeontx2-af: mcs: Fix MCS block interrupt + +From: Geetha sowjanya + +[ Upstream commit b8aebeaaf9ffb1e99c642eb3751e28981f9be475 ] + +On CN10KB, MCS IP vector number, BBE and PAB interrupt mask +got changed to support more block level interrupts. +To address this changes, this patch fixes the bbe and pab +interrupt handlers. + +Fixes: 6c635f78c474 ("octeontx2-af: cn10k: mcs: Handle MCS block interrupts") +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/af/mcs.c | 95 ++++++++----------- + .../net/ethernet/marvell/octeontx2/af/mcs.h | 26 +++-- + .../marvell/octeontx2/af/mcs_cnf10kb.c | 63 ++++++++++++ + .../ethernet/marvell/octeontx2/af/mcs_reg.h | 5 +- + 4 files changed, 119 insertions(+), 70 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +index 148417d633a56..c43f19dfbd744 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +@@ -936,60 +936,42 @@ static void mcs_tx_misc_intr_handler(struct mcs *mcs, u64 intr) + mcs_add_intr_wq_entry(mcs, &event); + } + +-static void mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir) ++void cn10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, ++ enum mcs_direction dir) + { +- struct mcs_intr_event event = { 0 }; +- int i; ++ u64 val, reg; ++ int lmac; + +- if (!(intr & MCS_BBE_INT_MASK)) ++ if (!(intr & 0x6ULL)) + return; + +- event.mcs_id = mcs->mcs_id; +- event.pcifunc = mcs->pf_map[0]; ++ if (intr & BIT_ULL(1)) ++ reg = (dir == MCS_RX) ? MCSX_BBE_RX_SLAVE_DFIFO_OVERFLOW_0 : ++ MCSX_BBE_TX_SLAVE_DFIFO_OVERFLOW_0; ++ else ++ reg = (dir == MCS_RX) ? MCSX_BBE_RX_SLAVE_PLFIFO_OVERFLOW_0 : ++ MCSX_BBE_TX_SLAVE_PLFIFO_OVERFLOW_0; ++ val = mcs_reg_read(mcs, reg); + +- for (i = 0; i < MCS_MAX_BBE_INT; i++) { +- if (!(intr & BIT_ULL(i))) ++ /* policy/data over flow occurred */ ++ for (lmac = 0; lmac < mcs->hw->lmac_cnt; lmac++) { ++ if (!(val & BIT_ULL(lmac))) + continue; +- +- /* Lower nibble denotes data fifo overflow interrupts and +- * upper nibble indicates policy fifo overflow interrupts. +- */ +- if (intr & 0xFULL) +- event.intr_mask = (dir == MCS_RX) ? +- MCS_BBE_RX_DFIFO_OVERFLOW_INT : +- MCS_BBE_TX_DFIFO_OVERFLOW_INT; +- else +- event.intr_mask = (dir == MCS_RX) ? +- MCS_BBE_RX_PLFIFO_OVERFLOW_INT : +- MCS_BBE_TX_PLFIFO_OVERFLOW_INT; +- +- /* Notify the lmac_id info which ran into BBE fatal error */ +- event.lmac_id = i & 0x3ULL; +- mcs_add_intr_wq_entry(mcs, &event); ++ dev_warn(mcs->dev, "BEE:Policy or data overflow occurred on lmac:%d\n", lmac); + } + } + +-static void mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir) ++void cn10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, ++ enum mcs_direction dir) + { +- struct mcs_intr_event event = { 0 }; +- int i; ++ int lmac; + +- if (!(intr & MCS_PAB_INT_MASK)) ++ if (!(intr & 0xFFFFFULL)) + return; + +- event.mcs_id = mcs->mcs_id; +- event.pcifunc = mcs->pf_map[0]; +- +- for (i = 0; i < MCS_MAX_PAB_INT; i++) { +- if (!(intr & BIT_ULL(i))) +- continue; +- +- event.intr_mask = (dir == MCS_RX) ? MCS_PAB_RX_CHAN_OVERFLOW_INT : +- MCS_PAB_TX_CHAN_OVERFLOW_INT; +- +- /* Notify the lmac_id info which ran into PAB fatal error */ +- event.lmac_id = i; +- mcs_add_intr_wq_entry(mcs, &event); ++ for (lmac = 0; lmac < mcs->hw->lmac_cnt; lmac++) { ++ if (intr & BIT_ULL(lmac)) ++ dev_warn(mcs->dev, "PAB: overflow occurred on lmac:%d\n", lmac); + } + } + +@@ -998,9 +980,8 @@ static irqreturn_t mcs_ip_intr_handler(int irq, void *mcs_irq) + struct mcs *mcs = (struct mcs *)mcs_irq; + u64 intr, cpm_intr, bbe_intr, pab_intr; + +- /* Disable and clear the interrupt */ ++ /* Disable the interrupt */ + mcs_reg_write(mcs, MCSX_IP_INT_ENA_W1C, BIT_ULL(0)); +- mcs_reg_write(mcs, MCSX_IP_INT, BIT_ULL(0)); + + /* Check which block has interrupt*/ + intr = mcs_reg_read(mcs, MCSX_TOP_SLAVE_INT_SUM); +@@ -1047,7 +1028,7 @@ static irqreturn_t mcs_ip_intr_handler(int irq, void *mcs_irq) + /* BBE RX */ + if (intr & MCS_BBE_RX_INT_ENA) { + bbe_intr = mcs_reg_read(mcs, MCSX_BBE_RX_SLAVE_BBE_INT); +- mcs_bbe_intr_handler(mcs, bbe_intr, MCS_RX); ++ mcs->mcs_ops->mcs_bbe_intr_handler(mcs, bbe_intr, MCS_RX); + + /* Clear the interrupt */ + mcs_reg_write(mcs, MCSX_BBE_RX_SLAVE_BBE_INT_INTR_RW, 0); +@@ -1057,7 +1038,7 @@ static irqreturn_t mcs_ip_intr_handler(int irq, void *mcs_irq) + /* BBE TX */ + if (intr & MCS_BBE_TX_INT_ENA) { + bbe_intr = mcs_reg_read(mcs, MCSX_BBE_TX_SLAVE_BBE_INT); +- mcs_bbe_intr_handler(mcs, bbe_intr, MCS_TX); ++ mcs->mcs_ops->mcs_bbe_intr_handler(mcs, bbe_intr, MCS_TX); + + /* Clear the interrupt */ + mcs_reg_write(mcs, MCSX_BBE_TX_SLAVE_BBE_INT_INTR_RW, 0); +@@ -1067,7 +1048,7 @@ static irqreturn_t mcs_ip_intr_handler(int irq, void *mcs_irq) + /* PAB RX */ + if (intr & MCS_PAB_RX_INT_ENA) { + pab_intr = mcs_reg_read(mcs, MCSX_PAB_RX_SLAVE_PAB_INT); +- mcs_pab_intr_handler(mcs, pab_intr, MCS_RX); ++ mcs->mcs_ops->mcs_pab_intr_handler(mcs, pab_intr, MCS_RX); + + /* Clear the interrupt */ + mcs_reg_write(mcs, MCSX_PAB_RX_SLAVE_PAB_INT_INTR_RW, 0); +@@ -1077,14 +1058,15 @@ static irqreturn_t mcs_ip_intr_handler(int irq, void *mcs_irq) + /* PAB TX */ + if (intr & MCS_PAB_TX_INT_ENA) { + pab_intr = mcs_reg_read(mcs, MCSX_PAB_TX_SLAVE_PAB_INT); +- mcs_pab_intr_handler(mcs, pab_intr, MCS_TX); ++ mcs->mcs_ops->mcs_pab_intr_handler(mcs, pab_intr, MCS_TX); + + /* Clear the interrupt */ + mcs_reg_write(mcs, MCSX_PAB_TX_SLAVE_PAB_INT_INTR_RW, 0); + mcs_reg_write(mcs, MCSX_PAB_TX_SLAVE_PAB_INT, pab_intr); + } + +- /* Enable the interrupt */ ++ /* Clear and enable the interrupt */ ++ mcs_reg_write(mcs, MCSX_IP_INT, BIT_ULL(0)); + mcs_reg_write(mcs, MCSX_IP_INT_ENA_W1S, BIT_ULL(0)); + + return IRQ_HANDLED; +@@ -1166,7 +1148,7 @@ static int mcs_register_interrupts(struct mcs *mcs) + return ret; + } + +- ret = request_irq(pci_irq_vector(mcs->pdev, MCS_INT_VEC_IP), ++ ret = request_irq(pci_irq_vector(mcs->pdev, mcs->hw->ip_vec), + mcs_ip_intr_handler, 0, "MCS_IP", mcs); + if (ret) { + dev_err(mcs->dev, "MCS IP irq registration failed\n"); +@@ -1185,11 +1167,11 @@ static int mcs_register_interrupts(struct mcs *mcs) + mcs_reg_write(mcs, MCSX_CPM_TX_SLAVE_TX_INT_ENB, 0x7ULL); + mcs_reg_write(mcs, MCSX_CPM_RX_SLAVE_RX_INT_ENB, 0x7FULL); + +- mcs_reg_write(mcs, MCSX_BBE_RX_SLAVE_BBE_INT_ENB, 0xff); +- mcs_reg_write(mcs, MCSX_BBE_TX_SLAVE_BBE_INT_ENB, 0xff); ++ mcs_reg_write(mcs, MCSX_BBE_RX_SLAVE_BBE_INT_ENB, 0xFFULL); ++ mcs_reg_write(mcs, MCSX_BBE_TX_SLAVE_BBE_INT_ENB, 0xFFULL); + +- mcs_reg_write(mcs, MCSX_PAB_RX_SLAVE_PAB_INT_ENB, 0xff); +- mcs_reg_write(mcs, MCSX_PAB_TX_SLAVE_PAB_INT_ENB, 0xff); ++ mcs_reg_write(mcs, MCSX_PAB_RX_SLAVE_PAB_INT_ENB, 0xFFFFFULL); ++ mcs_reg_write(mcs, MCSX_PAB_TX_SLAVE_PAB_INT_ENB, 0xFFFFFULL); + + mcs->tx_sa_active = alloc_mem(mcs, mcs->hw->sc_entries); + if (!mcs->tx_sa_active) { +@@ -1200,7 +1182,7 @@ static int mcs_register_interrupts(struct mcs *mcs) + return ret; + + free_irq: +- free_irq(pci_irq_vector(mcs->pdev, MCS_INT_VEC_IP), mcs); ++ free_irq(pci_irq_vector(mcs->pdev, mcs->hw->ip_vec), mcs); + exit: + pci_free_irq_vectors(mcs->pdev); + mcs->num_vec = 0; +@@ -1497,6 +1479,7 @@ void cn10kb_mcs_set_hw_capabilities(struct mcs *mcs) + hw->lmac_cnt = 20; /* lmacs/ports per mcs block */ + hw->mcs_x2p_intf = 5; /* x2p clabration intf */ + hw->mcs_blks = 1; /* MCS blocks */ ++ hw->ip_vec = MCS_CN10KB_INT_VEC_IP; /* IP vector */ + } + + static struct mcs_ops cn10kb_mcs_ops = { +@@ -1505,6 +1488,8 @@ static struct mcs_ops cn10kb_mcs_ops = { + .mcs_tx_sa_mem_map_write = cn10kb_mcs_tx_sa_mem_map_write, + .mcs_rx_sa_mem_map_write = cn10kb_mcs_rx_sa_mem_map_write, + .mcs_flowid_secy_map = cn10kb_mcs_flowid_secy_map, ++ .mcs_bbe_intr_handler = cn10kb_mcs_bbe_intr_handler, ++ .mcs_pab_intr_handler = cn10kb_mcs_pab_intr_handler, + }; + + static int mcs_probe(struct pci_dev *pdev, const struct pci_device_id *id) +@@ -1605,7 +1590,7 @@ static void mcs_remove(struct pci_dev *pdev) + + /* Set MCS to external bypass */ + mcs_set_external_bypass(mcs, true); +- free_irq(pci_irq_vector(pdev, MCS_INT_VEC_IP), mcs); ++ free_irq(pci_irq_vector(pdev, mcs->hw->ip_vec), mcs); + pci_free_irq_vectors(pdev); + pci_release_regions(pdev); + pci_disable_device(pdev); +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.h b/drivers/net/ethernet/marvell/octeontx2/af/mcs.h +index 64dc2b80e15dd..0f89dcb764654 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.h +@@ -43,24 +43,15 @@ + /* Reserved resources for default bypass entry */ + #define MCS_RSRC_RSVD_CNT 1 + +-/* MCS Interrupt Vector Enumeration */ +-enum mcs_int_vec_e { +- MCS_INT_VEC_MIL_RX_GBL = 0x0, +- MCS_INT_VEC_MIL_RX_LMACX = 0x1, +- MCS_INT_VEC_MIL_TX_LMACX = 0x5, +- MCS_INT_VEC_HIL_RX_GBL = 0x9, +- MCS_INT_VEC_HIL_RX_LMACX = 0xa, +- MCS_INT_VEC_HIL_TX_GBL = 0xe, +- MCS_INT_VEC_HIL_TX_LMACX = 0xf, +- MCS_INT_VEC_IP = 0x13, +- MCS_INT_VEC_CNT = 0x14, +-}; ++/* MCS Interrupt Vector */ ++#define MCS_CNF10KB_INT_VEC_IP 0x13 ++#define MCS_CN10KB_INT_VEC_IP 0x53 + + #define MCS_MAX_BBE_INT 8ULL + #define MCS_BBE_INT_MASK 0xFFULL + +-#define MCS_MAX_PAB_INT 4ULL +-#define MCS_PAB_INT_MASK 0xFULL ++#define MCS_MAX_PAB_INT 8ULL ++#define MCS_PAB_INT_MASK 0xFULL + + #define MCS_BBE_RX_INT_ENA BIT_ULL(0) + #define MCS_BBE_TX_INT_ENA BIT_ULL(1) +@@ -137,6 +128,7 @@ struct hwinfo { + u8 lmac_cnt; + u8 mcs_blks; + unsigned long lmac_bmap; /* bitmap of enabled mcs lmac */ ++ u16 ip_vec; + }; + + struct mcs { +@@ -165,6 +157,8 @@ struct mcs_ops { + void (*mcs_tx_sa_mem_map_write)(struct mcs *mcs, struct mcs_tx_sc_sa_map *map); + void (*mcs_rx_sa_mem_map_write)(struct mcs *mcs, struct mcs_rx_sc_sa_map *map); + void (*mcs_flowid_secy_map)(struct mcs *mcs, struct secy_mem_map *map, int dir); ++ void (*mcs_bbe_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir); ++ void (*mcs_pab_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir); + }; + + extern struct pci_driver mcs_driver; +@@ -219,6 +213,8 @@ void cn10kb_mcs_tx_sa_mem_map_write(struct mcs *mcs, struct mcs_tx_sc_sa_map *ma + void cn10kb_mcs_flowid_secy_map(struct mcs *mcs, struct secy_mem_map *map, int dir); + void cn10kb_mcs_rx_sa_mem_map_write(struct mcs *mcs, struct mcs_rx_sc_sa_map *map); + void cn10kb_mcs_parser_cfg(struct mcs *mcs); ++void cn10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir); ++void cn10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir); + + /* CNF10K-B APIs */ + struct mcs_ops *cnf10kb_get_mac_ops(void); +@@ -229,6 +225,8 @@ void cnf10kb_mcs_rx_sa_mem_map_write(struct mcs *mcs, struct mcs_rx_sc_sa_map *m + void cnf10kb_mcs_parser_cfg(struct mcs *mcs); + void cnf10kb_mcs_tx_pn_thresh_reached_handler(struct mcs *mcs); + void cnf10kb_mcs_tx_pn_wrapped_handler(struct mcs *mcs); ++void cnf10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir); ++void cnf10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir); + + /* Stats APIs */ + void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats, int id, int dir); +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c +index 7b62054144286..9f9b904ab2cd0 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c +@@ -13,6 +13,8 @@ static struct mcs_ops cnf10kb_mcs_ops = { + .mcs_tx_sa_mem_map_write = cnf10kb_mcs_tx_sa_mem_map_write, + .mcs_rx_sa_mem_map_write = cnf10kb_mcs_rx_sa_mem_map_write, + .mcs_flowid_secy_map = cnf10kb_mcs_flowid_secy_map, ++ .mcs_bbe_intr_handler = cnf10kb_mcs_bbe_intr_handler, ++ .mcs_pab_intr_handler = cnf10kb_mcs_pab_intr_handler, + }; + + struct mcs_ops *cnf10kb_get_mac_ops(void) +@@ -31,6 +33,7 @@ void cnf10kb_mcs_set_hw_capabilities(struct mcs *mcs) + hw->lmac_cnt = 4; /* lmacs/ports per mcs block */ + hw->mcs_x2p_intf = 1; /* x2p clabration intf */ + hw->mcs_blks = 7; /* MCS blocks */ ++ hw->ip_vec = MCS_CNF10KB_INT_VEC_IP; /* IP vector */ + } + + void cnf10kb_mcs_parser_cfg(struct mcs *mcs) +@@ -212,3 +215,63 @@ void cnf10kb_mcs_tx_pn_wrapped_handler(struct mcs *mcs) + mcs_add_intr_wq_entry(mcs, &event); + } + } ++ ++void cnf10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, ++ enum mcs_direction dir) ++{ ++ struct mcs_intr_event event = { 0 }; ++ int i; ++ ++ if (!(intr & MCS_BBE_INT_MASK)) ++ return; ++ ++ event.mcs_id = mcs->mcs_id; ++ event.pcifunc = mcs->pf_map[0]; ++ ++ for (i = 0; i < MCS_MAX_BBE_INT; i++) { ++ if (!(intr & BIT_ULL(i))) ++ continue; ++ ++ /* Lower nibble denotes data fifo overflow interrupts and ++ * upper nibble indicates policy fifo overflow interrupts. ++ */ ++ if (intr & 0xFULL) ++ event.intr_mask = (dir == MCS_RX) ? ++ MCS_BBE_RX_DFIFO_OVERFLOW_INT : ++ MCS_BBE_TX_DFIFO_OVERFLOW_INT; ++ else ++ event.intr_mask = (dir == MCS_RX) ? ++ MCS_BBE_RX_PLFIFO_OVERFLOW_INT : ++ MCS_BBE_TX_PLFIFO_OVERFLOW_INT; ++ ++ /* Notify the lmac_id info which ran into BBE fatal error */ ++ event.lmac_id = i & 0x3ULL; ++ mcs_add_intr_wq_entry(mcs, &event); ++ } ++} ++ ++void cnf10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, ++ enum mcs_direction dir) ++{ ++ struct mcs_intr_event event = { 0 }; ++ int i; ++ ++ if (!(intr & MCS_PAB_INT_MASK)) ++ return; ++ ++ event.mcs_id = mcs->mcs_id; ++ event.pcifunc = mcs->pf_map[0]; ++ ++ for (i = 0; i < MCS_MAX_PAB_INT; i++) { ++ if (!(intr & BIT_ULL(i))) ++ continue; ++ ++ event.intr_mask = (dir == MCS_RX) ? ++ MCS_PAB_RX_CHAN_OVERFLOW_INT : ++ MCS_PAB_TX_CHAN_OVERFLOW_INT; ++ ++ /* Notify the lmac_id info which ran into PAB fatal error */ ++ event.lmac_id = i; ++ mcs_add_intr_wq_entry(mcs, &event); ++ } ++} +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h +index 7427e3b1490f4..f3ab01fc363c8 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h +@@ -276,7 +276,10 @@ + #define MCSX_BBE_RX_SLAVE_CAL_ENTRY 0x180ull + #define MCSX_BBE_RX_SLAVE_CAL_LEN 0x188ull + #define MCSX_PAB_RX_SLAVE_FIFO_SKID_CFGX(a) (0x290ull + (a) * 0x40ull) +- ++#define MCSX_BBE_RX_SLAVE_DFIFO_OVERFLOW_0 0xe20 ++#define MCSX_BBE_TX_SLAVE_DFIFO_OVERFLOW_0 0x1298 ++#define MCSX_BBE_RX_SLAVE_PLFIFO_OVERFLOW_0 0xe40 ++#define MCSX_BBE_TX_SLAVE_PLFIFO_OVERFLOW_0 0x12b8 + #define MCSX_BBE_RX_SLAVE_BBE_INT ({ \ + u64 offset; \ + \ +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-mcs-write-tcam_data-and-tcam_mask-regis.patch b/queue-6.1/octeontx2-af-mcs-write-tcam_data-and-tcam_mask-regis.patch new file mode 100644 index 00000000000..93eafeb9cc1 --- /dev/null +++ b/queue-6.1/octeontx2-af-mcs-write-tcam_data-and-tcam_mask-regis.patch @@ -0,0 +1,50 @@ +From 3e1e1f5b04ac79b88578948de666462a1df90bff Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:21 +0530 +Subject: octeontx2-af: mcs: Write TCAM_DATA and TCAM_MASK registers at once + +From: Subbaraya Sundeep + +[ Upstream commit b51612198603fce33d6cf57b4864e3018a1cd9b8 ] + +As per hardware errata on CN10KB, all the four TCAM_DATA +and TCAM_MASK registers has to be written at once otherwise +write to individual registers will fail. Hence write to all +TCAM_DATA registers and then to all TCAM_MASK registers. + +Fixes: cfc14181d497 ("octeontx2-af: cn10k: mcs: Manage the MCS block hardware resources") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/af/mcs.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +index 492baa0b594ce..148417d633a56 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +@@ -473,6 +473,8 @@ void mcs_flowid_entry_write(struct mcs *mcs, u64 *data, u64 *mask, int flow_id, + for (reg_id = 0; reg_id < 4; reg_id++) { + reg = MCSX_CPM_RX_SLAVE_FLOWID_TCAM_DATAX(reg_id, flow_id); + mcs_reg_write(mcs, reg, data[reg_id]); ++ } ++ for (reg_id = 0; reg_id < 4; reg_id++) { + reg = MCSX_CPM_RX_SLAVE_FLOWID_TCAM_MASKX(reg_id, flow_id); + mcs_reg_write(mcs, reg, mask[reg_id]); + } +@@ -480,6 +482,8 @@ void mcs_flowid_entry_write(struct mcs *mcs, u64 *data, u64 *mask, int flow_id, + for (reg_id = 0; reg_id < 4; reg_id++) { + reg = MCSX_CPM_TX_SLAVE_FLOWID_TCAM_DATAX(reg_id, flow_id); + mcs_reg_write(mcs, reg, data[reg_id]); ++ } ++ for (reg_id = 0; reg_id < 4; reg_id++) { + reg = MCSX_CPM_TX_SLAVE_FLOWID_TCAM_MASKX(reg_id, flow_id); + mcs_reg_write(mcs, reg, mask[reg_id]); + } +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-secure-apr-table-update-with-the-lock.patch b/queue-6.1/octeontx2-af-secure-apr-table-update-with-the-lock.patch new file mode 100644 index 00000000000..e3b21ed67a9 --- /dev/null +++ b/queue-6.1/octeontx2-af-secure-apr-table-update-with-the-lock.patch @@ -0,0 +1,81 @@ +From d58e883951e6c020ed5809308a00612712bce4fc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:34 +0530 +Subject: octeontx2-af: Secure APR table update with the lock + +From: Geetha sowjanya + +[ Upstream commit 048486f81d01db4d100af021ee2ea211d19732a0 ] + +APR table contains the lmtst base address of PF/VFs. These entries +are updated by the PF/VF during the device probe. The lmtst address +is fetched from HW using "TXN_REQ" and "ADDR_RSP_STS" registers. +The lock tries to protect these registers from getting overwritten +when multiple PFs invokes rvu_get_lmtaddr() simultaneously. + +For example, if PF1 submit the request and got permitted before it +reads the response and PF2 got scheduled submit the request then the +response of PF1 is overwritten by the PF2 response. + +Fixes: 893ae97214c3 ("octeontx2-af: cn10k: Support configurable LMTST regions") +Signed-off-by: Geetha sowjanya +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/af/rvu_cn10k.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c +index 7dbbc115cde42..f9faa5b23bb9d 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c +@@ -60,13 +60,14 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, + u64 iova, u64 *lmt_addr) + { + u64 pa, val, pf; +- int err; ++ int err = 0; + + if (!iova) { + dev_err(rvu->dev, "%s Requested Null address for transulation\n", __func__); + return -EINVAL; + } + ++ mutex_lock(&rvu->rsrc_lock); + rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova); + pf = rvu_get_pf(pcifunc) & 0x1F; + val = BIT_ULL(63) | BIT_ULL(14) | BIT_ULL(13) | pf << 8 | +@@ -76,12 +77,13 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, + err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false); + if (err) { + dev_err(rvu->dev, "%s LMTLINE iova transulation failed\n", __func__); +- return err; ++ goto exit; + } + val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS); + if (val & ~0x1ULL) { + dev_err(rvu->dev, "%s LMTLINE iova transulation failed err:%llx\n", __func__, val); +- return -EIO; ++ err = -EIO; ++ goto exit; + } + /* PA[51:12] = RVU_AF_SMMU_TLN_FLIT0[57:18] + * PA[11:0] = IOVA[11:0] +@@ -89,8 +91,9 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, + pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18; + pa &= GENMASK_ULL(39, 0); + *lmt_addr = (pa << 12) | (iova & 0xFFF); +- +- return 0; ++exit: ++ mutex_unlock(&rvu->rsrc_lock); ++ return err; + } + + static int rvu_update_lmtaddr(struct rvu *rvu, u16 pcifunc, u64 lmt_addr) +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-skip-pfs-if-not-enabled.patch b/queue-6.1/octeontx2-af-skip-pfs-if-not-enabled.patch new file mode 100644 index 00000000000..c01a579ebc5 --- /dev/null +++ b/queue-6.1/octeontx2-af-skip-pfs-if-not-enabled.patch @@ -0,0 +1,196 @@ +From 6a831a95732828bc8282bf8717f0836e6f31db81 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:42 +0530 +Subject: octeontx2-af: Skip PFs if not enabled + +From: Ratheesh Kannoth + +[ Upstream commit 5eb1b7220948a69298a436148a735f32ec325289 ] + +Firmware enables PFs and allocate mbox resources for each of the PFs. +Currently PF driver configures mbox resources without checking whether +PF is enabled or not. This results in crash. This patch fixes this issue +by skipping disabled PF's mbox initialization. + +Fixes: 9bdc47a6e328 ("octeontx2-af: Mbox communication support btw AF and it's VFs") +Signed-off-by: Ratheesh Kannoth +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/af/mbox.c | 5 +- + .../net/ethernet/marvell/octeontx2/af/mbox.h | 3 +- + .../net/ethernet/marvell/octeontx2/af/rvu.c | 49 +++++++++++++++---- + 3 files changed, 46 insertions(+), 11 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.c b/drivers/net/ethernet/marvell/octeontx2/af/mbox.c +index 2898931d5260a..9690ac01f02c8 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.c +@@ -157,7 +157,7 @@ EXPORT_SYMBOL(otx2_mbox_init); + */ + int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase, + struct pci_dev *pdev, void *reg_base, +- int direction, int ndevs) ++ int direction, int ndevs, unsigned long *pf_bmap) + { + struct otx2_mbox_dev *mdev; + int devid, err; +@@ -169,6 +169,9 @@ int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase, + mbox->hwbase = hwbase[0]; + + for (devid = 0; devid < ndevs; devid++) { ++ if (!test_bit(devid, pf_bmap)) ++ continue; ++ + mdev = &mbox->dev[devid]; + mdev->mbase = hwbase[devid]; + mdev->hwbase = hwbase[devid]; +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +index 5921a78661e41..11eeb36cf9a54 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +@@ -96,9 +96,10 @@ void otx2_mbox_destroy(struct otx2_mbox *mbox); + int otx2_mbox_init(struct otx2_mbox *mbox, void __force *hwbase, + struct pci_dev *pdev, void __force *reg_base, + int direction, int ndevs); ++ + int otx2_mbox_regions_init(struct otx2_mbox *mbox, void __force **hwbase, + struct pci_dev *pdev, void __force *reg_base, +- int direction, int ndevs); ++ int direction, int ndevs, unsigned long *bmap); + void otx2_mbox_msg_send(struct otx2_mbox *mbox, int devid); + int otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid); + int otx2_mbox_busy_poll_for_rsp(struct otx2_mbox *mbox, int devid); +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +index 3f5e09b77d4bd..873f081c030de 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +@@ -2274,7 +2274,7 @@ static inline void rvu_afvf_mbox_up_handler(struct work_struct *work) + } + + static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, +- int num, int type) ++ int num, int type, unsigned long *pf_bmap) + { + struct rvu_hwinfo *hw = rvu->hw; + int region; +@@ -2286,6 +2286,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, + */ + if (type == TYPE_AFVF) { + for (region = 0; region < num; region++) { ++ if (!test_bit(region, pf_bmap)) ++ continue; ++ + if (hw->cap.per_pf_mbox_regs) { + bar4 = rvu_read64(rvu, BLKADDR_RVUM, + RVU_AF_PFX_BAR4_ADDR(0)) + +@@ -2307,6 +2310,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, + * RVU_AF_PF_BAR4_ADDR register. + */ + for (region = 0; region < num; region++) { ++ if (!test_bit(region, pf_bmap)) ++ continue; ++ + if (hw->cap.per_pf_mbox_regs) { + bar4 = rvu_read64(rvu, BLKADDR_RVUM, + RVU_AF_PFX_BAR4_ADDR(region)); +@@ -2335,20 +2341,41 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, + int err = -EINVAL, i, dir, dir_up; + void __iomem *reg_base; + struct rvu_work *mwork; ++ unsigned long *pf_bmap; + void **mbox_regions; + const char *name; ++ u64 cfg; + +- mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL); +- if (!mbox_regions) ++ pf_bmap = bitmap_zalloc(num, GFP_KERNEL); ++ if (!pf_bmap) + return -ENOMEM; + ++ /* RVU VFs */ ++ if (type == TYPE_AFVF) ++ bitmap_set(pf_bmap, 0, num); ++ ++ if (type == TYPE_AFPF) { ++ /* Mark enabled PFs in bitmap */ ++ for (i = 0; i < num; i++) { ++ cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i)); ++ if (cfg & BIT_ULL(20)) ++ set_bit(i, pf_bmap); ++ } ++ } ++ ++ mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL); ++ if (!mbox_regions) { ++ err = -ENOMEM; ++ goto free_bitmap; ++ } ++ + switch (type) { + case TYPE_AFPF: + name = "rvu_afpf_mailbox"; + dir = MBOX_DIR_AFPF; + dir_up = MBOX_DIR_AFPF_UP; + reg_base = rvu->afreg_base; +- err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF); ++ err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF, pf_bmap); + if (err) + goto free_regions; + break; +@@ -2357,7 +2384,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, + dir = MBOX_DIR_PFVF; + dir_up = MBOX_DIR_PFVF_UP; + reg_base = rvu->pfreg_base; +- err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF); ++ err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF, pf_bmap); + if (err) + goto free_regions; + break; +@@ -2388,16 +2415,19 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, + } + + err = otx2_mbox_regions_init(&mw->mbox, mbox_regions, rvu->pdev, +- reg_base, dir, num); ++ reg_base, dir, num, pf_bmap); + if (err) + goto exit; + + err = otx2_mbox_regions_init(&mw->mbox_up, mbox_regions, rvu->pdev, +- reg_base, dir_up, num); ++ reg_base, dir_up, num, pf_bmap); + if (err) + goto exit; + + for (i = 0; i < num; i++) { ++ if (!test_bit(i, pf_bmap)) ++ continue; ++ + mwork = &mw->mbox_wrk[i]; + mwork->rvu = rvu; + INIT_WORK(&mwork->work, mbox_handler); +@@ -2406,8 +2436,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, + mwork->rvu = rvu; + INIT_WORK(&mwork->work, mbox_up_handler); + } +- kfree(mbox_regions); +- return 0; ++ goto free_regions; + + exit: + destroy_workqueue(mw->mbox_wq); +@@ -2416,6 +2445,8 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, + iounmap((void __iomem *)mbox_regions[num]); + free_regions: + kfree(mbox_regions); ++free_bitmap: ++ bitmap_free(pf_bmap); + return err; + } + +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-af-update-fix-npc-field-hash-extract-featu.patch b/queue-6.1/octeontx2-af-update-fix-npc-field-hash-extract-featu.patch new file mode 100644 index 00000000000..fba2d1c39d0 --- /dev/null +++ b/queue-6.1/octeontx2-af-update-fix-npc-field-hash-extract-featu.patch @@ -0,0 +1,197 @@ +From 758926033ef75e269033d06553e9a4f54d26a8d7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:40 +0530 +Subject: octeontx2-af: Update/Fix NPC field hash extract feature + +From: Ratheesh Kannoth + +[ Upstream commit 406bed11fb91a0b35c26fe633d8700febaec6439 ] + +1. As per previous implementation, mask and control parameter to +generate the field hash value was not passed to the caller program. +Updated the secret key mbox to share that information as well, +as a part of the fix. +2. Earlier implementation did not consider hash reduction of both +source and destination IPv6 addresses. Only source IPv6 address +was considered. This fix solves that and provides option to hash + +Fixes: 56d9f5fd2246 ("octeontx2-af: Use hashed field in MCAM key") +Signed-off-by: Ratheesh Kannoth +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/af/mbox.h | 16 +++++--- + .../marvell/octeontx2/af/rvu_npc_hash.c | 37 ++++++++++++------- + .../marvell/octeontx2/af/rvu_npc_hash.h | 6 +++ + 3 files changed, 41 insertions(+), 18 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +index c7c92c7510fa6..5921a78661e41 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +@@ -242,9 +242,9 @@ M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule, \ + M(NPC_MCAM_GET_STATS, 0x6012, npc_mcam_entry_stats, \ + npc_mcam_get_stats_req, \ + npc_mcam_get_stats_rsp) \ +-M(NPC_GET_SECRET_KEY, 0x6013, npc_get_secret_key, \ +- npc_get_secret_key_req, \ +- npc_get_secret_key_rsp) \ ++M(NPC_GET_FIELD_HASH_INFO, 0x6013, npc_get_field_hash_info, \ ++ npc_get_field_hash_info_req, \ ++ npc_get_field_hash_info_rsp) \ + M(NPC_GET_FIELD_STATUS, 0x6014, npc_get_field_status, \ + npc_get_field_status_req, \ + npc_get_field_status_rsp) \ +@@ -1513,14 +1513,20 @@ struct npc_mcam_get_stats_rsp { + u8 stat_ena; /* enabled */ + }; + +-struct npc_get_secret_key_req { ++struct npc_get_field_hash_info_req { + struct mbox_msghdr hdr; + u8 intf; + }; + +-struct npc_get_secret_key_rsp { ++struct npc_get_field_hash_info_rsp { + struct mbox_msghdr hdr; + u64 secret_key[3]; ++#define NPC_MAX_HASH 2 ++#define NPC_MAX_HASH_MASK 2 ++ /* NPC_AF_INTF(0..1)_HASH(0..1)_MASK(0..1) */ ++ u64 hash_mask[NPC_MAX_INTF][NPC_MAX_HASH][NPC_MAX_HASH_MASK]; ++ /* NPC_AF_INTF(0..1)_HASH(0..1)_RESULT_CTRL */ ++ u64 hash_ctrl[NPC_MAX_INTF][NPC_MAX_HASH]; + }; + + enum ptp_op { +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +index 5aed3dbf3b991..18f12f9156544 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +@@ -110,8 +110,8 @@ static u64 npc_update_use_hash(int lt, int ld) + * in KEX_LD_CFG + */ + cfg = KEX_LD_CFG_USE_HASH(0x1, 0x03, +- ld ? 0x8 : 0x18, +- 0x1, 0x0, 0x10); ++ ld ? 0x18 : 0x8, ++ 0x1, 0x0, ld ? 0x14 : 0x10); + break; + } + +@@ -134,7 +134,6 @@ static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr, + if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][ld]) { + u64 cfg = npc_update_use_hash(lt, ld); + +- hash_cnt++; + if (hash_cnt == NPC_MAX_HASH) + return; + +@@ -149,6 +148,8 @@ static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr, + mkex_hash->hash_mask[intf][ld][1]); + SET_KEX_LD_HASH_CTRL(intf, ld, + mkex_hash->hash_ctrl[intf][ld]); ++ ++ hash_cnt++; + } + } + } +@@ -171,7 +172,6 @@ static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr, + if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][ld]) { + u64 cfg = npc_update_use_hash(lt, ld); + +- hash_cnt++; + if (hash_cnt == NPC_MAX_HASH) + return; + +@@ -187,8 +187,6 @@ static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr, + SET_KEX_LD_HASH_CTRL(intf, ld, + mkex_hash->hash_ctrl[intf][ld]); + hash_cnt++; +- if (hash_cnt == NPC_MAX_HASH) +- return; + } + } + } +@@ -242,8 +240,8 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, + struct flow_msg *omask) + { + struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash; +- struct npc_get_secret_key_req req; +- struct npc_get_secret_key_rsp rsp; ++ struct npc_get_field_hash_info_req req; ++ struct npc_get_field_hash_info_rsp rsp; + u64 ldata[2], cfg; + u32 field_hash; + u8 hash_idx; +@@ -254,7 +252,7 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, + } + + req.intf = intf; +- rvu_mbox_handler_npc_get_secret_key(rvu, &req, &rsp); ++ rvu_mbox_handler_npc_get_field_hash_info(rvu, &req, &rsp); + + for (hash_idx = 0; hash_idx < NPC_MAX_HASH; hash_idx++) { + cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_CFG(intf, hash_idx)); +@@ -315,13 +313,13 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, + } + } + +-int rvu_mbox_handler_npc_get_secret_key(struct rvu *rvu, +- struct npc_get_secret_key_req *req, +- struct npc_get_secret_key_rsp *rsp) ++int rvu_mbox_handler_npc_get_field_hash_info(struct rvu *rvu, ++ struct npc_get_field_hash_info_req *req, ++ struct npc_get_field_hash_info_rsp *rsp) + { + u64 *secret_key = rsp->secret_key; + u8 intf = req->intf; +- int blkaddr; ++ int i, j, blkaddr; + + blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); + if (blkaddr < 0) { +@@ -333,6 +331,19 @@ int rvu_mbox_handler_npc_get_secret_key(struct rvu *rvu, + secret_key[1] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf)); + secret_key[2] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf)); + ++ for (i = 0; i < NPC_MAX_HASH; i++) { ++ for (j = 0; j < NPC_MAX_HASH_MASK; j++) { ++ rsp->hash_mask[NIX_INTF_RX][i][j] = ++ GET_KEX_LD_HASH_MASK(NIX_INTF_RX, i, j); ++ rsp->hash_mask[NIX_INTF_TX][i][j] = ++ GET_KEX_LD_HASH_MASK(NIX_INTF_TX, i, j); ++ } ++ } ++ ++ for (i = 0; i < NPC_MAX_INTF; i++) ++ for (j = 0; j < NPC_MAX_HASH; j++) ++ rsp->hash_ctrl[i][j] = GET_KEX_LD_HASH_CTRL(i, j); ++ + return 0; + } + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +index 3efeb09c58dec..65936f4aeaacf 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +@@ -31,6 +31,12 @@ + rvu_write64(rvu, blkaddr, \ + NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx), cfg) + ++#define GET_KEX_LD_HASH_CTRL(intf, ld) \ ++ rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld)) ++ ++#define GET_KEX_LD_HASH_MASK(intf, ld, mask_idx) \ ++ rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx)) ++ + #define SET_KEX_LD_HASH_CTRL(intf, ld, cfg) \ + rvu_write64(rvu, blkaddr, \ + NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld), cfg) +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-add-additional-checks-while-configuring.patch b/queue-6.1/octeontx2-pf-add-additional-checks-while-configuring.patch new file mode 100644 index 00000000000..fd1e17ccfa0 --- /dev/null +++ b/queue-6.1/octeontx2-pf-add-additional-checks-while-configuring.patch @@ -0,0 +1,318 @@ +From b6714c8b59722e07325c7e3a8f05e5519c1819a8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 18 Nov 2022 11:03:29 +0530 +Subject: octeontx2-pf: Add additional checks while configuring + ucast/bcast/mcast rules + +From: Suman Ghosh + +[ Upstream commit 674b3e164238a31f236ac63f82d5d160f7d4c201 ] + +1. If a profile does not support DMAC extraction then avoid installing NPC +flow rules for unicast. Similarly, if LXMB(L2 and L3) extraction is not +supported by the profile then avoid installing broadcast and multicast +rules. +2. Allow MCAM entry insertion for promiscuous mode. +3. For the profiles where DMAC is not extracted in MKEX key default +unicast entry installed by AF is not valid. Hence do not use action +from the AF installed default unicast entry for such cases. +4. Adjacent packet header fields in a packet like IP header source +and destination addresses or UDP/TCP header source port and destination +can be extracted together in MKEX profile. Therefore MKEX profile can be +configured to in two ways: + a. Total of 4 bytes from start of UDP header(src port + + destination port) + or + b. Two bytes from start and two bytes from offset 2 + +Signed-off-by: Suman Ghosh +Signed-off-by: Subbaraya Sundeep +Link: https://lore.kernel.org/r/20221118053329.2288486-1-sumang@marvell.com +Signed-off-by: Paolo Abeni +Stable-dep-of: 406bed11fb91 ("octeontx2-af: Update/Fix NPC field hash extract feature") +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/af/mbox.h | 14 ++++ + .../net/ethernet/marvell/octeontx2/af/rvu.h | 1 + + .../ethernet/marvell/octeontx2/af/rvu_npc.c | 22 ++++++ + .../marvell/octeontx2/af/rvu_npc_fs.c | 76 +++++++++++++++---- + .../marvell/octeontx2/nic/otx2_flows.c | 27 ++++++- + 5 files changed, 124 insertions(+), 16 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +index 8d5d5a0f68c44..c7c92c7510fa6 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +@@ -245,6 +245,9 @@ M(NPC_MCAM_GET_STATS, 0x6012, npc_mcam_entry_stats, \ + M(NPC_GET_SECRET_KEY, 0x6013, npc_get_secret_key, \ + npc_get_secret_key_req, \ + npc_get_secret_key_rsp) \ ++M(NPC_GET_FIELD_STATUS, 0x6014, npc_get_field_status, \ ++ npc_get_field_status_req, \ ++ npc_get_field_status_rsp) \ + /* NIX mbox IDs (range 0x8000 - 0xFFFF) */ \ + M(NIX_LF_ALLOC, 0x8000, nix_lf_alloc, \ + nix_lf_alloc_req, nix_lf_alloc_rsp) \ +@@ -1541,6 +1544,17 @@ struct ptp_rsp { + u64 clk; + }; + ++struct npc_get_field_status_req { ++ struct mbox_msghdr hdr; ++ u8 intf; ++ u8 field; ++}; ++ ++struct npc_get_field_status_rsp { ++ struct mbox_msghdr hdr; ++ u8 enable; ++}; ++ + struct set_vf_perm { + struct mbox_msghdr hdr; + u16 vf; +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +index 3ca8d2e5f979b..d493b533cf76e 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +@@ -851,6 +851,7 @@ int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx, + u64 chan_val, u64 chan_mask, u64 exact_val, u64 exact_mask, + u64 bcast_mcast_val, u64 bcast_mcast_mask); + void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx); ++bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf); + + /* CPT APIs */ + int rvu_cpt_register_interrupts(struct rvu *rvu); +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +index 1e348fd0d930e..16cfc802e348d 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +@@ -617,6 +617,12 @@ void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc, + if (blkaddr < 0) + return; + ++ /* Ucast rule should not be installed if DMAC ++ * extraction is not supported by the profile. ++ */ ++ if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf)) ++ return; ++ + index = npc_get_nixlf_mcam_index(mcam, pcifunc, + nixlf, NIXLF_UCAST_ENTRY); + +@@ -778,6 +784,14 @@ void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc, + /* Get 'pcifunc' of PF device */ + pcifunc = pcifunc & ~RVU_PFVF_FUNC_MASK; + pfvf = rvu_get_pfvf(rvu, pcifunc); ++ ++ /* Bcast rule should not be installed if both DMAC ++ * and LXMB extraction is not supported by the profile. ++ */ ++ if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf) && ++ !npc_is_feature_supported(rvu, BIT_ULL(NPC_LXMB), pfvf->nix_rx_intf)) ++ return; ++ + index = npc_get_nixlf_mcam_index(mcam, pcifunc, + nixlf, NIXLF_BCAST_ENTRY); + +@@ -848,6 +862,14 @@ void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf, + vf_func = pcifunc & RVU_PFVF_FUNC_MASK; + pcifunc = pcifunc & ~RVU_PFVF_FUNC_MASK; + pfvf = rvu_get_pfvf(rvu, pcifunc); ++ ++ /* Mcast rule should not be installed if both DMAC ++ * and LXMB extraction is not supported by the profile. ++ */ ++ if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf) && ++ !npc_is_feature_supported(rvu, BIT_ULL(NPC_LXMB), pfvf->nix_rx_intf)) ++ return; ++ + index = npc_get_nixlf_mcam_index(mcam, pcifunc, + nixlf, NIXLF_ALLMULTI_ENTRY); + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +index 282d85846647a..0a3b591c1ef5a 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +@@ -47,6 +47,19 @@ static const char * const npc_flow_names[] = { + [NPC_UNKNOWN] = "unknown", + }; + ++bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf) ++{ ++ struct npc_mcam *mcam = &rvu->hw->mcam; ++ u64 mcam_features; ++ u64 unsupported; ++ ++ mcam_features = is_npc_intf_tx(intf) ? mcam->tx_features : mcam->rx_features; ++ unsupported = (mcam_features ^ features) & ~mcam_features; ++ ++ /* Return false if at least one of the input flows is not extracted */ ++ return !unsupported; ++} ++ + const char *npc_get_field_name(u8 hdr) + { + if (hdr >= ARRAY_SIZE(npc_flow_names)) +@@ -436,8 +449,6 @@ static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid, + nr_bytes = FIELD_GET(NPC_BYTESM, cfg) + 1; + hdr = FIELD_GET(NPC_HDR_OFFSET, cfg); + key = FIELD_GET(NPC_KEY_OFFSET, cfg); +- start_kwi = key / 8; +- offset = (key * 8) % 64; + + /* For Tx, Layer A has NIX_INST_HDR_S(64 bytes) preceding + * ethernet header. +@@ -452,13 +463,18 @@ static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid, + + #define NPC_SCAN_HDR(name, hlid, hlt, hstart, hlen) \ + do { \ ++ start_kwi = key / 8; \ ++ offset = (key * 8) % 64; \ + if (lid == (hlid) && lt == (hlt)) { \ + if ((hstart) >= hdr && \ + ((hstart) + (hlen)) <= (hdr + nr_bytes)) { \ + bit_offset = (hdr + nr_bytes - (hstart) - (hlen)) * 8; \ + npc_set_layer_mdata(mcam, (name), cfg, lid, lt, intf); \ ++ offset += bit_offset; \ ++ start_kwi += offset / 64; \ ++ offset %= 64; \ + npc_set_kw_masks(mcam, (name), (hlen) * 8, \ +- start_kwi, offset + bit_offset, intf);\ ++ start_kwi, offset, intf); \ + } \ + } \ + } while (0) +@@ -649,9 +665,9 @@ static int npc_check_unsupported_flows(struct rvu *rvu, u64 features, u8 intf) + + unsupported = (*mcam_features ^ features) & ~(*mcam_features); + if (unsupported) { +- dev_info(rvu->dev, "Unsupported flow(s):\n"); ++ dev_warn(rvu->dev, "Unsupported flow(s):\n"); + for_each_set_bit(bit, (unsigned long *)&unsupported, 64) +- dev_info(rvu->dev, "%s ", npc_get_field_name(bit)); ++ dev_warn(rvu->dev, "%s ", npc_get_field_name(bit)); + return -EOPNOTSUPP; + } + +@@ -1006,8 +1022,20 @@ static void npc_update_rx_entry(struct rvu *rvu, struct rvu_pfvf *pfvf, + action.match_id = req->match_id; + action.flow_key_alg = req->flow_key_alg; + +- if (req->op == NIX_RX_ACTION_DEFAULT && pfvf->def_ucast_rule) +- action = pfvf->def_ucast_rule->rx_action; ++ if (req->op == NIX_RX_ACTION_DEFAULT) { ++ if (pfvf->def_ucast_rule) { ++ action = pfvf->def_ucast_rule->rx_action; ++ } else { ++ /* For profiles which do not extract DMAC, the default ++ * unicast entry is unused. Hence modify action for the ++ * requests which use same action as default unicast ++ * entry ++ */ ++ *(u64 *)&action = 0; ++ action.pf_func = target; ++ action.op = NIX_RX_ACTIONOP_UCAST; ++ } ++ } + + entry->action = *(u64 *)&action; + +@@ -1238,18 +1266,19 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu, + if (npc_check_field(rvu, blkaddr, NPC_DMAC, req->intf)) + goto process_flow; + +- if (is_pffunc_af(req->hdr.pcifunc)) { ++ if (is_pffunc_af(req->hdr.pcifunc) && ++ req->features & BIT_ULL(NPC_DMAC)) { + if (is_unicast_ether_addr(req->packet.dmac)) { +- dev_err(rvu->dev, +- "%s: mkex profile does not support ucast flow\n", +- __func__); ++ dev_warn(rvu->dev, ++ "%s: mkex profile does not support ucast flow\n", ++ __func__); + return NPC_FLOW_NOT_SUPPORTED; + } + + if (!npc_is_field_present(rvu, NPC_LXMB, req->intf)) { +- dev_err(rvu->dev, +- "%s: mkex profile does not support bcast/mcast flow", +- __func__); ++ dev_warn(rvu->dev, ++ "%s: mkex profile does not support bcast/mcast flow", ++ __func__); + return NPC_FLOW_NOT_SUPPORTED; + } + +@@ -1602,3 +1631,22 @@ int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx, + + return 0; + } ++ ++int rvu_mbox_handler_npc_get_field_status(struct rvu *rvu, ++ struct npc_get_field_status_req *req, ++ struct npc_get_field_status_rsp *rsp) ++{ ++ int blkaddr; ++ ++ blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); ++ if (blkaddr < 0) ++ return NPC_MCAM_INVALID_REQ; ++ ++ if (!is_npc_interface_valid(rvu, req->intf)) ++ return NPC_FLOW_INTF_INVALID; ++ ++ if (npc_check_field(rvu, blkaddr, req->field, req->intf)) ++ rsp->enable = 1; ++ ++ return 0; ++} +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c +index 0f7345a96965b..d0554f6d26731 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c +@@ -164,6 +164,8 @@ EXPORT_SYMBOL(otx2_alloc_mcam_entries); + static int otx2_mcam_entry_init(struct otx2_nic *pfvf) + { + struct otx2_flow_config *flow_cfg = pfvf->flow_cfg; ++ struct npc_get_field_status_req *freq; ++ struct npc_get_field_status_rsp *frsp; + struct npc_mcam_alloc_entry_req *req; + struct npc_mcam_alloc_entry_rsp *rsp; + int vf_vlan_max_flows; +@@ -214,8 +216,29 @@ static int otx2_mcam_entry_init(struct otx2_nic *pfvf) + flow_cfg->rx_vlan_offset = flow_cfg->unicast_offset + + OTX2_MAX_UNICAST_FLOWS; + pfvf->flags |= OTX2_FLAG_UCAST_FLTR_SUPPORT; +- pfvf->flags |= OTX2_FLAG_RX_VLAN_SUPPORT; +- pfvf->flags |= OTX2_FLAG_VF_VLAN_SUPPORT; ++ ++ /* Check if NPC_DMAC field is supported ++ * by the mkex profile before setting VLAN support flag. ++ */ ++ freq = otx2_mbox_alloc_msg_npc_get_field_status(&pfvf->mbox); ++ if (!freq) { ++ mutex_unlock(&pfvf->mbox.lock); ++ return -ENOMEM; ++ } ++ ++ freq->field = NPC_DMAC; ++ if (otx2_sync_mbox_msg(&pfvf->mbox)) { ++ mutex_unlock(&pfvf->mbox.lock); ++ return -EINVAL; ++ } ++ ++ frsp = (struct npc_get_field_status_rsp *)otx2_mbox_get_rsp ++ (&pfvf->mbox.mbox, 0, &freq->hdr); ++ ++ if (frsp->enable) { ++ pfvf->flags |= OTX2_FLAG_RX_VLAN_SUPPORT; ++ pfvf->flags |= OTX2_FLAG_VF_VLAN_SUPPORT; ++ } + + pfvf->flags |= OTX2_FLAG_MCAM_ENTRIES_ALLOC; + mutex_unlock(&pfvf->mbox.lock); +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-disable-packet-i-o-for-graceful-exit.patch b/queue-6.1/octeontx2-pf-disable-packet-i-o-for-graceful-exit.patch new file mode 100644 index 00000000000..eb7d4c3fc33 --- /dev/null +++ b/queue-6.1/octeontx2-pf-disable-packet-i-o-for-graceful-exit.patch @@ -0,0 +1,55 @@ +From 5adb474d7b759f4d07beff0d42d50b2173bf9fac Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:43 +0530 +Subject: octeontx2-pf: Disable packet I/O for graceful exit + +From: Subbaraya Sundeep + +[ Upstream commit c926252205c424c4842dbdbe02f8e3296f623204 ] + +At the stage of enabling packet I/O in otx2_open, If mailbox +timeout occurs then interface ends up in down state where as +hardware packet I/O is enabled. Hence disable packet I/O also +before bailing out. + +Fixes: 1ea0166da050 ("octeontx2-pf: Fix the device state on error") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +index 2221220abcaae..ed911d9946277 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +@@ -1835,13 +1835,22 @@ int otx2_open(struct net_device *netdev) + otx2_dmacflt_reinstall_flows(pf); + + err = otx2_rxtx_enable(pf, true); +- if (err) ++ /* If a mbox communication error happens at this point then interface ++ * will end up in a state such that it is in down state but hardware ++ * mcam entries are enabled to receive the packets. Hence disable the ++ * packet I/O. ++ */ ++ if (err == EIO) ++ goto err_disable_rxtx; ++ else if (err) + goto err_tx_stop_queues; + + otx2_do_set_rx_mode(pf); + + return 0; + ++err_disable_rxtx: ++ otx2_rxtx_enable(pf, false); + err_tx_stop_queues: + netif_tx_stop_all_queues(netdev); + netif_carrier_off(netdev); +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-increase-the-size-of-dmac-filter-flows.patch b/queue-6.1/octeontx2-pf-increase-the-size-of-dmac-filter-flows.patch new file mode 100644 index 00000000000..3136d6e5e1a --- /dev/null +++ b/queue-6.1/octeontx2-pf-increase-the-size-of-dmac-filter-flows.patch @@ -0,0 +1,44 @@ +From 1b8afe2048284fa461c0f04643f9628bbc63070a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:37 +0530 +Subject: octeontx2-pf: Increase the size of dmac filter flows + +From: Ratheesh Kannoth + +[ Upstream commit 2a6eecc592b4d59a04d513aa25fc0f30d52100cd ] + +CN10kb supports large number of dmac filter flows to be +inserted. Increase the field size to accommodate the same + +Fixes: b747923afff8 ("octeontx2-af: Exact match support") +Signed-off-by: Ratheesh Kannoth +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +index 634ca4140346b..241016ca64d05 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +@@ -332,11 +332,11 @@ struct otx2_flow_config { + #define OTX2_PER_VF_VLAN_FLOWS 2 /* Rx + Tx per VF */ + #define OTX2_VF_VLAN_RX_INDEX 0 + #define OTX2_VF_VLAN_TX_INDEX 1 +- u16 max_flows; +- u8 dmacflt_max_flows; + u32 *bmap_to_dmacindex; + unsigned long *dmacflt_bmap; + struct list_head flow_list; ++ u32 dmacflt_max_flows; ++ u16 max_flows; + }; + + struct otx2_tc_info { +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-mcs-clear-stats-before-freeing-resource.patch b/queue-6.1/octeontx2-pf-mcs-clear-stats-before-freeing-resource.patch new file mode 100644 index 00000000000..74c7b6c0ccc --- /dev/null +++ b/queue-6.1/octeontx2-pf-mcs-clear-stats-before-freeing-resource.patch @@ -0,0 +1,52 @@ +From 5d4a5ea382fe94b57942e726787aa8da67ba8007 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:26 +0530 +Subject: octeontx2-pf: mcs: Clear stats before freeing resource + +From: Subbaraya Sundeep + +[ Upstream commit 815debbbf7b52026462c37eea3be70d6377a7a9a ] + +When freeing MCS hardware resources like SecY, SC and +SA the corresponding stats needs to be cleared. Otherwise +previous stats are shown in newly created macsec interfaces. + +Fixes: c54ffc73601c ("octeontx2-pf: mcs: Introduce MACSEC hardware offloading") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +index f699209978fef..13faca9add9f4 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +@@ -150,11 +150,20 @@ static void cn10k_mcs_free_rsrc(struct otx2_nic *pfvf, enum mcs_direction dir, + enum mcs_rsrc_type type, u16 hw_rsrc_id, + bool all) + { ++ struct mcs_clear_stats *clear_req; + struct mbox *mbox = &pfvf->mbox; + struct mcs_free_rsrc_req *req; + + mutex_lock(&mbox->lock); + ++ clear_req = otx2_mbox_alloc_msg_mcs_clear_stats(mbox); ++ if (!clear_req) ++ goto fail; ++ ++ clear_req->id = hw_rsrc_id; ++ clear_req->type = type; ++ clear_req->dir = dir; ++ + req = otx2_mbox_alloc_msg_mcs_free_resources(mbox); + if (!req) + goto fail; +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-mcs-do-not-reset-pn-while-updating-secy.patch b/queue-6.1/octeontx2-pf-mcs-do-not-reset-pn-while-updating-secy.patch new file mode 100644 index 00000000000..9c410d90523 --- /dev/null +++ b/queue-6.1/octeontx2-pf-mcs-do-not-reset-pn-while-updating-secy.patch @@ -0,0 +1,66 @@ +From 9615125dac603b6e9af172f520a1ecc94fdd2d43 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:28 +0530 +Subject: octeontx2-pf: mcs: Do not reset PN while updating secy + +From: Subbaraya Sundeep + +[ Upstream commit 3c99bace4ad08ad0264285ba8ad73117560992c2 ] + +After creating SecYs, SCs and SAs a SecY can be modified +to change attributes like validation mode, protect frames +mode etc. During this SecY update, packet number is reset to +initial user given value by mistake. Hence do not reset +PN when updating SecY parameters. + +Fixes: c54ffc73601c ("octeontx2-pf: mcs: Introduce MACSEC hardware offloading") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + .../ethernet/marvell/octeontx2/nic/cn10k_macsec.c | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +index 3ad8d7ef20be6..a487a98eac88c 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +@@ -1134,6 +1134,7 @@ static int cn10k_mdo_upd_secy(struct macsec_context *ctx) + struct macsec_secy *secy = ctx->secy; + struct macsec_tx_sa *sw_tx_sa; + struct cn10k_mcs_txsc *txsc; ++ bool active; + u8 sa_num; + int err; + +@@ -1141,15 +1142,19 @@ static int cn10k_mdo_upd_secy(struct macsec_context *ctx) + if (!txsc) + return -ENOENT; + +- txsc->encoding_sa = secy->tx_sc.encoding_sa; +- +- sa_num = txsc->encoding_sa; +- sw_tx_sa = rcu_dereference_bh(secy->tx_sc.sa[sa_num]); ++ /* Encoding SA got changed */ ++ if (txsc->encoding_sa != secy->tx_sc.encoding_sa) { ++ txsc->encoding_sa = secy->tx_sc.encoding_sa; ++ sa_num = txsc->encoding_sa; ++ sw_tx_sa = rcu_dereference_bh(secy->tx_sc.sa[sa_num]); ++ active = sw_tx_sa ? sw_tx_sa->active : false; ++ cn10k_mcs_link_tx_sa2sc(pfvf, secy, txsc, sa_num, active); ++ } + + if (netif_running(secy->netdev)) { + cn10k_mcs_sync_stats(pfvf, secy, txsc); + +- err = cn10k_mcs_secy_tx_cfg(pfvf, secy, txsc, sw_tx_sa, sa_num); ++ err = cn10k_mcs_secy_tx_cfg(pfvf, secy, txsc, NULL, 0); + if (err) + return err; + } +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-mcs-fix-null-pointer-dereferences.patch b/queue-6.1/octeontx2-pf-mcs-fix-null-pointer-dereferences.patch new file mode 100644 index 00000000000..78893ae9289 --- /dev/null +++ b/queue-6.1/octeontx2-pf-mcs-fix-null-pointer-dereferences.patch @@ -0,0 +1,104 @@ +From f6f37ca983e8d7a5b182f4b5226fb87431d8a178 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:24 +0530 +Subject: octeontx2-pf: mcs: Fix NULL pointer dereferences + +From: Subbaraya Sundeep + +[ Upstream commit 699af748c61574125d269db260dabbe20436d74e ] + +When system is rebooted after creating macsec interface +below NULL pointer dereference crashes occurred. This +patch fixes those crashes by using correct order of teardown + +[ 3324.406942] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 +[ 3324.415726] Mem abort info: +[ 3324.418510] ESR = 0x96000006 +[ 3324.421557] EC = 0x25: DABT (current EL), IL = 32 bits +[ 3324.426865] SET = 0, FnV = 0 +[ 3324.429913] EA = 0, S1PTW = 0 +[ 3324.433047] Data abort info: +[ 3324.435921] ISV = 0, ISS = 0x00000006 +[ 3324.439748] CM = 0, WnR = 0 +.... +[ 3324.575915] Call trace: +[ 3324.578353] cn10k_mdo_del_secy+0x24/0x180 +[ 3324.582440] macsec_common_dellink+0xec/0x120 +[ 3324.586788] macsec_notify+0x17c/0x1c0 +[ 3324.590529] raw_notifier_call_chain+0x50/0x70 +[ 3324.594965] call_netdevice_notifiers_info+0x34/0x7c +[ 3324.599921] rollback_registered_many+0x354/0x5bc +[ 3324.604616] unregister_netdevice_queue+0x88/0x10c +[ 3324.609399] unregister_netdev+0x20/0x30 +[ 3324.613313] otx2_remove+0x8c/0x310 +[ 3324.616794] pci_device_shutdown+0x30/0x70 +[ 3324.620882] device_shutdown+0x11c/0x204 + +[ 966.664930] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 +[ 966.673712] Mem abort info: +[ 966.676497] ESR = 0x96000006 +[ 966.679543] EC = 0x25: DABT (current EL), IL = 32 bits +[ 966.684848] SET = 0, FnV = 0 +[ 966.687895] EA = 0, S1PTW = 0 +[ 966.691028] Data abort info: +[ 966.693900] ISV = 0, ISS = 0x00000006 +[ 966.697729] CM = 0, WnR = 0 +[ 966.833467] Call trace: +[ 966.835904] cn10k_mdo_stop+0x20/0xa0 +[ 966.839557] macsec_dev_stop+0xe8/0x11c +[ 966.843384] __dev_close_many+0xbc/0x140 +[ 966.847298] dev_close_many+0x84/0x120 +[ 966.851039] rollback_registered_many+0x114/0x5bc +[ 966.855735] unregister_netdevice_many.part.0+0x14/0xa0 +[ 966.860952] unregister_netdevice_many+0x18/0x24 +[ 966.865560] macsec_notify+0x1ac/0x1c0 +[ 966.869303] raw_notifier_call_chain+0x50/0x70 +[ 966.873738] call_netdevice_notifiers_info+0x34/0x7c +[ 966.878694] rollback_registered_many+0x354/0x5bc +[ 966.883390] unregister_netdevice_queue+0x88/0x10c +[ 966.888173] unregister_netdev+0x20/0x30 +[ 966.892090] otx2_remove+0x8c/0x310 +[ 966.895571] pci_device_shutdown+0x30/0x70 +[ 966.899660] device_shutdown+0x11c/0x204 +[ 966.903574] __do_sys_reboot+0x208/0x290 +[ 966.907487] __arm64_sys_reboot+0x20/0x30 +[ 966.911489] el0_svc_handler+0x80/0x1c0 +[ 966.915316] el0_svc+0x8/0x180 +[ 966.918362] Code: f9400000 f9400a64 91220014 f94b3403 (f9400060) +[ 966.924448] ---[ end trace 341778e799c3d8d7 ]--- + +Fixes: c54ffc73601c ("octeontx2-pf: mcs: Introduce MACSEC hardware offloading") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +index 303930499a4c0..2221220abcaae 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +@@ -3069,8 +3069,6 @@ static void otx2_remove(struct pci_dev *pdev) + otx2_config_pause_frm(pf); + } + +- cn10k_mcs_free(pf); +- + #ifdef CONFIG_DCB + /* Disable PFC config */ + if (pf->pfc_en) { +@@ -3084,6 +3082,7 @@ static void otx2_remove(struct pci_dev *pdev) + + otx2_unregister_dl(pf); + unregister_netdev(netdev); ++ cn10k_mcs_free(pf); + otx2_sriov_disable(pf->pdev); + otx2_sriov_vfcfg_cleanup(pf); + if (pf->otx2_wq) +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-mcs-fix-shared-counters-logic.patch b/queue-6.1/octeontx2-pf-mcs-fix-shared-counters-logic.patch new file mode 100644 index 00000000000..5dbee8b9ff5 --- /dev/null +++ b/queue-6.1/octeontx2-pf-mcs-fix-shared-counters-logic.patch @@ -0,0 +1,106 @@ +From 2867296b9ebb25758830788e06e393d13910de2a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:27 +0530 +Subject: octeontx2-pf: mcs: Fix shared counters logic + +From: Subbaraya Sundeep + +[ Upstream commit 9bdfe61054fb2b989eb58df20bf99c0cf67e3038 ] + +Macsec stats like InPktsLate and InPktsDelayed share +same counter in hardware. If SecY replay_protect is true +then counter represents InPktsLate otherwise InPktsDelayed. +This mode change was tracked based on protect_frames +instead of replay_protect mistakenly. Similarly InPktsUnchecked +and InPktsOk share same counter and mode change was tracked +based on validate_check instead of validate_disabled. +This patch fixes those problems. + +Fixes: c54ffc73601c ("octeontx2-pf: mcs: Introduce MACSEC hardware offloading") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + .../ethernet/marvell/octeontx2/nic/cn10k_macsec.c | 14 +++++++------- + .../ethernet/marvell/octeontx2/nic/otx2_common.h | 2 +- + 2 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +index 13faca9add9f4..3ad8d7ef20be6 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +@@ -1014,7 +1014,7 @@ static void cn10k_mcs_sync_stats(struct otx2_nic *pfvf, struct macsec_secy *secy + + /* Check if sync is really needed */ + if (secy->validate_frames == txsc->last_validate_frames && +- secy->protect_frames == txsc->last_protect_frames) ++ secy->replay_protect == txsc->last_replay_protect) + return; + + cn10k_mcs_secy_stats(pfvf, txsc->hw_secy_id_rx, &rx_rsp, MCS_RX, true); +@@ -1036,19 +1036,19 @@ static void cn10k_mcs_sync_stats(struct otx2_nic *pfvf, struct macsec_secy *secy + rxsc->stats.InPktsInvalid += sc_rsp.pkt_invalid_cnt; + rxsc->stats.InPktsNotValid += sc_rsp.pkt_notvalid_cnt; + +- if (txsc->last_protect_frames) ++ if (txsc->last_replay_protect) + rxsc->stats.InPktsLate += sc_rsp.pkt_late_cnt; + else + rxsc->stats.InPktsDelayed += sc_rsp.pkt_late_cnt; + +- if (txsc->last_validate_frames == MACSEC_VALIDATE_CHECK) ++ if (txsc->last_validate_frames == MACSEC_VALIDATE_DISABLED) + rxsc->stats.InPktsUnchecked += sc_rsp.pkt_unchecked_cnt; + else + rxsc->stats.InPktsOK += sc_rsp.pkt_unchecked_cnt; + } + + txsc->last_validate_frames = secy->validate_frames; +- txsc->last_protect_frames = secy->protect_frames; ++ txsc->last_replay_protect = secy->replay_protect; + } + + static int cn10k_mdo_open(struct macsec_context *ctx) +@@ -1117,7 +1117,7 @@ static int cn10k_mdo_add_secy(struct macsec_context *ctx) + txsc->sw_secy = secy; + txsc->encoding_sa = secy->tx_sc.encoding_sa; + txsc->last_validate_frames = secy->validate_frames; +- txsc->last_protect_frames = secy->protect_frames; ++ txsc->last_replay_protect = secy->replay_protect; + + list_add(&txsc->entry, &cfg->txsc_list); + +@@ -1538,12 +1538,12 @@ static int cn10k_mdo_get_rx_sc_stats(struct macsec_context *ctx) + rxsc->stats.InPktsInvalid += rsp.pkt_invalid_cnt; + rxsc->stats.InPktsNotValid += rsp.pkt_notvalid_cnt; + +- if (secy->protect_frames) ++ if (secy->replay_protect) + rxsc->stats.InPktsLate += rsp.pkt_late_cnt; + else + rxsc->stats.InPktsDelayed += rsp.pkt_late_cnt; + +- if (secy->validate_frames == MACSEC_VALIDATE_CHECK) ++ if (secy->validate_frames == MACSEC_VALIDATE_DISABLED) + rxsc->stats.InPktsUnchecked += rsp.pkt_unchecked_cnt; + else + rxsc->stats.InPktsOK += rsp.pkt_unchecked_cnt; +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +index 712715a49d201..634ca4140346b 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +@@ -386,7 +386,7 @@ struct cn10k_mcs_txsc { + struct cn10k_txsc_stats stats; + struct list_head entry; + enum macsec_validation_type last_validate_frames; +- bool last_protect_frames; ++ bool last_replay_protect; + u16 hw_secy_id_tx; + u16 hw_secy_id_rx; + u16 hw_flow_id; +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-pf-mcs-match-macsec-ethertype-along-with-d.patch b/queue-6.1/octeontx2-pf-mcs-match-macsec-ethertype-along-with-d.patch new file mode 100644 index 00000000000..7bdfc7e5831 --- /dev/null +++ b/queue-6.1/octeontx2-pf-mcs-match-macsec-ethertype-along-with-d.patch @@ -0,0 +1,72 @@ +From 00fd410700acd24cbc0d8b72dc83ca8dda581547 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:25 +0530 +Subject: octeontx2-pf: mcs: Match macsec ethertype along with DMAC + +From: Subbaraya Sundeep + +[ Upstream commit 57d00d4364f314485092667d2a48718985515deb ] + +On CN10KB silicon a single hardware macsec block is +present and offloads macsec operations for all the +ethernet LMACs. TCAM match with macsec ethertype 0x88e5 +alone at RX side is not sufficient to distinguish all the +macsec interfaces created on top of netdevs. Hence append +the DMAC of the macsec interface too. Otherwise the first +created macsec interface only receives all the macsec traffic. + +Fixes: c54ffc73601c ("octeontx2-pf: mcs: Introduce MACSEC hardware offloading") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Goutham +Signed-off-by: Geetha sowjanya +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + .../net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +index 9ec5f38d38a84..f699209978fef 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c +@@ -9,6 +9,7 @@ + #include + #include "otx2_common.h" + ++#define MCS_TCAM0_MAC_DA_MASK GENMASK_ULL(47, 0) + #define MCS_TCAM0_MAC_SA_MASK GENMASK_ULL(63, 48) + #define MCS_TCAM1_MAC_SA_MASK GENMASK_ULL(31, 0) + #define MCS_TCAM1_ETYPE_MASK GENMASK_ULL(47, 32) +@@ -237,8 +238,10 @@ static int cn10k_mcs_write_rx_flowid(struct otx2_nic *pfvf, + struct cn10k_mcs_rxsc *rxsc, u8 hw_secy_id) + { + struct macsec_rx_sc *sw_rx_sc = rxsc->sw_rxsc; ++ struct macsec_secy *secy = rxsc->sw_secy; + struct mcs_flowid_entry_write_req *req; + struct mbox *mbox = &pfvf->mbox; ++ u64 mac_da; + int ret; + + mutex_lock(&mbox->lock); +@@ -249,11 +252,16 @@ static int cn10k_mcs_write_rx_flowid(struct otx2_nic *pfvf, + goto fail; + } + ++ mac_da = ether_addr_to_u64(secy->netdev->dev_addr); ++ ++ req->data[0] = FIELD_PREP(MCS_TCAM0_MAC_DA_MASK, mac_da); ++ req->mask[0] = ~0ULL; ++ req->mask[0] = ~MCS_TCAM0_MAC_DA_MASK; ++ + req->data[1] = FIELD_PREP(MCS_TCAM1_ETYPE_MASK, ETH_P_MACSEC); + req->mask[1] = ~0ULL; + req->mask[1] &= ~MCS_TCAM1_ETYPE_MASK; + +- req->mask[0] = ~0ULL; + req->mask[2] = ~0ULL; + req->mask[3] = ~0ULL; + +-- +2.39.2 + diff --git a/queue-6.1/octeontx2-vf-detach-lf-resources-on-probe-cleanup.patch b/queue-6.1/octeontx2-vf-detach-lf-resources-on-probe-cleanup.patch new file mode 100644 index 00000000000..019f66b63ea --- /dev/null +++ b/queue-6.1/octeontx2-vf-detach-lf-resources-on-probe-cleanup.patch @@ -0,0 +1,39 @@ +From 19eebb8250757e8e1a70adb6f69361a0fa3949f0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 May 2023 12:39:44 +0530 +Subject: octeontx2-vf: Detach LF resources on probe cleanup + +From: Subbaraya Sundeep + +[ Upstream commit 99ae1260fdb5f15beab8a3adfb93a9041c87a2c1 ] + +When a VF device probe fails due to error in MSIX vector allocation then +the resources NIX and NPA LFs were not detached. Fix this by detaching +the LFs when MSIX vector allocation fails. + +Fixes: 3184fb5ba96e ("octeontx2-vf: Virtual function driver support") +Signed-off-by: Subbaraya Sundeep +Signed-off-by: Sunil Kovvuri Goutham +Signed-off-by: Sai Krishna +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c +index ab126f8706c74..53366dbfbf27c 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c +@@ -621,7 +621,7 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id) + + err = otx2vf_realloc_msix_vectors(vf); + if (err) +- goto err_mbox_destroy; ++ goto err_detach_rsrc; + + err = otx2_set_real_num_queues(netdev, qcount, qcount); + if (err) +-- +2.39.2 + diff --git a/queue-6.1/octeonxt2-af-mcs-fix-per-port-bypass-config.patch b/queue-6.1/octeonxt2-af-mcs-fix-per-port-bypass-config.patch new file mode 100644 index 00000000000..36baee9992a --- /dev/null +++ b/queue-6.1/octeonxt2-af-mcs-fix-per-port-bypass-config.patch @@ -0,0 +1,89 @@ +From 18411863eaad4e9f5de673e2018c2f5bb93bd0ba Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 11:55:20 +0530 +Subject: octeonxt2-af: mcs: Fix per port bypass config + +From: Geetha sowjanya + +[ Upstream commit c222b292a3568754828ffd30338d2909b14ed160 ] + +For each lmac port, MCS has two MCS_TOP_SLAVE_CHANNEL_CONFIGX +registers. For CN10KB both register need to be configured for the +port level mcs bypass to work. This patch also sets bitmap +of flowid/secy entry reserved for default bypass so that these +entries can be shown in debugfs. + +Fixes: bd69476e86fc ("octeontx2-af: cn10k: mcs: Install a default TCAM for normal traffic") +Signed-off-by: Geetha sowjanya +Signed-off-by: Sunil Goutham +Reviewed-by: Leon Romanovsky +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/marvell/octeontx2/af/mcs.c | 11 ++++++++++- + .../net/ethernet/marvell/octeontx2/af/rvu_debugfs.c | 5 +++-- + 2 files changed, 13 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +index f68a6a0e3aa41..492baa0b594ce 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +@@ -494,6 +494,9 @@ int mcs_install_flowid_bypass_entry(struct mcs *mcs) + + /* Flow entry */ + flow_id = mcs->hw->tcam_entries - MCS_RSRC_RSVD_CNT; ++ __set_bit(flow_id, mcs->rx.flow_ids.bmap); ++ __set_bit(flow_id, mcs->tx.flow_ids.bmap); ++ + for (reg_id = 0; reg_id < 4; reg_id++) { + reg = MCSX_CPM_RX_SLAVE_FLOWID_TCAM_MASKX(reg_id, flow_id); + mcs_reg_write(mcs, reg, GENMASK_ULL(63, 0)); +@@ -504,6 +507,8 @@ int mcs_install_flowid_bypass_entry(struct mcs *mcs) + } + /* secy */ + secy_id = mcs->hw->secy_entries - MCS_RSRC_RSVD_CNT; ++ __set_bit(secy_id, mcs->rx.secy.bmap); ++ __set_bit(secy_id, mcs->tx.secy.bmap); + + /* Set validate frames to NULL and enable control port */ + plcy = 0x7ull; +@@ -528,6 +533,7 @@ int mcs_install_flowid_bypass_entry(struct mcs *mcs) + /* Enable Flowid entry */ + mcs_ena_dis_flowid_entry(mcs, flow_id, MCS_RX, true); + mcs_ena_dis_flowid_entry(mcs, flow_id, MCS_TX, true); ++ + return 0; + } + +@@ -1325,8 +1331,11 @@ void mcs_reset_port(struct mcs *mcs, u8 port_id, u8 reset) + void mcs_set_lmac_mode(struct mcs *mcs, int lmac_id, u8 mode) + { + u64 reg; ++ int id = lmac_id * 2; + +- reg = MCSX_MCS_TOP_SLAVE_CHANNEL_CFG(lmac_id * 2); ++ reg = MCSX_MCS_TOP_SLAVE_CHANNEL_CFG(id); ++ mcs_reg_write(mcs, reg, (u64)mode); ++ reg = MCSX_MCS_TOP_SLAVE_CHANNEL_CFG((id + 1)); + mcs_reg_write(mcs, reg, (u64)mode); + } + +diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c +index abef0fd4259a3..0cab27448399c 100644 +--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c ++++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c +@@ -497,8 +497,9 @@ static int rvu_dbg_mcs_rx_secy_stats_display(struct seq_file *filp, void *unused + stats.octet_validated_cnt); + seq_printf(filp, "secy%d: Pkts on disable port: %lld\n", secy_id, + stats.pkt_port_disabled_cnt); +- seq_printf(filp, "secy%d: Octets validated: %lld\n", secy_id, stats.pkt_badtag_cnt); +- seq_printf(filp, "secy%d: Octets validated: %lld\n", secy_id, stats.pkt_nosa_cnt); ++ seq_printf(filp, "secy%d: Pkts with badtag: %lld\n", secy_id, stats.pkt_badtag_cnt); ++ seq_printf(filp, "secy%d: Pkts with no SA(sectag.tci.c=0): %lld\n", secy_id, ++ stats.pkt_nosa_cnt); + seq_printf(filp, "secy%d: Pkts with nosaerror: %lld\n", secy_id, + stats.pkt_nosaerror_cnt); + seq_printf(filp, "secy%d: Tagged ctrl pkts: %lld\n", secy_id, +-- +2.39.2 + diff --git a/queue-6.1/perf-cs-etm-fix-timeless-decode-mode-detection.patch b/queue-6.1/perf-cs-etm-fix-timeless-decode-mode-detection.patch new file mode 100644 index 00000000000..7371bb987fa --- /dev/null +++ b/queue-6.1/perf-cs-etm-fix-timeless-decode-mode-detection.patch @@ -0,0 +1,121 @@ +From e28a3d88f00e5765cb7edf1a50cbd087aab4a164 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Apr 2023 14:47:41 +0100 +Subject: perf cs-etm: Fix timeless decode mode detection + +From: James Clark + +[ Upstream commit 449067f3fc9f340da54e383738286881e6634d0b ] + +In this context, timeless refers to the trace data rather than the perf +event data. But when detecting whether there are timestamps in the trace +data or not, the presence of a timestamp flag on any perf event is used. + +Since commit f42c0ce573df ("perf record: Always get text_poke events +with --kcore option") timestamps were added to a tracking event when +--kcore is used which breaks this detection mechanism. Fix it by +detecting if trace timestamps exist by looking at the ETM config flags. +This would have always been a more accurate way of doing it anyway. + +This fixes the following error message when using --kcore with +Coresight: + + $ perf record --kcore -e cs_etm// --per-thread + $ perf report + The perf.data/data data has no samples! + +Fixes: f42c0ce573df79d1 ("perf record: Always get text_poke events with --kcore option") +Reported-by: Yang Shi +Signed-off-by: James Clark +Cc: Adrian Hunter +Cc: Alexander Shishkin +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: John Garry +Cc: Leo Yan +Cc: Mark Rutland +Cc: Mathieu Poirier +Cc: Mike Leach +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Suzuki Poulouse +Cc: Will Deacon +Cc: coresight@lists.linaro.org +Cc: denik@google.com +Cc: linux-arm-kernel@lists.infradead.org +Link: https://lore.kernel.org/lkml/CAHbLzkrJQTrYBtPkf=jf3OpQ-yBcJe7XkvQstX9j2frz4WF-SQ@mail.gmail.com/ +Link: https://lore.kernel.org/r/20230424134748.228137-2-james.clark@arm.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/util/cs-etm.c | 30 ++++++++++++++++++------------ + 1 file changed, 18 insertions(+), 12 deletions(-) + +diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c +index 16db965ac995e..09e240e4477d0 100644 +--- a/tools/perf/util/cs-etm.c ++++ b/tools/perf/util/cs-etm.c +@@ -2488,26 +2488,29 @@ static int cs_etm__process_auxtrace_event(struct perf_session *session, + return 0; + } + +-static bool cs_etm__is_timeless_decoding(struct cs_etm_auxtrace *etm) ++static int cs_etm__setup_timeless_decoding(struct cs_etm_auxtrace *etm) + { + struct evsel *evsel; + struct evlist *evlist = etm->session->evlist; +- bool timeless_decoding = true; + + /* Override timeless mode with user input from --itrace=Z */ +- if (etm->synth_opts.timeless_decoding) +- return true; ++ if (etm->synth_opts.timeless_decoding) { ++ etm->timeless_decoding = true; ++ return 0; ++ } + + /* +- * Circle through the list of event and complain if we find one +- * with the time bit set. ++ * Find the cs_etm evsel and look at what its timestamp setting was + */ +- evlist__for_each_entry(evlist, evsel) { +- if ((evsel->core.attr.sample_type & PERF_SAMPLE_TIME)) +- timeless_decoding = false; +- } ++ evlist__for_each_entry(evlist, evsel) ++ if (cs_etm__evsel_is_auxtrace(etm->session, evsel)) { ++ etm->timeless_decoding = ++ !(evsel->core.attr.config & BIT(ETM_OPT_TS)); ++ return 0; ++ } + +- return timeless_decoding; ++ pr_err("CS ETM: Couldn't find ETM evsel\n"); ++ return -EINVAL; + } + + static const char * const cs_etm_global_header_fmts[] = { +@@ -3051,7 +3054,6 @@ int cs_etm__process_auxtrace_info(union perf_event *event, + etm->snapshot_mode = (hdr[CS_ETM_SNAPSHOT] != 0); + etm->metadata = metadata; + etm->auxtrace_type = auxtrace_info->type; +- etm->timeless_decoding = cs_etm__is_timeless_decoding(etm); + + etm->auxtrace.process_event = cs_etm__process_event; + etm->auxtrace.process_auxtrace_event = cs_etm__process_auxtrace_event; +@@ -3061,6 +3063,10 @@ int cs_etm__process_auxtrace_info(union perf_event *event, + etm->auxtrace.evsel_is_auxtrace = cs_etm__evsel_is_auxtrace; + session->auxtrace = &etm->auxtrace; + ++ err = cs_etm__setup_timeless_decoding(etm); ++ if (err) ++ return err; ++ + etm->unknown_thread = thread__new(999999999, 999999999); + if (!etm->unknown_thread) { + err = -ENOMEM; +-- +2.39.2 + diff --git a/queue-6.1/perf-ftrace-make-system-wide-the-default-target-for-.patch b/queue-6.1/perf-ftrace-make-system-wide-the-default-target-for-.patch new file mode 100644 index 00000000000..d588ba63093 --- /dev/null +++ b/queue-6.1/perf-ftrace-make-system-wide-the-default-target-for-.patch @@ -0,0 +1,86 @@ +From cdab74585e01c87a1a1eba004b6aa9b9b2b527a8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 24 Mar 2023 03:27:02 +0000 +Subject: perf ftrace: Make system wide the default target for latency + subcommand + +From: Yang Jihong + +[ Upstream commit ecd4960d908e27e40b63a7046df2f942c148c6f6 ] + +If no target is specified for 'latency' subcommand, the execution fails +because - 1 (invalid value) is written to set_ftrace_pid tracefs file. +Make system wide the default target, which is the same as the default +behavior of 'trace' subcommand. + +Before the fix: + + # perf ftrace latency -T schedule + failed to set ftrace pid + +After the fix: + + # perf ftrace latency -T schedule + ^C# DURATION | COUNT | GRAPH | + 0 - 1 us | 0 | | + 1 - 2 us | 0 | | + 2 - 4 us | 0 | | + 4 - 8 us | 2828 | #### | + 8 - 16 us | 23953 | ######################################## | + 16 - 32 us | 408 | | + 32 - 64 us | 318 | | + 64 - 128 us | 4 | | + 128 - 256 us | 3 | | + 256 - 512 us | 0 | | + 512 - 1024 us | 1 | | + 1 - 2 ms | 4 | | + 2 - 4 ms | 0 | | + 4 - 8 ms | 0 | | + 8 - 16 ms | 0 | | + 16 - 32 ms | 0 | | + 32 - 64 ms | 0 | | + 64 - 128 ms | 0 | | + 128 - 256 ms | 4 | | + 256 - 512 ms | 2 | | + 512 - 1024 ms | 0 | | + 1 - ... s | 0 | | + +Fixes: 53be50282269b46c ("perf ftrace: Add 'latency' subcommand") +Signed-off-by: Yang Jihong +Acked-by: Namhyung Kim +Cc: Adrian Hunter +Cc: Alexander Shishkin +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Mark Rutland +Cc: Peter Zijlstra +Link: https://lore.kernel.org/r/20230324032702.109964-1-yangjihong1@huawei.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/builtin-ftrace.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/tools/perf/builtin-ftrace.c b/tools/perf/builtin-ftrace.c +index 7de07bb16d235..4bc5b7cf3e04b 100644 +--- a/tools/perf/builtin-ftrace.c ++++ b/tools/perf/builtin-ftrace.c +@@ -1228,10 +1228,12 @@ int cmd_ftrace(int argc, const char **argv) + goto out_delete_filters; + } + ++ /* Make system wide (-a) the default target. */ ++ if (!argc && target__none(&ftrace.target)) ++ ftrace.target.system_wide = true; ++ + switch (subcmd) { + case PERF_FTRACE_TRACE: +- if (!argc && target__none(&ftrace.target)) +- ftrace.target.system_wide = true; + cmd_func = __cmd_ftrace; + break; + case PERF_FTRACE_LATENCY: +-- +2.39.2 + diff --git a/queue-6.1/perf-map-delete-two-variable-initialisations-before-.patch b/queue-6.1/perf-map-delete-two-variable-initialisations-before-.patch new file mode 100644 index 00000000000..7c438a41a46 --- /dev/null +++ b/queue-6.1/perf-map-delete-two-variable-initialisations-before-.patch @@ -0,0 +1,60 @@ +From 8811ea689f19158f4c993ca369309973d2ca1ff2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Apr 2023 14:46:39 +0200 +Subject: perf map: Delete two variable initialisations before null pointer + checks in sort__sym_from_cmp() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Markus Elfring + +[ Upstream commit c160118a90d4acf335993d8d59b02ae2147a524e ] + +Addresses of two data structure members were determined before +corresponding null pointer checks in the implementation of the function +“sort__sym_from_cmp”. + +Thus avoid the risk for undefined behaviour by removing extra +initialisations for the local variables “from_l” and “from_r” (also +because they were already reassigned with the same value behind this +pointer check). + +This issue was detected by using the Coccinelle software. + +Fixes: 1b9e97a2a95e4941 ("perf tools: Fix report -F symbol_from for data without branch info") +Signed-off-by: +Acked-by: Ian Rogers +Cc: Adrian Hunter +Cc: Alexander Shishkin +Cc: Andi Kleen +Cc: German Gomez +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Kan Liang +Cc: Mark Rutland +Cc: Namhyung Kim +Link: https://lore.kernel.org/cocci/54a21fea-64e3-de67-82ef-d61b90ffad05@web.de/ +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/util/sort.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c +index 2e7330867e2ef..6882b17144994 100644 +--- a/tools/perf/util/sort.c ++++ b/tools/perf/util/sort.c +@@ -876,8 +876,7 @@ static int hist_entry__dso_to_filter(struct hist_entry *he, int type, + static int64_t + sort__sym_from_cmp(struct hist_entry *left, struct hist_entry *right) + { +- struct addr_map_symbol *from_l = &left->branch_info->from; +- struct addr_map_symbol *from_r = &right->branch_info->from; ++ struct addr_map_symbol *from_l, *from_r; + + if (!left->branch_info || !right->branch_info) + return cmp_null(left->branch_info, right->branch_info); +-- +2.39.2 + diff --git a/queue-6.1/perf-pmu-zfree-expects-a-pointer-to-a-pointer-to-zer.patch b/queue-6.1/perf-pmu-zfree-expects-a-pointer-to-a-pointer-to-zer.patch new file mode 100644 index 00000000000..796fd6c6bee --- /dev/null +++ b/queue-6.1/perf-pmu-zfree-expects-a-pointer-to-a-pointer-to-zer.patch @@ -0,0 +1,35 @@ +From 8e4084315acbdbcb65385960d933aab89ecf9279 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Apr 2023 10:23:35 -0300 +Subject: perf pmu: zfree() expects a pointer to a pointer to zero it after + freeing its contents + +From: Arnaldo Carvalho de Melo + +[ Upstream commit 57f14b5ae1a97537f2abd2828ee7212cada7036e ] + +An audit showed just this one problem with zfree(), fix it. + +Fixes: 9fbc61f832ebf432 ("perf pmu: Add support for PMU capabilities") +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/util/pmu.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c +index 03284059175f7..9a762c0cc53ce 100644 +--- a/tools/perf/util/pmu.c ++++ b/tools/perf/util/pmu.c +@@ -1845,7 +1845,7 @@ static int perf_pmu__new_caps(struct list_head *list, char *name, char *value) + return 0; + + free_name: +- zfree(caps->name); ++ zfree(&caps->name); + free_caps: + free(caps); + +-- +2.39.2 + diff --git a/queue-6.1/perf-record-fix-read-lost-count-failed-msg-with-samp.patch b/queue-6.1/perf-record-fix-read-lost-count-failed-msg-with-samp.patch new file mode 100644 index 00000000000..72207f2af0f --- /dev/null +++ b/queue-6.1/perf-record-fix-read-lost-count-failed-msg-with-samp.patch @@ -0,0 +1,59 @@ +From 56f62298ea2b4b9edb8bb08a0e8079c7383cafa5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 Mar 2023 07:04:13 -0800 +Subject: perf record: Fix "read LOST count failed" msg with sample read + +From: Kan Liang + +[ Upstream commit 07d85ba9d04e1ebd282f656a29ddf08c5b7b32a2 ] + +Hundreds of "read LOST count failed" error messages may be displayed, +when the below command is launched. + +perf record -e '{cpu/mem-loads-aux/,cpu/event=0xcd,umask=0x1/}:S' -a + +According to the commit 89e3106fa25fb1b6 ("libperf: Handle read format +in perf_evsel__read()"), the PERF_FORMAT_GROUP is only available for +the leader. However, the record__read_lost_samples() goes through every +entry of an evlist, which includes both leader and member. The member +event errors out and triggers the error message. Since there may be +hundreds of CPUs on a server, the message will be printed hundreds of +times, which is very annoying. + +The message itself is correct, but the pr_err is a overkill. Other error +messages in the record__read_lost_samples() are all pr_debug. To make +the output format consistent, change the pr_err("read LOST count +failed\n"); to pr_debug("read LOST count failed\n");. +User can still get the message via -v option. + +Fixes: e3a23261ad06d598 ("perf record: Read and inject LOST_SAMPLES events") +Signed-off-by: Kan Liang +Acked-by: Namhyung Kim +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Namhyung Kim +Cc: Peter Zijlstra +Link: https://lore.kernel.org/r/20230301150413.27011-1-kan.liang@linux.intel.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/builtin-record.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c +index 48c3461b496c4..7314183cdcb6c 100644 +--- a/tools/perf/builtin-record.c ++++ b/tools/perf/builtin-record.c +@@ -1864,7 +1864,7 @@ static void __record__read_lost_samples(struct record *rec, struct evsel *evsel, + int id_hdr_size; + + if (perf_evsel__read(&evsel->core, cpu_idx, thread_idx, &count) < 0) { +- pr_err("read LOST count failed\n"); ++ pr_debug("read LOST count failed\n"); + return; + } + +-- +2.39.2 + diff --git a/queue-6.1/perf-scripts-intel-pt-events.py-fix-ipc-output-for-p.patch b/queue-6.1/perf-scripts-intel-pt-events.py-fix-ipc-output-for-p.patch new file mode 100644 index 00000000000..ce7f577ac64 --- /dev/null +++ b/queue-6.1/perf-scripts-intel-pt-events.py-fix-ipc-output-for-p.patch @@ -0,0 +1,40 @@ +From 2595e7c694bd3067d66fcad83952f18b026cbee3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 10 Mar 2023 15:04:45 +0000 +Subject: perf scripts intel-pt-events.py: Fix IPC output for Python 2 + +From: Roman Lozko + +[ Upstream commit 1f64cfdebfe0494264271e8d7a3a47faf5f58ec7 ] + +Integers are not converted to floats during division in Python 2 which +results in incorrect IPC values. Fix by switching to new division +behavior. + +Fixes: a483e64c0b62e93a ("perf scripting python: intel-pt-events.py: Add --insn-trace and --src-trace") +Signed-off-by: Roman Lozko +Acked-by: Adrian Hunter +Cc: Adrian Hunter +Link: https://lore.kernel.org/r/20230310150445.2925841-1-lozko.roma@gmail.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/scripts/python/intel-pt-events.py | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/scripts/python/intel-pt-events.py b/tools/perf/scripts/python/intel-pt-events.py +index 6be7fd8fd6158..8058b2fc2b686 100644 +--- a/tools/perf/scripts/python/intel-pt-events.py ++++ b/tools/perf/scripts/python/intel-pt-events.py +@@ -11,7 +11,7 @@ + # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + # more details. + +-from __future__ import print_function ++from __future__ import division, print_function + + import os + import sys +-- +2.39.2 + diff --git a/queue-6.1/perf-stat-separate-bperf-from-bpf_profiler.patch b/queue-6.1/perf-stat-separate-bperf-from-bpf_profiler.patch new file mode 100644 index 00000000000..d673cdb0f19 --- /dev/null +++ b/queue-6.1/perf-stat-separate-bperf-from-bpf_profiler.patch @@ -0,0 +1,103 @@ +From 98fa6cf561d3950e9e3ef56ae071fae994562f6b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Apr 2023 20:23:16 +0200 +Subject: perf stat: Separate bperf from bpf_profiler + +From: Dmitrii Dolgov <9erthalion6@gmail.com> + +[ Upstream commit ecc68ee216c6c5b2f84915e1441adf436f1b019b ] + +It seems that perf stat -b doesn't produce any results: + + $ perf stat -e cycles -b 4 -I 10000 -vvv + Control descriptor is not initialized + cycles: 0 0 0 + time counts unit events + 10.007641640 cycles + +Looks like this happens because fentry/fexit progs are getting loaded, but the +corresponding perf event is not enabled and not added into the events bpf map. +I think there is some mixing up between two type of bpf support, one for bperf +and one for bpf_profiler. Both are identified via evsel__is_bpf, based on which +perf events are enabled, but for the latter (bpf_profiler) a perf event is +required. Using evsel__is_bperf to check only bperf produces expected results: + + $ perf stat -e cycles -b 4 -I 10000 -vvv + Control descriptor is not initialized + ------------------------------------------------------------ + perf_event_attr: + size 136 + sample_type IDENTIFIER + read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING + disabled 1 + exclude_guest 1 + ------------------------------------------------------------ + sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8 = 3 + ------------------------------------------------------------ + [...perf_event_attr for other CPUs...] + ------------------------------------------------------------ + cycles: 309426 169009 169009 + time counts unit events + 10.010091271 309426 cycles + +The final numbers correspond (at least in the level of magnitude) to the +same metric obtained via bpftool. + +Fixes: 112cb56164bc2108 ("perf stat: Introduce config stat.bpf-counter-events") +Reviewed-by: Song Liu +Signed-off-by: Dmitrii Dolgov <9erthalion6@gmail.com> +Tested-by: Song Liu +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Namhyung Kim +Cc: Song Liu +Link: https://lore.kernel.org/r/20230412182316.11628-1-9erthalion6@gmail.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/builtin-stat.c | 4 ++-- + tools/perf/util/evsel.h | 5 +++++ + 2 files changed, 7 insertions(+), 2 deletions(-) + +diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c +index f6427e3a47421..a2c74a34e4a44 100644 +--- a/tools/perf/builtin-stat.c ++++ b/tools/perf/builtin-stat.c +@@ -765,7 +765,7 @@ static int __run_perf_stat(int argc, const char **argv, int run_idx) + counter->reset_group = false; + if (bpf_counter__load(counter, &target)) + return -1; +- if (!evsel__is_bpf(counter)) ++ if (!(evsel__is_bperf(counter))) + all_counters_use_bpf = false; + } + +@@ -781,7 +781,7 @@ static int __run_perf_stat(int argc, const char **argv, int run_idx) + + if (counter->reset_group || counter->errored) + continue; +- if (evsel__is_bpf(counter)) ++ if (evsel__is_bperf(counter)) + continue; + try_again: + if (create_perf_stat_counter(counter, &stat_config, &target, +diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h +index 989865e16aadd..8ce30329a0772 100644 +--- a/tools/perf/util/evsel.h ++++ b/tools/perf/util/evsel.h +@@ -263,6 +263,11 @@ static inline bool evsel__is_bpf(struct evsel *evsel) + return evsel->bpf_counter_ops != NULL; + } + ++static inline bool evsel__is_bperf(struct evsel *evsel) ++{ ++ return evsel->bpf_counter_ops != NULL && list_empty(&evsel->bpf_counter_list); ++} ++ + #define EVSEL__MAX_ALIASES 8 + + extern const char *const evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX][EVSEL__MAX_ALIASES]; +-- +2.39.2 + diff --git a/queue-6.1/perf-symbols-fix-return-incorrect-build_id-size-in-e.patch b/queue-6.1/perf-symbols-fix-return-incorrect-build_id-size-in-e.patch new file mode 100644 index 00000000000..afdf7d5ce6b --- /dev/null +++ b/queue-6.1/perf-symbols-fix-return-incorrect-build_id-size-in-e.patch @@ -0,0 +1,52 @@ +From 440019f365ec9a5f966517544985899e91f51516 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Apr 2023 01:28:41 +0000 +Subject: perf symbols: Fix return incorrect build_id size in + elf_read_build_id() + +From: Yang Jihong + +[ Upstream commit 1511e4696acb715a4fe48be89e1e691daec91c0e ] + +In elf_read_build_id(), if gnu build_id is found, should return the size of +the actually copied data. If descsz is greater thanBuild_ID_SIZE, +write_buildid data access may occur. + +Fixes: be96ea8ffa788dcc ("perf symbols: Fix issue with binaries using 16-bytes buildids (v2)") +Reported-by: Will Ochowicz +Signed-off-by: Yang Jihong +Tested-by: Will Ochowicz +Acked-by: Adrian Hunter +Cc: Alexander Shishkin +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Leo Yan +Cc: Mark Rutland +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Stephane Eranian +Link: https://lore.kernel.org/lkml/CWLP265MB49702F7BA3D6D8F13E4B1A719C649@CWLP265MB4970.GBRP265.PROD.OUTLOOK.COM/T/ +Link: https://lore.kernel.org/r/20230427012841.231729-1-yangjihong1@huawei.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/util/symbol-elf.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c +index 80345695b1360..29c9348c30f00 100644 +--- a/tools/perf/util/symbol-elf.c ++++ b/tools/perf/util/symbol-elf.c +@@ -553,7 +553,7 @@ static int elf_read_build_id(Elf *elf, void *bf, size_t size) + size_t sz = min(size, descsz); + memcpy(bf, ptr, sz); + memset(bf + sz, 0, size - sz); +- err = descsz; ++ err = sz; + break; + } + } +-- +2.39.2 + diff --git a/queue-6.1/perf-tests-record_offcpu.sh-fix-redirection-of-stder.patch b/queue-6.1/perf-tests-record_offcpu.sh-fix-redirection-of-stder.patch new file mode 100644 index 00000000000..f2cd79e77e7 --- /dev/null +++ b/queue-6.1/perf-tests-record_offcpu.sh-fix-redirection-of-stder.patch @@ -0,0 +1,38 @@ +From 523b2a280520d18d8acac6cb31ec0240c6295f44 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 3 Mar 2023 20:30:58 +0100 +Subject: perf tests record_offcpu.sh: Fix redirection of stderr to stdin + +From: Patrice Duroux + +[ Upstream commit 9835b742ac3ee16dee361e7ccda8022f99d1cd94 ] + +It's not 2&>1, the correct is 2>&1 + +Fixes: ade1d0307b2fb3d9 ("perf offcpu: Update offcpu test for child process") +Signed-off-by: Patrice Duroux +Acked-by: Ian Rogers +Cc: Namhyung Kim +Link: https://lore.kernel.org/r/20230303193058.21274-1-patrice.duroux@gmail.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/tests/shell/record_offcpu.sh | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/tests/shell/record_offcpu.sh b/tools/perf/tests/shell/record_offcpu.sh +index d2eba583a2ac9..054272750aa9c 100755 +--- a/tools/perf/tests/shell/record_offcpu.sh ++++ b/tools/perf/tests/shell/record_offcpu.sh +@@ -65,7 +65,7 @@ test_offcpu_child() { + + # perf bench sched messaging creates 400 processes + if ! perf record --off-cpu -e dummy -o ${perfdata} -- \ +- perf bench sched messaging -g 10 > /dev/null 2&>1 ++ perf bench sched messaging -g 10 > /dev/null 2>&1 + then + echo "Child task off-cpu test [Failed record]" + err=1 +-- +2.39.2 + diff --git a/queue-6.1/perf-tracepoint-fix-memory-leak-in-is_valid_tracepoi.patch b/queue-6.1/perf-tracepoint-fix-memory-leak-in-is_valid_tracepoi.patch new file mode 100644 index 00000000000..31fa716dee0 --- /dev/null +++ b/queue-6.1/perf-tracepoint-fix-memory-leak-in-is_valid_tracepoi.patch @@ -0,0 +1,44 @@ +From cd955284786baf857cefc4a48e560e7bd43d929f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Apr 2023 02:59:53 +0000 +Subject: perf tracepoint: Fix memory leak in is_valid_tracepoint() + +From: Yang Jihong + +[ Upstream commit 9b86c49710eec7b4fbb78a0232b2dd0972a2b576 ] + +When is_valid_tracepoint() returns 1, need to call put_events_file() to +free `dir_path`. + +Fixes: 25a7d914274de386 ("perf parse-events: Use get/put_events_file()") +Signed-off-by: Yang Jihong +Cc: Adrian Hunter +Cc: Alexander Shishkin +Cc: Ian Rogers +Cc: Ingo Molnar +Cc: Jiri Olsa +Cc: Mark Rutland +Cc: Namhyung Kim +Cc: Peter Zijlstra +Link: https://lore.kernel.org/r/20230421025953.173826-1-yangjihong1@huawei.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/util/tracepoint.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/tools/perf/util/tracepoint.c b/tools/perf/util/tracepoint.c +index 89ef56c433110..92dd8b455b902 100644 +--- a/tools/perf/util/tracepoint.c ++++ b/tools/perf/util/tracepoint.c +@@ -50,6 +50,7 @@ int is_valid_tracepoint(const char *event_string) + sys_dirent->d_name, evt_dirent->d_name); + if (!strcmp(evt_path, event_string)) { + closedir(evt_dir); ++ put_events_file(dir_path); + closedir(sys_dir); + return 1; + } +-- +2.39.2 + diff --git a/queue-6.1/perf-vendor-events-power9-remove-utf-8-characters-fr.patch b/queue-6.1/perf-vendor-events-power9-remove-utf-8-characters-fr.patch new file mode 100644 index 00000000000..4a4bb74c02c --- /dev/null +++ b/queue-6.1/perf-vendor-events-power9-remove-utf-8-characters-fr.patch @@ -0,0 +1,108 @@ +From 188ba30f68e3febec5548259d91ce5ccb88b2e16 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Mar 2023 16:59:08 +0530 +Subject: perf vendor events power9: Remove UTF-8 characters from JSON files + +From: Kajol Jain + +[ Upstream commit 5d9df8731c0941f3add30f96745a62586a0c9d52 ] + +Commit 3c22ba5243040c13 ("perf vendor events powerpc: Update POWER9 +events") added and updated power9 PMU JSON events. However some of the +JSON events which are part of other.json and pipeline.json files, +contains UTF-8 characters in their brief description. Having UTF-8 +character could breaks the perf build on some distros. + +Fix this issue by removing the UTF-8 characters from other.json and +pipeline.json files. + +Result without the fix: + + [command]# file -i pmu-events/arch/powerpc/power9/* + pmu-events/arch/powerpc/power9/cache.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/floating-point.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/frontend.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/marked.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/memory.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/metrics.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/nest_metrics.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/other.json: application/json; charset=utf-8 + pmu-events/arch/powerpc/power9/pipeline.json: application/json; charset=utf-8 + pmu-events/arch/powerpc/power9/pmc.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/translation.json: application/json; charset=us-ascii + [command]# + +Result with the fix: + + [command]# file -i pmu-events/arch/powerpc/power9/* + pmu-events/arch/powerpc/power9/cache.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/floating-point.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/frontend.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/marked.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/memory.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/metrics.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/nest_metrics.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/other.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/pipeline.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/pmc.json: application/json; charset=us-ascii + pmu-events/arch/powerpc/power9/translation.json: application/json; charset=us-ascii + [command]# + +Fixes: 3c22ba5243040c13 ("perf vendor events powerpc: Update POWER9 events") +Reported-by: Arnaldo Carvalho de Melo +Signed-off-by: Kajol Jain +Acked-by: Ian Rogers +Tested-by: Arnaldo Carvalho de Melo +Cc: Athira Rajeev +Cc: Disha Goel +Cc: Jiri Olsa +Cc: Madhavan Srinivasan +Cc: Sukadev Bhattiprolu +Cc: linuxppc-dev@lists.ozlabs.org +Link: https://lore.kernel.org/lkml/ZBxP77deq7ikTxwG@kernel.org/ +Link: https://lore.kernel.org/r/20230328112908.113158-1-kjain@linux.ibm.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/pmu-events/arch/powerpc/power9/other.json | 4 ++-- + tools/perf/pmu-events/arch/powerpc/power9/pipeline.json | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/tools/perf/pmu-events/arch/powerpc/power9/other.json b/tools/perf/pmu-events/arch/powerpc/power9/other.json +index 3f69422c21f99..f10bd554521a0 100644 +--- a/tools/perf/pmu-events/arch/powerpc/power9/other.json ++++ b/tools/perf/pmu-events/arch/powerpc/power9/other.json +@@ -1417,7 +1417,7 @@ + { + "EventCode": "0x45054", + "EventName": "PM_FMA_CMPL", +- "BriefDescription": "two flops operation completed (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only. " ++ "BriefDescription": "two flops operation completed (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only." + }, + { + "EventCode": "0x201E8", +@@ -2017,7 +2017,7 @@ + { + "EventCode": "0xC0BC", + "EventName": "PM_LSU_FLUSH_OTHER", +- "BriefDescription": "Other LSU flushes including: Sync (sync ack from L2 caused search of LRQ for oldest snooped load, This will either signal a Precise Flush of the oldest snooped loa or a Flush Next PPC); Data Valid Flush Next (several cases of this, one example is store and reload are lined up such that a store-hit-reload scenario exists and the CDF has already launched and has gotten bad/stale data); Bad Data Valid Flush Next (might be a few cases of this, one example is a larxa (D$ hit) return data and dval but can't allocate to LMQ (LMQ full or other reason). Already gave dval but can't watch it for snoop_hit_larx. Need to take the “bad dval” back and flush all younger ops)" ++ "BriefDescription": "Other LSU flushes including: Sync (sync ack from L2 caused search of LRQ for oldest snooped load, This will either signal a Precise Flush of the oldest snooped loa or a Flush Next PPC); Data Valid Flush Next (several cases of this, one example is store and reload are lined up such that a store-hit-reload scenario exists and the CDF has already launched and has gotten bad/stale data); Bad Data Valid Flush Next (might be a few cases of this, one example is a larxa (D$ hit) return data and dval but can't allocate to LMQ (LMQ full or other reason). Already gave dval but can't watch it for snoop_hit_larx. Need to take the 'bad dval' back and flush all younger ops)" + }, + { + "EventCode": "0x5094", +diff --git a/tools/perf/pmu-events/arch/powerpc/power9/pipeline.json b/tools/perf/pmu-events/arch/powerpc/power9/pipeline.json +index d0265f255de2b..723bffa41c448 100644 +--- a/tools/perf/pmu-events/arch/powerpc/power9/pipeline.json ++++ b/tools/perf/pmu-events/arch/powerpc/power9/pipeline.json +@@ -442,7 +442,7 @@ + { + "EventCode": "0x4D052", + "EventName": "PM_2FLOP_CMPL", +- "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg " ++ "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg" + }, + { + "EventCode": "0x1F142", +-- +2.39.2 + diff --git a/queue-6.1/perf-vendor-events-s390-remove-utf-8-characters-from.patch b/queue-6.1/perf-vendor-events-s390-remove-utf-8-characters-from.patch new file mode 100644 index 00000000000..8d70a073b04 --- /dev/null +++ b/queue-6.1/perf-vendor-events-s390-remove-utf-8-characters-from.patch @@ -0,0 +1,82 @@ +From 22877a0277ee4dfc5deb929a6b004896eded7d01 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 23 Mar 2023 13:25:32 +0100 +Subject: perf vendor events s390: Remove UTF-8 characters from JSON file + +From: Thomas Richter + +[ Upstream commit eb2feb68cb7d404288493c41480843bc9f404789 ] + +Commit 7f76b31130680fb3 ("perf list: Add IBM z16 event description for +s390") contains the verbal description for z16 extended counter set. + +However some entries of the public description contain UTF-8 characters +which breaks the build on some distros. + +Fix this and remove the UTF-8 characters. + +Fixes: 7f76b31130680fb3 ("perf list: Add IBM z16 event description for s390") +Reported-by: Arnaldo Carvalho de Melo +Suggested-by: Heiko Carstens +Signed-off-by: Thomas Richter +Tested-by: Arnaldo Carvalho de Melo +Cc: Sumanth Korikkar +Cc: Sven Schnelle +Cc: Thomas Richter +Cc: Vasily Gorbik +Link: https://lore.kernel.org/r/ZBwkl77/I31AQk12@osiris +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/perf/pmu-events/arch/s390/cf_z16/extended.json | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/tools/perf/pmu-events/arch/s390/cf_z16/extended.json b/tools/perf/pmu-events/arch/s390/cf_z16/extended.json +index c306190fc06f2..c2b10ec1c6e01 100644 +--- a/tools/perf/pmu-events/arch/s390/cf_z16/extended.json ++++ b/tools/perf/pmu-events/arch/s390/cf_z16/extended.json +@@ -95,28 +95,28 @@ + "EventCode": "145", + "EventName": "DCW_REQ", + "BriefDescription": "Directory Write Level 1 Data Cache from Cache", +- "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestor’s Level-2 cache." ++ "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache." + }, + { + "Unit": "CPU-M-CF", + "EventCode": "146", + "EventName": "DCW_REQ_IV", + "BriefDescription": "Directory Write Level 1 Data Cache from Cache with Intervention", +- "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestor’s Level-2 cache with intervention." ++ "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache with intervention." + }, + { + "Unit": "CPU-M-CF", + "EventCode": "147", + "EventName": "DCW_REQ_CHIP_HIT", + "BriefDescription": "Directory Write Level 1 Data Cache from Cache with Chip HP Hit", +- "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestor’s Level-2 cache after using chip level horizontal persistence, Chip-HP hit." ++ "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using chip level horizontal persistence, Chip-HP hit." + }, + { + "Unit": "CPU-M-CF", + "EventCode": "148", + "EventName": "DCW_REQ_DRAWER_HIT", + "BriefDescription": "Directory Write Level 1 Data Cache from Cache with Drawer HP Hit", +- "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestor’s Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit." ++ "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit." + }, + { + "Unit": "CPU-M-CF", +@@ -284,7 +284,7 @@ + "EventCode": "172", + "EventName": "ICW_REQ_DRAWER_HIT", + "BriefDescription": "Directory Write Level 1 Instruction Cache from Cache with Drawer HP Hit", +- "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the requestor’s Level-2 cache using drawer level horizontal persistence, Drawer-HP hit." ++ "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the requestors Level-2 cache using drawer level horizontal persistence, Drawer-HP hit." + }, + { + "Unit": "CPU-M-CF", +-- +2.39.2 + diff --git a/queue-6.1/r8152-fix-flow-control-issue-of-rtl8156a.patch b/queue-6.1/r8152-fix-flow-control-issue-of-rtl8156a.patch new file mode 100644 index 00000000000..9f11599f8ea --- /dev/null +++ b/queue-6.1/r8152-fix-flow-control-issue-of-rtl8156a.patch @@ -0,0 +1,129 @@ +From c1bc8edfeee563c879922fb557bb653b5399feeb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 16:53:29 +0800 +Subject: r8152: fix flow control issue of RTL8156A + +From: Hayes Wang + +[ Upstream commit 8ceda6d5a1e5402fd852e6cc59a286ce3dc545ee ] + +The feature of flow control becomes abnormal, if the device sends a +pause frame and the tx/rx is disabled before sending a release frame. It +causes the lost of packets. + +Set PLA_RX_FIFO_FULL and PLA_RX_FIFO_EMPTY to zeros before disabling the +tx/rx. And, toggle FC_PATCH_TASK before enabling tx/rx to reset the flow +control patch and timer. Then, the hardware could clear the state and +the flow control becomes normal after enabling tx/rx. + +Besides, remove inline for fc_pause_on_auto() and fc_pause_off_auto(). + +Fixes: 195aae321c82 ("r8152: support new chips") +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/usb/r8152.c | 56 ++++++++++++++++++++++++++--------------- + 1 file changed, 36 insertions(+), 20 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index 23da1d9dafd1f..b0ce524ef1a50 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -5986,6 +5986,25 @@ static void rtl8153_disable(struct r8152 *tp) + r8153_aldps_en(tp, true); + } + ++static u32 fc_pause_on_auto(struct r8152 *tp) ++{ ++ return (ALIGN(mtu_to_size(tp->netdev->mtu), 1024) + 6 * 1024); ++} ++ ++static u32 fc_pause_off_auto(struct r8152 *tp) ++{ ++ return (ALIGN(mtu_to_size(tp->netdev->mtu), 1024) + 14 * 1024); ++} ++ ++static void r8156_fc_parameter(struct r8152 *tp) ++{ ++ u32 pause_on = tp->fc_pause_on ? tp->fc_pause_on : fc_pause_on_auto(tp); ++ u32 pause_off = tp->fc_pause_off ? tp->fc_pause_off : fc_pause_off_auto(tp); ++ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_FULL, pause_on / 16); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_EMPTY, pause_off / 16); ++} ++ + static int rtl8156_enable(struct r8152 *tp) + { + u32 ocp_data; +@@ -5994,6 +6013,7 @@ static int rtl8156_enable(struct r8152 *tp) + if (test_bit(RTL8152_UNPLUG, &tp->flags)) + return -ENODEV; + ++ r8156_fc_parameter(tp); + set_tx_qlen(tp); + rtl_set_eee_plus(tp); + r8153_set_rx_early_timeout(tp); +@@ -6025,9 +6045,24 @@ static int rtl8156_enable(struct r8152 *tp) + ocp_write_word(tp, MCU_TYPE_USB, USB_L1_CTRL, ocp_data); + } + ++ ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_TASK); ++ ocp_data &= ~FC_PATCH_TASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ usleep_range(1000, 2000); ++ ocp_data |= FC_PATCH_TASK; ++ ocp_write_word(tp, MCU_TYPE_USB, USB_FW_TASK, ocp_data); ++ + return rtl_enable(tp); + } + ++static void rtl8156_disable(struct r8152 *tp) ++{ ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_FULL, 0); ++ ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_EMPTY, 0); ++ ++ rtl8153_disable(tp); ++} ++ + static int rtl8156b_enable(struct r8152 *tp) + { + u32 ocp_data; +@@ -6429,25 +6464,6 @@ static void rtl8153c_up(struct r8152 *tp) + r8153b_u1u2en(tp, true); + } + +-static inline u32 fc_pause_on_auto(struct r8152 *tp) +-{ +- return (ALIGN(mtu_to_size(tp->netdev->mtu), 1024) + 6 * 1024); +-} +- +-static inline u32 fc_pause_off_auto(struct r8152 *tp) +-{ +- return (ALIGN(mtu_to_size(tp->netdev->mtu), 1024) + 14 * 1024); +-} +- +-static void r8156_fc_parameter(struct r8152 *tp) +-{ +- u32 pause_on = tp->fc_pause_on ? tp->fc_pause_on : fc_pause_on_auto(tp); +- u32 pause_off = tp->fc_pause_off ? tp->fc_pause_off : fc_pause_off_auto(tp); +- +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_FULL, pause_on / 16); +- ocp_write_word(tp, MCU_TYPE_PLA, PLA_RX_FIFO_EMPTY, pause_off / 16); +-} +- + static void rtl8156_change_mtu(struct r8152 *tp) + { + u32 rx_max_size = mtu_to_size(tp->netdev->mtu); +@@ -9377,7 +9393,7 @@ static int rtl_ops_init(struct r8152 *tp) + case RTL_VER_10: + ops->init = r8156_init; + ops->enable = rtl8156_enable; +- ops->disable = rtl8153_disable; ++ ops->disable = rtl8156_disable; + ops->up = rtl8156_up; + ops->down = rtl8156_down; + ops->unload = rtl8153_unload; +-- +2.39.2 + diff --git a/queue-6.1/r8152-fix-the-poor-throughput-for-2.5g-devices.patch b/queue-6.1/r8152-fix-the-poor-throughput-for-2.5g-devices.patch new file mode 100644 index 00000000000..4d9c5d8815c --- /dev/null +++ b/queue-6.1/r8152-fix-the-poor-throughput-for-2.5g-devices.patch @@ -0,0 +1,71 @@ +From 57aefc296203cc62ebcbb85e4a35a36cd432e4be Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 16:53:30 +0800 +Subject: r8152: fix the poor throughput for 2.5G devices + +From: Hayes Wang + +[ Upstream commit 61b0ad6f58e2066e054c6d4839d67974d2861a7d ] + +Fix the poor throughput for 2.5G devices, when changing the speed from +auto mode to force mode. This patch is used to notify the MAC when the +mode is changed. + +Fixes: 195aae321c82 ("r8152: support new chips") +Signed-off-by: Hayes Wang +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/usb/r8152.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index b0ce524ef1a50..a7665accc81c8 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -199,6 +199,7 @@ + #define OCP_EEE_AR 0xa41a + #define OCP_EEE_DATA 0xa41c + #define OCP_PHY_STATUS 0xa420 ++#define OCP_INTR_EN 0xa424 + #define OCP_NCTL_CFG 0xa42c + #define OCP_POWER_CFG 0xa430 + #define OCP_EEE_CFG 0xa432 +@@ -620,6 +621,9 @@ enum spd_duplex { + #define PHY_STAT_LAN_ON 3 + #define PHY_STAT_PWRDN 5 + ++/* OCP_INTR_EN */ ++#define INTR_SPEED_FORCE BIT(3) ++ + /* OCP_NCTL_CFG */ + #define PGA_RETURN_EN BIT(1) + +@@ -7554,6 +7558,11 @@ static void r8156_hw_phy_cfg(struct r8152 *tp) + ((swap_a & 0x1f) << 8) | + ((swap_a >> 8) & 0x1f)); + } ++ ++ /* Notify the MAC when the speed is changed to force mode. */ ++ data = ocp_reg_read(tp, OCP_INTR_EN); ++ data |= INTR_SPEED_FORCE; ++ ocp_reg_write(tp, OCP_INTR_EN, data); + break; + default: + break; +@@ -7949,6 +7958,11 @@ static void r8156b_hw_phy_cfg(struct r8152 *tp) + break; + } + ++ /* Notify the MAC when the speed is changed to force mode. */ ++ data = ocp_reg_read(tp, OCP_INTR_EN); ++ data |= INTR_SPEED_FORCE; ++ ocp_reg_write(tp, OCP_INTR_EN, data); ++ + if (rtl_phy_patch_request(tp, true, true)) + return; + +-- +2.39.2 + diff --git a/queue-6.1/r8152-move-setting-r8153b_rx_agg_chg_indicate.patch b/queue-6.1/r8152-move-setting-r8153b_rx_agg_chg_indicate.patch new file mode 100644 index 00000000000..23bdf123a61 --- /dev/null +++ b/queue-6.1/r8152-move-setting-r8153b_rx_agg_chg_indicate.patch @@ -0,0 +1,65 @@ +From b81864783f72138006782fd96edbc2fb17f4d7dd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 16:53:31 +0800 +Subject: r8152: move setting r8153b_rx_agg_chg_indicate() + +From: Hayes Wang + +[ Upstream commit cce8334f4aacd9936309a002d4a4de92a07cd2c2 ] + +Move setting r8153b_rx_agg_chg_indicate() for 2.5G devices. The +r8153b_rx_agg_chg_indicate() has to be called after enabling tx/rx. +Otherwise, the coalescing settings are useless. + +Fixes: 195aae321c82 ("r8152: support new chips") +Signed-off-by: Hayes Wang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/usb/r8152.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c +index a7665accc81c8..059d610901d84 100644 +--- a/drivers/net/usb/r8152.c ++++ b/drivers/net/usb/r8152.c +@@ -3027,12 +3027,16 @@ static int rtl_enable(struct r8152 *tp) + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data); + + switch (tp->version) { +- case RTL_VER_08: +- case RTL_VER_09: +- case RTL_VER_14: +- r8153b_rx_agg_chg_indicate(tp); ++ case RTL_VER_01: ++ case RTL_VER_02: ++ case RTL_VER_03: ++ case RTL_VER_04: ++ case RTL_VER_05: ++ case RTL_VER_06: ++ case RTL_VER_07: + break; + default: ++ r8153b_rx_agg_chg_indicate(tp); + break; + } + +@@ -3086,7 +3090,6 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp) + 640 / 8); + ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR, + ocp_data); +- r8153b_rx_agg_chg_indicate(tp); + break; + + default: +@@ -3120,7 +3123,6 @@ static void r8153_set_rx_early_size(struct r8152 *tp) + case RTL_VER_15: + ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, + ocp_data / 8); +- r8153b_rx_agg_chg_indicate(tp); + break; + default: + WARN_ON_ONCE(1); +-- +2.39.2 + diff --git a/queue-6.1/risc-v-mm-enable-huge-page-support-to-kernel_page_pr.patch b/queue-6.1/risc-v-mm-enable-huge-page-support-to-kernel_page_pr.patch new file mode 100644 index 00000000000..157eb4e0eaa --- /dev/null +++ b/queue-6.1/risc-v-mm-enable-huge-page-support-to-kernel_page_pr.patch @@ -0,0 +1,63 @@ +From 7f141c98aa1dd7d0fed58b300ae3daccc1572201 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 30 Mar 2023 14:43:20 +0800 +Subject: RISC-V: mm: Enable huge page support to kernel_page_present() + function + +From: Sia Jee Heng + +[ Upstream commit a15c90b67a662c75f469822a7f95c7aaa049e28f ] + +Currently kernel_page_present() function doesn't support huge page +detection causes the function to mistakenly return false to the +hibernation core. + +Add huge page detection to the function to solve the problem. + +Fixes: 9e953cda5cdf ("riscv: Introduce huge page support for 32/64bit kernel") +Signed-off-by: Sia Jee Heng +Reviewed-by: Ley Foon Tan +Reviewed-by: Mason Huo +Reviewed-by: Andrew Jones +Reviewed-by: Alexandre Ghiti +Link: https://lore.kernel.org/r/20230330064321.1008373-4-jeeheng.sia@starfivetech.com +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/mm/pageattr.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/riscv/mm/pageattr.c b/arch/riscv/mm/pageattr.c +index 86c56616e5dea..ea3d61de065b3 100644 +--- a/arch/riscv/mm/pageattr.c ++++ b/arch/riscv/mm/pageattr.c +@@ -217,18 +217,26 @@ bool kernel_page_present(struct page *page) + pgd = pgd_offset_k(addr); + if (!pgd_present(*pgd)) + return false; ++ if (pgd_leaf(*pgd)) ++ return true; + + p4d = p4d_offset(pgd, addr); + if (!p4d_present(*p4d)) + return false; ++ if (p4d_leaf(*p4d)) ++ return true; + + pud = pud_offset(p4d, addr); + if (!pud_present(*pud)) + return false; ++ if (pud_leaf(*pud)) ++ return true; + + pmd = pmd_offset(pud, addr); + if (!pmd_present(*pmd)) + return false; ++ if (pmd_leaf(*pmd)) ++ return true; + + pte = pte_offset_kernel(pmd, addr); + return pte_present(*pte); +-- +2.39.2 + diff --git a/queue-6.1/riscv-compat_syscall_table-fixup-compile-warning.patch b/queue-6.1/riscv-compat_syscall_table-fixup-compile-warning.patch new file mode 100644 index 00000000000..ee90b9cfcd3 --- /dev/null +++ b/queue-6.1/riscv-compat_syscall_table-fixup-compile-warning.patch @@ -0,0 +1,46 @@ +From 4bef1c9508859d858571dd733712c940d361d31c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 May 2023 15:33:54 -0700 +Subject: riscv: compat_syscall_table: Fixup compile warning + +From: Guo Ren + +[ Upstream commit f9c4bbddece7eff1155c70d48e3c9c2a01b9d778 ] + +../arch/riscv/kernel/compat_syscall_table.c:12:41: warning: initialized +field overwritten [-Woverride-init] + 12 | #define __SYSCALL(nr, call) [nr] = (call), + | ^ +../include/uapi/asm-generic/unistd.h:567:1: note: in expansion of macro +'__SYSCALL' + 567 | __SYSCALL(__NR_semget, sys_semget) + +Fixes: 59c10c52f573 ("riscv: compat: syscall: Add compat_sys_call_table implementation") +Reviewed-by: Conor Dooley +Reported-by: kernel test robot +Tested-by: Jisheng Zhang +Signed-off-by: Guo Ren +Signed-off-by: Guo Ren +Signed-off-by: Drew Fustini +Link: https://lore.kernel.org/r/20230501223353.2833899-1-dfustini@baylibre.com +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/kernel/Makefile | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile +index db6e4b1294ba3..ab333cb792fd9 100644 +--- a/arch/riscv/kernel/Makefile ++++ b/arch/riscv/kernel/Makefile +@@ -9,6 +9,7 @@ CFLAGS_REMOVE_patch.o = $(CC_FLAGS_FTRACE) + CFLAGS_REMOVE_sbi.o = $(CC_FLAGS_FTRACE) + endif + CFLAGS_syscall_table.o += $(call cc-option,-Wno-override-init,) ++CFLAGS_compat_syscall_table.o += $(call cc-option,-Wno-override-init,) + + ifdef CONFIG_KEXEC + AFLAGS_kexec_relocate.o := -mcmodel=medany $(call cc-option,-mno-relax) +-- +2.39.2 + diff --git a/queue-6.1/rxrpc-fix-hard-call-timeout-units.patch b/queue-6.1/rxrpc-fix-hard-call-timeout-units.patch new file mode 100644 index 00000000000..721148c8766 --- /dev/null +++ b/queue-6.1/rxrpc-fix-hard-call-timeout-units.patch @@ -0,0 +1,45 @@ +From 91fafba3748d37aa7d00fd8e1bff0e72db7c64ff Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 21:27:54 +0100 +Subject: rxrpc: Fix hard call timeout units + +From: David Howells + +[ Upstream commit 0d098d83c5d9e107b2df7f5e11f81492f56d2fe7 ] + +The hard call timeout is specified in the RXRPC_SET_CALL_TIMEOUT cmsg in +seconds, so fix the point at which sendmsg() applies it to the call to +convert to jiffies from seconds, not milliseconds. + +Fixes: a158bdd3247b ("rxrpc: Fix timeout of a call that hasn't yet been granted a channel") +Signed-off-by: David Howells +cc: Marc Dionne +cc: "David S. Miller" +cc: Eric Dumazet +cc: Jakub Kicinski +cc: Paolo Abeni +cc: linux-afs@lists.infradead.org +cc: netdev@vger.kernel.org +cc: linux-kernel@vger.kernel.org +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/rxrpc/sendmsg.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/rxrpc/sendmsg.c b/net/rxrpc/sendmsg.c +index d4e4e94f4f987..71e40f91dd398 100644 +--- a/net/rxrpc/sendmsg.c ++++ b/net/rxrpc/sendmsg.c +@@ -736,7 +736,7 @@ int rxrpc_do_sendmsg(struct rxrpc_sock *rx, struct msghdr *msg, size_t len) + fallthrough; + case 1: + if (p.call.timeouts.hard > 0) { +- j = msecs_to_jiffies(p.call.timeouts.hard); ++ j = p.call.timeouts.hard * HZ; + now = jiffies; + j += now; + WRITE_ONCE(call->expect_term_by, j); +-- +2.39.2 + diff --git a/queue-6.1/scsi-qedi-fix-use-after-free-bug-in-qedi_remove.patch b/queue-6.1/scsi-qedi-fix-use-after-free-bug-in-qedi_remove.patch new file mode 100644 index 00000000000..04a05019ce8 --- /dev/null +++ b/queue-6.1/scsi-qedi-fix-use-after-free-bug-in-qedi_remove.patch @@ -0,0 +1,62 @@ +From 59207ef7834d297945289476e10749b5f7354f04 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Apr 2023 11:34:22 +0800 +Subject: scsi: qedi: Fix use after free bug in qedi_remove() + +From: Zheng Wang + +[ Upstream commit c5749639f2d0a1f6cbe187d05f70c2e7c544d748 ] + +In qedi_probe() we call __qedi_probe() which initializes +&qedi->recovery_work with qedi_recovery_handler() and +&qedi->board_disable_work with qedi_board_disable_work(). + +When qedi_schedule_recovery_handler() is called, schedule_delayed_work() +will finally start the work. + +In qedi_remove(), which is called to remove the driver, the following +sequence may be observed: + +Fix this by finishing the work before cleanup in qedi_remove(). + +CPU0 CPU1 + + |qedi_recovery_handler +qedi_remove | + __qedi_remove | +iscsi_host_free | +scsi_host_put | +//free shost | + |iscsi_host_for_each_session + |//use qedi->shost + +Cancel recovery_work and board_disable_work in __qedi_remove(). + +Fixes: 4b1068f5d74b ("scsi: qedi: Add MFW error recovery process") +Signed-off-by: Zheng Wang +Link: https://lore.kernel.org/r/20230413033422.28003-1-zyytlz.wz@163.com +Acked-by: Manish Rangankar +Reviewed-by: Mike Christie +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedi/qedi_main.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/scsi/qedi/qedi_main.c b/drivers/scsi/qedi/qedi_main.c +index df2fe7bd26d1b..f530bb0364939 100644 +--- a/drivers/scsi/qedi/qedi_main.c ++++ b/drivers/scsi/qedi/qedi_main.c +@@ -2450,6 +2450,9 @@ static void __qedi_remove(struct pci_dev *pdev, int mode) + qedi_ops->ll2->stop(qedi->cdev); + } + ++ cancel_delayed_work_sync(&qedi->recovery_work); ++ cancel_delayed_work_sync(&qedi->board_disable_work); ++ + qedi_free_iscsi_pf_param(qedi); + + rval = qedi_ops->common->update_drv_state(qedi->cdev, false); +-- +2.39.2 + diff --git a/queue-6.1/selftests-netfilter-fix-libmnl-pkg-config-usage.patch b/queue-6.1/selftests-netfilter-fix-libmnl-pkg-config-usage.patch new file mode 100644 index 00000000000..602f30cb3be --- /dev/null +++ b/queue-6.1/selftests-netfilter-fix-libmnl-pkg-config-usage.patch @@ -0,0 +1,43 @@ +From d31c1ad23866e45a403fe6d8757b5a53498ad79c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Apr 2023 22:11:39 +0100 +Subject: selftests: netfilter: fix libmnl pkg-config usage + +From: Jeremy Sowden + +[ Upstream commit de4773f0235acf74554f6a64ea60adc0d7b01895 ] + +1. Don't hard-code pkg-config +2. Remove distro-specific default for CFLAGS +3. Use pkg-config for LDLIBS + +Fixes: a50a88f026fb ("selftests: netfilter: fix a build error on openSUSE") +Suggested-by: Jan Engelhardt +Signed-off-by: Jeremy Sowden +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/netfilter/Makefile | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/tools/testing/selftests/netfilter/Makefile b/tools/testing/selftests/netfilter/Makefile +index 4504ee07be08d..3686bfa6c58d7 100644 +--- a/tools/testing/selftests/netfilter/Makefile ++++ b/tools/testing/selftests/netfilter/Makefile +@@ -8,8 +8,11 @@ TEST_PROGS := nft_trans_stress.sh nft_fib.sh nft_nat.sh bridge_brouter.sh \ + ipip-conntrack-mtu.sh conntrack_tcp_unreplied.sh \ + conntrack_vrf.sh nft_synproxy.sh rpath.sh + +-CFLAGS += $(shell pkg-config --cflags libmnl 2>/dev/null || echo "-I/usr/include/libmnl") +-LDLIBS = -lmnl ++HOSTPKG_CONFIG := pkg-config ++ ++CFLAGS += $(shell $(HOSTPKG_CONFIG) --cflags libmnl 2>/dev/null) ++LDLIBS += $(shell $(HOSTPKG_CONFIG) --libs libmnl 2>/dev/null || echo -lmnl) ++ + TEST_GEN_FILES = nf-queue connect_close + + include ../lib.mk +-- +2.39.2 + diff --git a/queue-6.1/selftests-srv6-make-srv6_end_dt46_l3vpn_test-more-ro.patch b/queue-6.1/selftests-srv6-make-srv6_end_dt46_l3vpn_test-more-ro.patch new file mode 100644 index 00000000000..0b5829e18ee --- /dev/null +++ b/queue-6.1/selftests-srv6-make-srv6_end_dt46_l3vpn_test-more-ro.patch @@ -0,0 +1,61 @@ +From 3e46dbe47647583a4c0c531885770011af2d6a8d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Apr 2023 11:49:23 +0200 +Subject: selftests: srv6: make srv6_end_dt46_l3vpn_test more robust + +From: Andrea Mayer + +[ Upstream commit 46ef24c60f8ee70662968ac55325297ed4624d61 ] + +On some distributions, the rp_filter is automatically set (=1) by +default on a netdev basis (also on VRFs). +In an SRv6 End.DT46 behavior, decapsulated IPv4 packets are routed using +the table associated with the VRF bound to that tunnel. During lookup +operations, the rp_filter can lead to packet loss when activated on the +VRF. +Therefore, we chose to make this selftest more robust by explicitly +disabling the rp_filter during tests (as it is automatically set by some +Linux distributions). + +Fixes: 03a0b567a03d ("selftests: seg6: add selftest for SRv6 End.DT46 Behavior") +Reported-by: Hangbin Liu +Signed-off-by: Andrea Mayer +Tested-by: Hangbin Liu +Reviewed-by: David Ahern +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../testing/selftests/net/srv6_end_dt46_l3vpn_test.sh | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh b/tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh +index aebaab8ce44cb..441eededa0312 100755 +--- a/tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh ++++ b/tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh +@@ -292,6 +292,11 @@ setup_hs() + ip netns exec ${hsname} sysctl -wq net.ipv6.conf.all.accept_dad=0 + ip netns exec ${hsname} sysctl -wq net.ipv6.conf.default.accept_dad=0 + ++ # disable the rp_filter otherwise the kernel gets confused about how ++ # to route decap ipv4 packets. ++ ip netns exec ${rtname} sysctl -wq net.ipv4.conf.all.rp_filter=0 ++ ip netns exec ${rtname} sysctl -wq net.ipv4.conf.default.rp_filter=0 ++ + ip -netns ${hsname} link add veth0 type veth peer name ${rtveth} + ip -netns ${hsname} link set ${rtveth} netns ${rtname} + ip -netns ${hsname} addr add ${IPv6_HS_NETWORK}::${hs}/64 dev veth0 nodad +@@ -316,11 +321,6 @@ setup_hs() + ip netns exec ${rtname} sysctl -wq net.ipv6.conf.${rtveth}.proxy_ndp=1 + ip netns exec ${rtname} sysctl -wq net.ipv4.conf.${rtveth}.proxy_arp=1 + +- # disable the rp_filter otherwise the kernel gets confused about how +- # to route decap ipv4 packets. +- ip netns exec ${rtname} sysctl -wq net.ipv4.conf.all.rp_filter=0 +- ip netns exec ${rtname} sysctl -wq net.ipv4.conf.${rtveth}.rp_filter=0 +- + ip netns exec ${rtname} sh -c "echo 1 > /proc/sys/net/vrf/strict_mode" + } + +-- +2.39.2 + diff --git a/queue-6.1/series b/queue-6.1/series index ca75f09ce7e..5f9379b5f8f 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -22,3 +22,84 @@ kvm-x86-do-not-unload-mmu-roots-when-only-toggling-c.patch kvm-x86-make-use-of-kvm_read_cr-_bits-when-testing-b.patch kvm-vmx-make-cr0.wp-a-guest-owned-bit.patch kvm-x86-mmu-refresh-cr0.wp-prior-to-checking-for-emu.patch +asoc-intel-soc-acpi-byt-fix-wm510205-match-no-longer.patch +scsi-qedi-fix-use-after-free-bug-in-qedi_remove.patch +drm-amd-display-remove-fpu-guards-from-the-dml-folde.patch +drm-amd-display-add-missing-wa-and-mclk-validation.patch +drm-amd-display-return-error-code-on-dsc-atomic-chec.patch +drm-amd-display-fixes-for-dcn32_clk_mgr-implementati.patch +drm-amd-display-reset-outbox0-r-w-pointer-on-dmub-re.patch +drm-amd-display-do-not-clear-gpint-register-when-rel.patch +drm-amd-display-update-bounding-box-values-for-dcn32.patch +ixgbe-fix-panic-during-xdp_tx-with-64-cpus.patch +octeonxt2-af-mcs-fix-per-port-bypass-config.patch +octeontx2-af-mcs-write-tcam_data-and-tcam_mask-regis.patch +octeontx2-af-mcs-config-parser-to-skip-8b-header.patch +octeontx2-af-mcs-fix-mcs-block-interrupt.patch +octeontx2-pf-mcs-fix-null-pointer-dereferences.patch +octeontx2-pf-mcs-match-macsec-ethertype-along-with-d.patch +octeontx2-pf-mcs-clear-stats-before-freeing-resource.patch +octeontx2-pf-mcs-fix-shared-counters-logic.patch +octeontx2-pf-mcs-do-not-reset-pn-while-updating-secy.patch +net-ncsi-clear-tx-enable-mode-when-handling-a-config.patch +tcp-fix-skb_copy_ubufs-vs-big-tcp.patch +net-sched-cls_api-remove-block_cb-from-driver_list-b.patch +sit-update-dev-needed_headroom-in-ipip6_tunnel_bind_.patch +selftests-srv6-make-srv6_end_dt46_l3vpn_test-more-ro.patch +net-ipv6-fix-skb-hash-for-some-rst-packets.patch +net-dsa-mv88e6xxx-add-mv88e6321-rsvd2cpu.patch +writeback-fix-call-of-incorrect-macro.patch +block-skip-destroyed-blkg-when-restart-in-blkg_destr.patch +watchdog-dw_wdt-fix-the-error-handling-path-of-dw_wd.patch +risc-v-mm-enable-huge-page-support-to-kernel_page_pr.patch +i2c-tegra-fix-pec-support-for-smbus-block-read.patch +net-sched-act_mirred-add-carrier-check.patch +r8152-fix-flow-control-issue-of-rtl8156a.patch +r8152-fix-the-poor-throughput-for-2.5g-devices.patch +r8152-move-setting-r8153b_rx_agg_chg_indicate.patch +sfc-fix-module-eeprom-reporting-for-qsfp-modules.patch +rxrpc-fix-hard-call-timeout-units.patch +riscv-compat_syscall_table-fixup-compile-warning.patch +drm-i915-mtl-add-the-missing-cpu-transcoder-mask-in-.patch +selftests-netfilter-fix-libmnl-pkg-config-usage.patch +octeontx2-af-secure-apr-table-update-with-the-lock.patch +octeontx2-af-fix-start-and-end-bit-for-scan-config.patch +octeontx2-af-fix-depth-of-cam-and-mem-table.patch +octeontx2-pf-increase-the-size-of-dmac-filter-flows.patch +octeontx2-af-allow-mkex-profile-without-dmac-and-add.patch +octeontx2-pf-add-additional-checks-while-configuring.patch +octeontx2-af-update-fix-npc-field-hash-extract-featu.patch +octeontx2-af-fix-issues-with-npc-field-hash-extract.patch +octeontx2-af-skip-pfs-if-not-enabled.patch +octeontx2-pf-disable-packet-i-o-for-graceful-exit.patch +octeontx2-vf-detach-lf-resources-on-probe-cleanup.patch +ionic-remove-noise-from-ethtool-rxnfc-error-msg.patch +ethtool-fix-uninitialized-number-of-lanes.patch +ionic-catch-failure-from-devlink_alloc.patch +af_packet-don-t-send-zero-byte-data-in-packet_sendms.patch +drm-amdgpu-add-a-missing-lock-for-amdgpu_sched.patch +alsa-caiaq-input-add-error-handling-for-unsupported-.patch +kvm-s390-fix-race-in-gmap_make_secure.patch +net-dsa-mt7530-fix-corrupt-frames-using-trgmii-on-40.patch +net-dsa-mt7530-split-off-common-parts-from-mt7531_se.patch +net-dsa-mt7530-fix-network-connectivity-with-multipl.patch +ice-block-lan-in-case-of-vf-to-vf-offload.patch +virtio_net-suppress-cpu-stall-when-free_unused_bufs.patch +net-enetc-check-the-index-of-the-sfi-rather-than-the.patch +net-bcmgenet-remove-phy_stop-from-bcmgenet_netif_sto.patch +perf-record-fix-read-lost-count-failed-msg-with-samp.patch +perf-scripts-intel-pt-events.py-fix-ipc-output-for-p.patch +perf-vendor-events-s390-remove-utf-8-characters-from.patch +perf-tests-record_offcpu.sh-fix-redirection-of-stder.patch +perf-ftrace-make-system-wide-the-default-target-for-.patch +perf-vendor-events-power9-remove-utf-8-characters-fr.patch +perf-pmu-zfree-expects-a-pointer-to-a-pointer-to-zer.patch +perf-map-delete-two-variable-initialisations-before-.patch +perf-cs-etm-fix-timeless-decode-mode-detection.patch +crypto-sun8i-ss-fix-a-test-in-sun8i_ss_setup_ivs.patch +crypto-api-add-scaffolding-to-change-completion-func.patch +crypto-engine-use-crypto_request_complete.patch +crypto-engine-fix-crypto_queue-backlog-handling.patch +perf-symbols-fix-return-incorrect-build_id-size-in-e.patch +perf-tracepoint-fix-memory-leak-in-is_valid_tracepoi.patch +perf-stat-separate-bperf-from-bpf_profiler.patch diff --git a/queue-6.1/sfc-fix-module-eeprom-reporting-for-qsfp-modules.patch b/queue-6.1/sfc-fix-module-eeprom-reporting-for-qsfp-modules.patch new file mode 100644 index 00000000000..94329377180 --- /dev/null +++ b/queue-6.1/sfc-fix-module-eeprom-reporting-for-qsfp-modules.patch @@ -0,0 +1,59 @@ +From a50079f5399f39fae61fb3de1cfc961f323b164e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 12:33:33 +0100 +Subject: sfc: Fix module EEPROM reporting for QSFP modules + +From: Andy Moreton + +[ Upstream commit 281900a923d4c50df109b52a22ae3cdac150159b ] + +The sfc driver does not report QSFP module EEPROM contents correctly +as only the first page is fetched from hardware. + +Commit 0e1a2a3e6e7d ("ethtool: Add SFF-8436 and SFF-8636 max EEPROM +length definitions") added ETH_MODULE_SFF_8436_MAX_LEN for the overall +size of the EEPROM info, so use that to report the full EEPROM contents. + +Fixes: 9b17010da57a ("sfc: Add ethtool -m support for QSFP modules") +Signed-off-by: Andy Moreton +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/sfc/mcdi_port_common.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/sfc/mcdi_port_common.c b/drivers/net/ethernet/sfc/mcdi_port_common.c +index 899cc16710048..0ab14f3d01d4d 100644 +--- a/drivers/net/ethernet/sfc/mcdi_port_common.c ++++ b/drivers/net/ethernet/sfc/mcdi_port_common.c +@@ -972,12 +972,15 @@ static u32 efx_mcdi_phy_module_type(struct efx_nic *efx) + + /* A QSFP+ NIC may actually have an SFP+ module attached. + * The ID is page 0, byte 0. ++ * QSFP28 is of type SFF_8636, however, this is treated ++ * the same by ethtool, so we can also treat them the same. + */ + switch (efx_mcdi_phy_get_module_eeprom_byte(efx, 0, 0)) { +- case 0x3: ++ case 0x3: /* SFP */ + return MC_CMD_MEDIA_SFP_PLUS; +- case 0xc: +- case 0xd: ++ case 0xc: /* QSFP */ ++ case 0xd: /* QSFP+ */ ++ case 0x11: /* QSFP28 */ + return MC_CMD_MEDIA_QSFP_PLUS; + default: + return 0; +@@ -1075,7 +1078,7 @@ int efx_mcdi_phy_get_module_info(struct efx_nic *efx, struct ethtool_modinfo *mo + + case MC_CMD_MEDIA_QSFP_PLUS: + modinfo->type = ETH_MODULE_SFF_8436; +- modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; ++ modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN; + break; + + default: +-- +2.39.2 + diff --git a/queue-6.1/sit-update-dev-needed_headroom-in-ipip6_tunnel_bind_.patch b/queue-6.1/sit-update-dev-needed_headroom-in-ipip6_tunnel_bind_.patch new file mode 100644 index 00000000000..3a0a59eda9f --- /dev/null +++ b/queue-6.1/sit-update-dev-needed_headroom-in-ipip6_tunnel_bind_.patch @@ -0,0 +1,69 @@ +From 8a365a8cdb44aee0d49e899f1474d22b560fc7ee Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 23:00:06 -0700 +Subject: sit: update dev->needed_headroom in ipip6_tunnel_bind_dev() + +From: Cong Wang + +[ Upstream commit c88f8d5cd95fd039cff95d682b8e71100c001df0 ] + +When a tunnel device is bound with the underlying device, its +dev->needed_headroom needs to be updated properly. IPv4 tunnels +already do the same in ip_tunnel_bind_dev(). Otherwise we may +not have enough header room for skb, especially after commit +b17f709a2401 ("gue: TX support for using remote checksum offload option"). + +Fixes: 32b8a8e59c9c ("sit: add IPv4 over IPv4 support") +Reported-by: Palash Oswal +Link: https://lore.kernel.org/netdev/CAGyP=7fDcSPKu6nttbGwt7RXzE3uyYxLjCSE97J64pRxJP8jPA@mail.gmail.com/ +Cc: Kuniyuki Iwashima +Cc: Eric Dumazet +Signed-off-by: Cong Wang +Reviewed-by: Eric Dumazet +Reviewed-by: Kuniyuki Iwashima +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/ipv6/sit.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c +index 70d81bba50939..3ffb6a5b1f82a 100644 +--- a/net/ipv6/sit.c ++++ b/net/ipv6/sit.c +@@ -1095,12 +1095,13 @@ static netdev_tx_t sit_tunnel_xmit(struct sk_buff *skb, + + static void ipip6_tunnel_bind_dev(struct net_device *dev) + { ++ struct ip_tunnel *tunnel = netdev_priv(dev); ++ int t_hlen = tunnel->hlen + sizeof(struct iphdr); + struct net_device *tdev = NULL; +- struct ip_tunnel *tunnel; ++ int hlen = LL_MAX_HEADER; + const struct iphdr *iph; + struct flowi4 fl4; + +- tunnel = netdev_priv(dev); + iph = &tunnel->parms.iph; + + if (iph->daddr) { +@@ -1123,14 +1124,15 @@ static void ipip6_tunnel_bind_dev(struct net_device *dev) + tdev = __dev_get_by_index(tunnel->net, tunnel->parms.link); + + if (tdev && !netif_is_l3_master(tdev)) { +- int t_hlen = tunnel->hlen + sizeof(struct iphdr); + int mtu; + + mtu = tdev->mtu - t_hlen; + if (mtu < IPV6_MIN_MTU) + mtu = IPV6_MIN_MTU; + WRITE_ONCE(dev->mtu, mtu); ++ hlen = tdev->hard_header_len + tdev->needed_headroom; + } ++ dev->needed_headroom = t_hlen + hlen; + } + + static void ipip6_tunnel_update(struct ip_tunnel *t, struct ip_tunnel_parm *p, +-- +2.39.2 + diff --git a/queue-6.1/tcp-fix-skb_copy_ubufs-vs-big-tcp.patch b/queue-6.1/tcp-fix-skb_copy_ubufs-vs-big-tcp.patch new file mode 100644 index 00000000000..d6989be13a8 --- /dev/null +++ b/queue-6.1/tcp-fix-skb_copy_ubufs-vs-big-tcp.patch @@ -0,0 +1,96 @@ +From b2ca2cc02e029f7e9d7bb8879141c2541083ea65 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Apr 2023 04:32:31 +0000 +Subject: tcp: fix skb_copy_ubufs() vs BIG TCP + +From: Eric Dumazet + +[ Upstream commit 7e692df3933628d974acb9f5b334d2b3e885e2a6 ] + +David Ahern reported crashes in skb_copy_ubufs() caused by TCP tx zerocopy +using hugepages, and skb length bigger than ~68 KB. + +skb_copy_ubufs() assumed it could copy all payload using up to +MAX_SKB_FRAGS order-0 pages. + +This assumption broke when BIG TCP was able to put up to 512 KB per skb. + +We did not hit this bug at Google because we use CONFIG_MAX_SKB_FRAGS=45 +and limit gso_max_size to 180000. + +A solution is to use higher order pages if needed. + +v2: add missing __GFP_COMP, or we leak memory. + +Fixes: 7c4e983c4f3c ("net: allow gso_max_size to exceed 65536") +Reported-by: David Ahern +Link: https://lore.kernel.org/netdev/c70000f6-baa4-4a05-46d0-4b3e0dc1ccc8@gmail.com/T/ +Signed-off-by: Eric Dumazet +Cc: Xin Long +Cc: Willem de Bruijn +Cc: Coco Li +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/core/skbuff.c | 20 ++++++++++++++------ + 1 file changed, 14 insertions(+), 6 deletions(-) + +diff --git a/net/core/skbuff.c b/net/core/skbuff.c +index 597c1f17d3889..ccfd9053754a9 100644 +--- a/net/core/skbuff.c ++++ b/net/core/skbuff.c +@@ -1544,7 +1544,7 @@ int skb_copy_ubufs(struct sk_buff *skb, gfp_t gfp_mask) + { + int num_frags = skb_shinfo(skb)->nr_frags; + struct page *page, *head = NULL; +- int i, new_frags; ++ int i, order, psize, new_frags; + u32 d_off; + + if (skb_shared(skb) || skb_unclone(skb, gfp_mask)) +@@ -1553,9 +1553,17 @@ int skb_copy_ubufs(struct sk_buff *skb, gfp_t gfp_mask) + if (!num_frags) + goto release; + +- new_frags = (__skb_pagelen(skb) + PAGE_SIZE - 1) >> PAGE_SHIFT; ++ /* We might have to allocate high order pages, so compute what minimum ++ * page order is needed. ++ */ ++ order = 0; ++ while ((PAGE_SIZE << order) * MAX_SKB_FRAGS < __skb_pagelen(skb)) ++ order++; ++ psize = (PAGE_SIZE << order); ++ ++ new_frags = (__skb_pagelen(skb) + psize - 1) >> (PAGE_SHIFT + order); + for (i = 0; i < new_frags; i++) { +- page = alloc_page(gfp_mask); ++ page = alloc_pages(gfp_mask | __GFP_COMP, order); + if (!page) { + while (head) { + struct page *next = (struct page *)page_private(head); +@@ -1582,11 +1590,11 @@ int skb_copy_ubufs(struct sk_buff *skb, gfp_t gfp_mask) + vaddr = kmap_atomic(p); + + while (done < p_len) { +- if (d_off == PAGE_SIZE) { ++ if (d_off == psize) { + d_off = 0; + page = (struct page *)page_private(page); + } +- copy = min_t(u32, PAGE_SIZE - d_off, p_len - done); ++ copy = min_t(u32, psize - d_off, p_len - done); + memcpy(page_address(page) + d_off, + vaddr + p_off + done, copy); + done += copy; +@@ -1602,7 +1610,7 @@ int skb_copy_ubufs(struct sk_buff *skb, gfp_t gfp_mask) + + /* skb frags point to kernel buffers */ + for (i = 0; i < new_frags - 1; i++) { +- __skb_fill_page_desc(skb, i, head, 0, PAGE_SIZE); ++ __skb_fill_page_desc(skb, i, head, 0, psize); + head = (struct page *)page_private(head); + } + __skb_fill_page_desc(skb, new_frags - 1, head, 0, d_off); +-- +2.39.2 + diff --git a/queue-6.1/virtio_net-suppress-cpu-stall-when-free_unused_bufs.patch b/queue-6.1/virtio_net-suppress-cpu-stall-when-free_unused_bufs.patch new file mode 100644 index 00000000000..43b8b0b53f8 --- /dev/null +++ b/queue-6.1/virtio_net-suppress-cpu-stall-when-free_unused_bufs.patch @@ -0,0 +1,44 @@ +From 4f43f7a069219e22fb3de209ef0b090d6d7717ea Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 May 2023 10:27:06 +0800 +Subject: virtio_net: suppress cpu stall when free_unused_bufs + +From: Wenliang Wang + +[ Upstream commit f8bb5104394560e29017c25bcade4c6b7aabd108 ] + +For multi-queue and large ring-size use case, the following error +occurred when free_unused_bufs: +rcu: INFO: rcu_sched self-detected stall on CPU. + +Fixes: 986a4f4d452d ("virtio_net: multiqueue support") +Signed-off-by: Wenliang Wang +Acked-by: Michael S. Tsirkin +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/virtio_net.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c +index 3f1883814ce21..9a612b13b4e46 100644 +--- a/drivers/net/virtio_net.c ++++ b/drivers/net/virtio_net.c +@@ -3405,12 +3405,14 @@ static void free_unused_bufs(struct virtnet_info *vi) + struct virtqueue *vq = vi->sq[i].vq; + while ((buf = virtqueue_detach_unused_buf(vq)) != NULL) + virtnet_sq_free_unused_buf(vq, buf); ++ cond_resched(); + } + + for (i = 0; i < vi->max_queue_pairs; i++) { + struct virtqueue *vq = vi->rq[i].vq; + while ((buf = virtqueue_detach_unused_buf(vq)) != NULL) + virtnet_rq_free_unused_buf(vq, buf); ++ cond_resched(); + } + } + +-- +2.39.2 + diff --git a/queue-6.1/watchdog-dw_wdt-fix-the-error-handling-path-of-dw_wd.patch b/queue-6.1/watchdog-dw_wdt-fix-the-error-handling-path-of-dw_wd.patch new file mode 100644 index 00000000000..ec92c24ed12 --- /dev/null +++ b/queue-6.1/watchdog-dw_wdt-fix-the-error-handling-path-of-dw_wd.patch @@ -0,0 +1,59 @@ +From bb86b0f9f0f0cff0c611e8682cb798241ff076ec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Apr 2023 08:52:48 +0200 +Subject: watchdog: dw_wdt: Fix the error handling path of dw_wdt_drv_probe() + +From: Christophe JAILLET + +[ Upstream commit 7f5390750645756bd5da2b24fac285f2654dd922 ] + +The commit in Fixes has only updated the remove function and missed the +error handling path of the probe. + +Add the missing reset_control_assert() call. + +Fixes: 65a3b6935d92 ("watchdog: dw_wdt: get reset lines from dt") +Signed-off-by: Christophe JAILLET +Reviewed-by: Philipp Zabel +Reviewed-by: Guenter Roeck +Link: https://lore.kernel.org/r/fbb650650bbb33a8fa2fd028c23157bedeed50e1.1682491863.git.christophe.jaillet@wanadoo.fr +Signed-off-by: Guenter Roeck +Signed-off-by: Wim Van Sebroeck +Signed-off-by: Sasha Levin +--- + drivers/watchdog/dw_wdt.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c +index 52962e8d11a6f..61af5d1332ac6 100644 +--- a/drivers/watchdog/dw_wdt.c ++++ b/drivers/watchdog/dw_wdt.c +@@ -635,7 +635,7 @@ static int dw_wdt_drv_probe(struct platform_device *pdev) + + ret = dw_wdt_init_timeouts(dw_wdt, dev); + if (ret) +- goto out_disable_clk; ++ goto out_assert_rst; + + wdd = &dw_wdt->wdd; + wdd->ops = &dw_wdt_ops; +@@ -666,12 +666,15 @@ static int dw_wdt_drv_probe(struct platform_device *pdev) + + ret = watchdog_register_device(wdd); + if (ret) +- goto out_disable_pclk; ++ goto out_assert_rst; + + dw_wdt_dbgfs_init(dw_wdt); + + return 0; + ++out_assert_rst: ++ reset_control_assert(dw_wdt->rst); ++ + out_disable_pclk: + clk_disable_unprepare(dw_wdt->pclk); + +-- +2.39.2 + diff --git a/queue-6.1/writeback-fix-call-of-incorrect-macro.patch b/queue-6.1/writeback-fix-call-of-incorrect-macro.patch new file mode 100644 index 00000000000..b3eeb597163 --- /dev/null +++ b/queue-6.1/writeback-fix-call-of-incorrect-macro.patch @@ -0,0 +1,41 @@ +From 28b2235dc7088d3cc0ef9ce76a97f537f46c9787 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 19 Jan 2023 13:44:43 +0300 +Subject: writeback: fix call of incorrect macro + +From: Maxim Korotkov + +[ Upstream commit 3e46c89c74f2c38e5337d2cf44b0b551adff1cb4 ] + + the variable 'history' is of type u16, it may be an error + that the hweight32 macro was used for it + I guess macro hweight16 should be used + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: 2a81490811d0 ("writeback: implement foreign cgroup inode detection") +Signed-off-by: Maxim Korotkov +Reviewed-by: Jan Kara +Link: https://lore.kernel.org/r/20230119104443.3002-1-korotkov.maxim.s@gmail.com +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + fs/fs-writeback.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c +index aa33c39be1829..d387708977a50 100644 +--- a/fs/fs-writeback.c ++++ b/fs/fs-writeback.c +@@ -827,7 +827,7 @@ void wbc_detach_inode(struct writeback_control *wbc) + * is okay. The main goal is avoiding keeping an inode on + * the wrong wb for an extended period of time. + */ +- if (hweight32(history) > WB_FRN_HIST_THR_SLOTS) ++ if (hweight16(history) > WB_FRN_HIST_THR_SLOTS) + inode_switch_wbs(inode, max_id); + } + +-- +2.39.2 +