From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Tue, 2 Oct 2018 15:00:34 +0000 (-0700)
Subject: 4.9-stable patches
X-Git-Tag: v4.18.12~11
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=65fbd2d19a77e61ec35048ac9b224c246670ea83;p=thirdparty%2Fkernel%2Fstable-queue.git

4.9-stable patches

added patches:
	arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch
---

diff --git a/queue-4.9/arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch b/queue-4.9/arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch
new file mode 100644
index 00000000000..3d3c89e35a0
--- /dev/null
+++ b/queue-4.9/arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch
@@ -0,0 +1,56 @@
+From 2a3f93459d689d990b3ecfbe782fec89b97d3279 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Thu, 27 Sep 2018 16:53:22 +0100
+Subject: arm64: KVM: Sanitize PSTATE.M when being set from userspace
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit 2a3f93459d689d990b3ecfbe782fec89b97d3279 upstream.
+
+Not all execution modes are valid for a guest, and some of them
+depend on what the HW actually supports. Let's verify that what
+userspace provides is compatible with both the VM settings and
+the HW capabilities.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 0d854a60b1d7 ("arm64: KVM: enable initialization of a 32bit vcpu")
+Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
+Reviewed-by: Mark Rutland <mark.rutland@arm.com>
+Reviewed-by: Dave Martin <Dave.Martin@arm.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kvm/guest.c |   10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/kvm/guest.c
++++ b/arch/arm64/kvm/guest.c
+@@ -152,17 +152,25 @@ static int set_core_reg(struct kvm_vcpu
+ 	}
+ 
+ 	if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
+-		u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK;
++		u64 mode = (*(u64 *)valp) & COMPAT_PSR_MODE_MASK;
+ 		switch (mode) {
+ 		case COMPAT_PSR_MODE_USR:
++			if (!system_supports_32bit_el0())
++				return -EINVAL;
++			break;
+ 		case COMPAT_PSR_MODE_FIQ:
+ 		case COMPAT_PSR_MODE_IRQ:
+ 		case COMPAT_PSR_MODE_SVC:
+ 		case COMPAT_PSR_MODE_ABT:
+ 		case COMPAT_PSR_MODE_UND:
++			if (!vcpu_el1_is_32bit(vcpu))
++				return -EINVAL;
++			break;
+ 		case PSR_MODE_EL0t:
+ 		case PSR_MODE_EL1t:
+ 		case PSR_MODE_EL1h:
++			if (vcpu_el1_is_32bit(vcpu))
++				return -EINVAL;
+ 			break;
+ 		default:
+ 			err = -EINVAL;
diff --git a/queue-4.9/series b/queue-4.9/series
index 7a4b54e2c64..4f1bf57b7f1 100644
--- a/queue-4.9/series
+++ b/queue-4.9/series
@@ -92,3 +92,4 @@ drm-amdgpu-update-power-state-at-the-end-of-smu-hw_init.patch
 arm-arm64-smccc-1.1-make-return-values-unsigned-long.patch
 arm-arm64-smccc-1.1-handle-function-result-as-parameters.patch
 i2c-i801-allow-acpi-aml-access-i-o-ports-not-reserved-for-smbus.patch
+arm64-kvm-sanitize-pstate.m-when-being-set-from-userspace.patch