From: Greg Kroah-Hartman Date: Fri, 18 Jan 2019 16:06:12 +0000 (+0100) Subject: 4.19-stable patches X-Git-Tag: v4.20.4~47 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=66abfba06419b2a106267b2bf74f15dbf507f147;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: mmc-sdhci-msm-disable-cdr-function-on-tx.patch --- diff --git a/queue-4.19/mmc-sdhci-msm-disable-cdr-function-on-tx.patch b/queue-4.19/mmc-sdhci-msm-disable-cdr-function-on-tx.patch new file mode 100644 index 00000000000..4849735e7dc --- /dev/null +++ b/queue-4.19/mmc-sdhci-msm-disable-cdr-function-on-tx.patch @@ -0,0 +1,112 @@ +From a89e7bcb18081c611eb6cf50edd440fa4983a71a Mon Sep 17 00:00:00 2001 +From: Loic Poulain +Date: Tue, 4 Dec 2018 13:25:32 +0100 +Subject: mmc: sdhci-msm: Disable CDR function on TX + +From: Loic Poulain + +commit a89e7bcb18081c611eb6cf50edd440fa4983a71a upstream. + +The Clock Data Recovery (CDR) circuit allows to automatically adjust +the RX sampling-point/phase for high frequency cards (SDR104, HS200...). +CDR is automatically enabled during DLL configuration. +However, according to the APQ8016 reference manual, this function +must be disabled during TX and tuning phase in order to prevent any +interferences during tuning challenges and unexpected phase alteration +during TX transfers. + +This patch enables/disables CDR according to the current transfer mode. + +This fixes sporadic write transfer issues observed with some SDR104 and +HS200 cards. + +Inspired by sdhci-msm downstream patch: +https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/432516/ + +Reported-by: Leonid Segal +Reported-by: Manabu Igusa +Signed-off-by: Loic Poulain +Acked-by: Adrian Hunter +Acked-by: Georgi Djakov +Signed-off-by: Ulf Hansson +[georgi: backport to v4.19+] +Signed-off-by: Georgi Djakov +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci-msm.c | 43 ++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 42 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/sdhci-msm.c ++++ b/drivers/mmc/host/sdhci-msm.c +@@ -258,6 +258,8 @@ struct sdhci_msm_host { + bool mci_removed; + const struct sdhci_msm_variant_ops *var_ops; + const struct sdhci_msm_offset *offset; ++ bool use_cdr; ++ u32 transfer_mode; + }; + + static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host) +@@ -1025,6 +1027,26 @@ out: + return ret; + } + ++static void sdhci_msm_set_cdr(struct sdhci_host *host, bool enable) ++{ ++ const struct sdhci_msm_offset *msm_offset = sdhci_priv_msm_offset(host); ++ u32 config, oldconfig = readl_relaxed(host->ioaddr + ++ msm_offset->core_dll_config); ++ ++ config = oldconfig; ++ if (enable) { ++ config |= CORE_CDR_EN; ++ config &= ~CORE_CDR_EXT_EN; ++ } else { ++ config &= ~CORE_CDR_EN; ++ config |= CORE_CDR_EXT_EN; ++ } ++ ++ if (config != oldconfig) ++ writel_relaxed(config, host->ioaddr + ++ msm_offset->core_dll_config); ++} ++ + static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode) + { + struct sdhci_host *host = mmc_priv(mmc); +@@ -1042,8 +1064,14 @@ static int sdhci_msm_execute_tuning(stru + if (host->clock <= CORE_FREQ_100MHZ || + !(ios.timing == MMC_TIMING_MMC_HS400 || + ios.timing == MMC_TIMING_MMC_HS200 || +- ios.timing == MMC_TIMING_UHS_SDR104)) ++ ios.timing == MMC_TIMING_UHS_SDR104)) { ++ msm_host->use_cdr = false; ++ sdhci_msm_set_cdr(host, false); + return 0; ++ } ++ ++ /* Clock-Data-Recovery used to dynamically adjust RX sampling point */ ++ msm_host->use_cdr = true; + + /* + * For HS400 tuning in HS200 timing requires: +@@ -1525,6 +1553,19 @@ static int __sdhci_msm_check_write(struc + case SDHCI_POWER_CONTROL: + req_type = !val ? REQ_BUS_OFF : REQ_BUS_ON; + break; ++ case SDHCI_TRANSFER_MODE: ++ msm_host->transfer_mode = val; ++ break; ++ case SDHCI_COMMAND: ++ if (!msm_host->use_cdr) ++ break; ++ if ((msm_host->transfer_mode & SDHCI_TRNS_READ) && ++ SDHCI_GET_CMD(val) != MMC_SEND_TUNING_BLOCK_HS200 && ++ SDHCI_GET_CMD(val) != MMC_SEND_TUNING_BLOCK) ++ sdhci_msm_set_cdr(host, true); ++ else ++ sdhci_msm_set_cdr(host, false); ++ break; + } + + if (req_type) { diff --git a/queue-4.19/series b/queue-4.19/series index 8241e1f4d55..6e54bfa3c87 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -11,3 +11,4 @@ netfilter-nf_conncount-merge-lookup-and-add-functions.patch netfilter-nf_conncount-move-all-list-iterations-under-spinlock.patch netfilter-nf_conncount-speculative-garbage-collection-on-empty-lists.patch netfilter-nf_conncount-fix-argument-order-to-find_next_bit.patch +mmc-sdhci-msm-disable-cdr-function-on-tx.patch