From: Ville Syrjälä Date: Tue, 11 Feb 2025 23:19:32 +0000 (+0200) Subject: drm/i915: Document which RING_FAULT bits apply to which platforms X-Git-Tag: v6.15-rc1~120^2^2~11 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=66ec4c1ab1c1c6b90afba0dd5ece625009c2c9ab;p=thirdparty%2Fkernel%2Flinux.git drm/i915: Document which RING_FAULT bits apply to which platforms The RING_FAULT bits have change a bit over the years. Document which platforms use which bits. Signed-off-by: Ville Syrjälä Reviewed-by: Andi Shyti Signed-off-by: Andi Shyti Link: https://patchwork.freedesktop.org/patch/msgid/20250211231941.22769-5-ville.syrjala@linux.intel.com --- diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index ac8696fbca3f5..e550d4f9c3e61 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -326,10 +326,10 @@ _RING_FAULT_REG_VCS, \ _RING_FAULT_REG_VECS, \ _RING_FAULT_REG_BCS)) -#define RING_FAULT_ENGINE_ID_MASK REG_GENMASK(16, 12) -#define RING_FAULT_GTTSEL_MASK REG_BIT(11) +#define RING_FAULT_ENGINE_ID_MASK REG_GENMASK(16, 12) /* bdw+ */ +#define RING_FAULT_GTTSEL_MASK REG_BIT(11) /* pre-bdw */ #define RING_FAULT_SRCID_MASK REG_GENMASK(10, 3) -#define RING_FAULT_FAULT_TYPE_MASK REG_GENMASK(2, 1) +#define RING_FAULT_FAULT_TYPE_MASK REG_GENMASK(2, 1) /* ivb+ */ #define RING_FAULT_VALID REG_BIT(0) #define ERROR_GEN6 _MMIO(0x40a0)