From: Max Chou <max.chou@sifive.com>
Date: Fri, 22 Mar 2024 09:25:57 +0000 (+0800)
Subject: target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w
X-Git-Tag: v9.1.0-rc0~87^2~8
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=692f33a3abcaae789b08623e7cbdffcd2c738c89;p=thirdparty%2Fqemu.git

target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w

The opfv_narrow_check needs to check the single width float operator by
require_rvf.

Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240322092600.1198921-4-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---

diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
index a7217aed4ec..c3af38af80e 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -2817,6 +2817,7 @@ static bool opffv_narrow_check(DisasContext *s, arg_rmr *a)
 static bool opffv_rod_narrow_check(DisasContext *s, arg_rmr *a)
 {
     return opfv_narrow_check(s, a) &&
+           require_rvf(s) &&
            require_scale_rvf(s) &&
            (s->sew != MO_8);
 }