From: Christian Bruel Date: Mon, 20 Jul 2009 07:37:37 +0000 (+0200) Subject: SH: resurect -mfmovd X-Git-Tag: releases/gcc-4.5.0~4503 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6a799f6e68fcbd39c77f43524629183afc687202;p=thirdparty%2Fgcc.git SH: resurect -mfmovd From-SVN: r149803 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6dd9908c4ce5..6053b5434a7a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2009-07-20 Christian Bruel + + * config/sh/sh.opt (-mfmovd): Resurrect and document. + * doc/invoke.texi (-mfmovd): Likewise. + * config/sh/sh.h (TARGET_FMOVD, MASK_FMOVD): Remove default setting. + 2009-07-20 Jan Hubicka * tree-ssa-dce.c (remove_dead_phis): Only look for abnormal PHIs @@ -127,6 +133,7 @@ * c-omp.c (c_finish_omp_atomic): Set DECL_CONTEXT on the temporary variable. +>>>>>>> .r149802 2009-07-17 Sandra Loosemore * doc/service.texi (Service): Restore previously removed link, @@ -146,6 +153,7 @@ * gimplify.c (gimplify_conversion): Don't change non-conversions into VIEW_CONVERT_EXPR. +>>>>>>> .r149747 2009-07-16 Sandra Loosemore * doc/extend.texi (Nested Functions): Replace broken link with diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index d9a4c5f25cc6..9b3d99fc788a 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -28,11 +28,6 @@ along with GCC; see the file COPYING3. If not see #define TARGET_VERSION \ fputs (" (Hitachi SH)", stderr); -#ifndef TARGET_FMOVD -#define TARGET_FMOVD 0 -#define MASK_FMOVD 0 -#endif - /* Unfortunately, insn-attrtab.c doesn't include insn-codes.h. We can't include it here, because bconfig.h is also included by gencodes.c . */ /* ??? No longer true. */ diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt index b2e7c6de77fe..dbe077ca49bc 100644 --- a/gcc/config/sh/sh.opt +++ b/gcc/config/sh/sh.opt @@ -244,6 +244,10 @@ mdivsi3_libfunc= Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("") Specify name for 32 bit signed division function +mfmovd +Target RejectNegative Mask(FMOVD) +Enable the use of 64-bit floating point registers in fmov instructions. See -mdalign if 64-bit alignment is required. + mfixed-range= Target RejectNegative Joined Var(sh_fixed_range_str) Specify range of registers to make fixed @@ -312,7 +316,7 @@ Follow Renesas (formerly Hitachi) / SuperH calling conventions mspace Target Report RejectNegative Mask(SMALLCODE) -Deprecated. Use -Os instead +Deprecated. Use -Os instead multcost= Target RejectNegative Joined UInteger Var(sh_multcost) Init(-1) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index bd868bf09e24..ce94a32ae996 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -800,7 +800,7 @@ See RS/6000 and PowerPC Options. -m5-32media -m5-32media-nofpu @gol -m5-compact -m5-compact-nofpu @gol -mb -ml -mdalign -mrelax @gol --mbigtable -mhitachi -mrenesas -mno-renesas -mnomacsave @gol +-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol -mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace @gol -mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol -mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol @@ -15306,6 +15306,11 @@ Use 32-bit offsets in @code{switch} tables. The default is to use @opindex mbitops Enable the use of bit manipulation instructions on SH2A. +@item -mfmovd +@opindex mfmovd +Enable the use of the instruction @code{fmovd}. Check @option{-mdalign} for +alignment constraints. + @item -mhitachi @opindex mhitachi Comply with the calling conventions defined by Renesas. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 187dae19618e..a3116320464b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2009-07-20 Christian Bruel + + * gcc.target/sh/mfmovd.c: New test. + 2009-07-19 Janne Blomqvist Jerry DeLisle @@ -52,6 +56,7 @@ * gcc.target/powerpc/asm-es-1.c: New test. * gcc.target/powerpc/asm-es-2.c: Likewise. +>>>>>>> .r149802 2009-07-17 Richard Guenther PR c/40401 @@ -84,6 +89,7 @@ PR c++/40780 * g++.dg/template/ptrmem19.C: New test. +>>>>>>> .r149747 2009-07-17 Aldy Hernandez Manuel López-Ibáñez diff --git a/gcc/testsuite/gcc.target/sh/mfmovd.c b/gcc/testsuite/gcc.target/sh/mfmovd.c new file mode 100644 index 000000000000..c8e0094f0c11 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/mfmovd.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-mfmovd" } */ +/* { dg-skip-if "No double precision FPU support" { "sh*-*-*" } "-m2a-nofpu -m2a-single-only -m4-nofpu -m4-single-only -m4a-nofpu -m4a-single-only" { "" } } */ +/* { dg-final { scan-assembler "fmov.d"} } */ + +extern double g; + +void +f (double d) +{ + g = d; +} +