From: Jens Remus Date: Mon, 27 Jan 2025 15:47:10 +0000 (+0100) Subject: s390: Add basic PLT generation tests X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6dbc8a3ef46c1d7889d65d8bc787ef095fed04c6;p=thirdparty%2Fbinutils-gdb.git s390: Add basic PLT generation tests ld/testsuite/ * ld-s390/plt_31_non-pic-1.pd: New non-PIC/PIE PLT generation test for 31-bit. * ld-s390/plt_31_pic-1.pd: New PIC/PIE PLT generation test for 31-bit. * ld-s390/plt_31-1.wf: New PLT generation test for 31-bit. * ld-s390/plt_64-1.pd: New PLT generation test for 64-bit. * ld-s390/plt_64-1.wf: Likewise. * ld-s390/plt-1.s: New PLT generation test for 31/64-bit. * ld-s390/pltlib.s: Likewise. * ld-s390/s390.exp: Run new PLT generation tests. Signed-off-by: Jens Remus --- diff --git a/ld/testsuite/ld-s390/plt_31-1.s b/ld/testsuite/ld-s390/plt_31-1.s new file mode 100644 index 00000000000..47e101025e8 --- /dev/null +++ b/ld/testsuite/ld-s390/plt_31-1.s @@ -0,0 +1,40 @@ + .text + .globl _start + .type _start,@function +_start: + .cfi_startproc + .cfi_remember_state + # Save used call-saved registers. + stm %r12,%r15,48(%r15) + .cfi_rel_offset %r12, 48 + .cfi_rel_offset %r13, 52 + .cfi_rel_offset %r14, 56 + .cfi_rel_offset %r15, 60 + # Allocate stack frame and maintain backchain. + lr %r0,%r15 + ahi %r15,-96 + .cfi_adjust_cfa_offset 96 + st %r0,0(%r15) + # Setup literal pool pointer in r13. + bras %r13,.Llp_end +.Llp: +.Llpgot: .long _GLOBAL_OFFSET_TABLE_-.Llp +.Llpfoo: .long foo@plt +.Llpbar: .long bar@plt +.Llp_end: + # Setup GOT pointer in r12. + l %r12,.Llpgot-.Llp(%r13) # _GLOBAL_OFFSET_TABLE_ + alr %r12,%r13 + # Call foo via PLT. + l %r1,.Llpfoo-.Llp(%r13) # foo@plt + basr %r14,%r1 + # Call bar via PLT. + l %r1,.Llpbar-.Llp(%r13) # bar@plt + basr %r14,%r1 + # Free stack frame and restore used call-saved registers. + lm %r12,%r15,96+48(%r15) + .cfi_restore_state + # Return to caller with return code 0. + xr %r2,%r2 + br %r14 + .cfi_endproc diff --git a/ld/testsuite/ld-s390/plt_31-1.wf b/ld/testsuite/ld-s390/plt_31-1.wf new file mode 100644 index 00000000000..e4fa3a3e7a2 --- /dev/null +++ b/ld/testsuite/ld-s390/plt_31-1.wf @@ -0,0 +1,32 @@ +#source: plt_31-1.s +#as: -m31 +#ld: -m elf_s390 [-pic] +#readelf: -wf +#target: s390-*-* + +Contents of the .eh_frame section: + + +00000000 00000010 00000000 CIE + Version: 1 + Augmentation: "zR" + Code alignment factor: 1 + Data alignment factor: -4 + Return address column: 14 + Augmentation data: 1b + DW_CFA_def_cfa: r15 ofs 96 + +00000014 00000020 00000018 FDE cie=00000000 pc=[0-9a-f]+..[0-9a-f]+ + DW_CFA_remember_state + DW_CFA_advance_loc: 4 to [0-9a-f]+ + DW_CFA_offset: r12 at cfa-48 + DW_CFA_offset: r13 at cfa-44 + DW_CFA_offset: r14 at cfa-40 + DW_CFA_offset: r15 at cfa-36 + DW_CFA_advance_loc: 6 to [0-9a-f]+ + DW_CFA_def_cfa_offset: 192 + DW_CFA_advance_loc: 42 to [0-9a-f]+ + DW_CFA_restore_state + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop diff --git a/ld/testsuite/ld-s390/plt_31_non-pic-1.pd b/ld/testsuite/ld-s390/plt_31_non-pic-1.pd new file mode 100644 index 00000000000..6e9c01de69f --- /dev/null +++ b/ld/testsuite/ld-s390/plt_31_non-pic-1.pd @@ -0,0 +1,54 @@ +#source: plt_31-1.s +#as: -m31 +#ld: -m elf_s390 +#objdump: -M insnlength -dzrj.plt +#target: s390-*-* + +.*: +file format .* + + +Disassembly of section .plt: + +# PLT0 for non-PIC/PIE +[0-9a-f]+ <.plt>: + +[0-9a-f]+: 50 10 f0 1c [ ]*st %r1,28\(%r15\) + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 12 [ ]*l %r1,18\(%r1\) + +[0-9a-f]+: d2 03 f0 18 10 04 [ ]*mvc 24\(4,%r15\),4\(%r1\) + +[0-9a-f]+: 58 10 10 08 [ ]*l %r1,8\(%r1\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +# PLTn for non-PIC/PIE +[0-9a-f]+ : + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 16 [ ]*l %r1,22\(%r1\) + +[0-9a-f]+: 58 10 10 00 [ ]*l %r1,0\(%r1\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 0e [ ]*l %r1,14\(%r1\) + +[0-9a-f]+: a7 f4 ([0-9a-f]{2} ){2}[ ]*j [0-9a-f]+ \<\.plt\> + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +# PLTn for non-PIC/PIE +[0-9a-f]+ : + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 16 [ ]*l %r1,22\(%r1\) + +[0-9a-f]+: 58 10 10 00 [ ]*l %r1,0\(%r1\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 0e [ ]*l %r1,14\(%r1\) + +[0-9a-f]+: a7 f4 ([0-9a-f]{2} ){2}[ ]*j [0-9a-f]+ \<\.plt\> + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* diff --git a/ld/testsuite/ld-s390/plt_31_pic-1.pd b/ld/testsuite/ld-s390/plt_31_pic-1.pd new file mode 100644 index 00000000000..8cee0ee8483 --- /dev/null +++ b/ld/testsuite/ld-s390/plt_31_pic-1.pd @@ -0,0 +1,57 @@ +#source: plt_31-1.s +#as: -m31 +#ld: -m elf_s390 -pic +#objdump: -M insnlength -dzrj.plt +#target: s390-*-* + +.*: +file format .* + + +Disassembly of section .plt: + +# PLT0 for PIC/PIE +[0-9a-f]+ <.plt>: + +[0-9a-f]+: 50 10 f0 1c [ ]*st %r1,28\(%r15\) + +[0-9a-f]+: 58 10 c0 04 [ ]*l %r1,4\(%r12\) + +[0-9a-f]+: 50 10 f0 18 [ ]*st %r1,24\(%r15\) + +[0-9a-f]+: 58 10 c0 08 [ ]*l %r1,8\(%r12\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +# PLTn for PIC/PIE and GOT offset < 4096 +[0-9a-f]+ : + +[0-9a-f]+: 58 10 c0 0c [ ]*l %r1,12\(%r12\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 0e [ ]*l %r1,14\(%r1\) + +[0-9a-f]+: a7 f4 ([0-9a-f]{2} ){2}[ ]*j [0-9a-f]+ \<\.plt\> + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +# PLTn for PIC/PIE and GOT offset < 4096 +[0-9a-f]+ : + +[0-9a-f]+: 58 10 c0 10 [ ]*l %r1,16\(%r12\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: 58 10 10 0e [ ]*l %r1,14\(%r1\) + +[0-9a-f]+: a7 f4 ([0-9a-f]{2} ){2}[ ]*j [0-9a-f]+ \<\.plt\> + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: 00 00 [ ]*\.short 0x0000 + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* + +[0-9a-f]+: ([0-9a-f]{2} ){2}[ ]*.* diff --git a/ld/testsuite/ld-s390/plt_64-1.pd b/ld/testsuite/ld-s390/plt_64-1.pd new file mode 100644 index 00000000000..5f12a2f8f6c --- /dev/null +++ b/ld/testsuite/ld-s390/plt_64-1.pd @@ -0,0 +1,38 @@ +#source: plt_64-1.s +#as: -m64 +#ld: -m elf64_s390 +#objdump: -dzrj.plt +#target: s390x-*-* + +.*: +file format .* + + +Disassembly of section .plt: + +[0-9a-f]+ <.plt>: + +[0-9a-f]+: e3 10 f0 38 00 24 [ ]*stg %r1,56\(%r15\) + +[0-9a-f]+: c0 10 ([0-9a-f]{2} ){4}[ ]*larl %r1,[0-9a-f]+ \<_GLOBAL_OFFSET_TABLE_\> + +[0-9a-f]+: d2 07 f0 30 10 08 [ ]*mvc 48\(8,%r15\),8\(%r1\) + +[0-9a-f]+: e3 10 10 10 00 04 [ ]*lg %r1,16\(%r1\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 07 00 [ ]*nopr + +[0-9a-f]+: 07 00 [ ]*nopr + +[0-9a-f]+: 07 00 [ ]*nopr + +[0-9a-f]+ : + +[0-9a-f]+: c0 10 ([0-9a-f]{2} ){4}[ ]*larl %r1,[0-9a-f]+ \ + +[0-9a-f]+: e3 10 10 00 00 04 [ ]*lg %r1,0\(%r1\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: e3 10 10 0c 00 14 [ ]*lgf %r1,12\(%r1\) + +[0-9a-f]+: c0 f4 ff ff ff e5 [ ]*jg [0-9a-f]+ \<\.plt\> + +[0-9a-f]+: 00 00 00 00 [ ]*.long 0x00000000 + +[0-9a-f]+ : + +[0-9a-f]+: c0 10 ([0-9a-f]{2} ){4}[ ]*larl %r1,[0-9a-f]+ \ + +[0-9a-f]+: e3 10 10 00 00 04 [ ]*lg %r1,0\(%r1\) + +[0-9a-f]+: 07 f1 [ ]*br %r1 + +[0-9a-f]+: 0d 10 [ ]*basr %r1,%r0 + +[0-9a-f]+: e3 10 10 0c 00 14 [ ]*lgf %r1,12\(%r1\) + +[0-9a-f]+: c0 f4 ff ff ff d5 [ ]*jg [0-9a-f]+ \<\.plt\> + +[0-9a-f]+: 00 00 00 18 [ ]*.long 0x00000018 diff --git a/ld/testsuite/ld-s390/plt_64-1.s b/ld/testsuite/ld-s390/plt_64-1.s new file mode 100644 index 00000000000..f5382731f71 --- /dev/null +++ b/ld/testsuite/ld-s390/plt_64-1.s @@ -0,0 +1,26 @@ + .text + .globl _start + .type _start,@function +_start: + .cfi_startproc + .cfi_remember_state + # Save used call-saved registers. + stmg %r14,%r15,112(%r15) + .cfi_rel_offset %r14, 112 + .cfi_rel_offset %r15, 120 + # Allocate stack frame and maintain backchain. + lgr %r0,%r15 + aghi %r15,-160 + .cfi_adjust_cfa_offset 160 + stg %r0,0(%r15) + # Call foo via PLT. + brasl %r14,foo@plt + # Call bar via PLT. + brasl %r14,bar@plt + # Free stack frame and restore used call-saved registers. + lmg %r14,%r15,160+112(%r15) + .cfi_restore_state + # Return to caller with return code 0. + xgr %r2,%r2 + br %r14 + .cfi_endproc diff --git a/ld/testsuite/ld-s390/plt_64-1.wf b/ld/testsuite/ld-s390/plt_64-1.wf new file mode 100644 index 00000000000..61dc4c7a989 --- /dev/null +++ b/ld/testsuite/ld-s390/plt_64-1.wf @@ -0,0 +1,33 @@ +#source: plt_64-1.s +#as: -m64 +#ld: -m elf64_s390 +#readelf: -wf +#target: s390x-*-* + +Contents of the .eh_frame section: + + +00000000 0000000000000014 00000000 CIE + Version: 1 + Augmentation: "zR" + Code alignment factor: 1 + Data alignment factor: -8 + Return address column: 14 + Augmentation data: 1b + DW_CFA_def_cfa: r15 ofs 160 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +00000018 000000000000001c 0000001c FDE cie=00000000 pc=00000000010002b8..00000000010002e4 + DW_CFA_remember_state + DW_CFA_advance_loc: 6 to 00000000010002be + DW_CFA_offset: r14 at cfa-48 + DW_CFA_offset: r15 at cfa-40 + DW_CFA_advance_loc: 8 to 00000000010002c6 + DW_CFA_def_cfa_offset: 320 + DW_CFA_advance_loc: 24 to 00000000010002de + DW_CFA_restore_state + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop diff --git a/ld/testsuite/ld-s390/pltlib.s b/ld/testsuite/ld-s390/pltlib.s new file mode 100644 index 00000000000..3308d554705 --- /dev/null +++ b/ld/testsuite/ld-s390/pltlib.s @@ -0,0 +1,16 @@ + .text + .globl foo + .type foo,@function +foo: + .cfi_startproc + br %r14 + .cfi_endproc + .size foo,.-foo + + .globl bar + .type bar,@function +bar: + .cfi_startproc + br %r14 + .cfi_endproc + .size bar,.-bar diff --git a/ld/testsuite/ld-s390/s390.exp b/ld/testsuite/ld-s390/s390.exp index 8958b5cb531..26dab72c013 100644 --- a/ld/testsuite/ld-s390/s390.exp +++ b/ld/testsuite/ld-s390/s390.exp @@ -59,6 +59,18 @@ set s390tests { "-m31" {gotreloc-1.s} {{objdump -dzrj.text gotreloc_31-no-pie-1.dd}} "gotreloc_31-1"} + {"Helper shared library (PLT test)" + "-shared -m elf_s390" "" "-m31" {pltlib.s} + {} + "libpltlib_31.so"} + {"PLT: PLT generation (non-PIC/PIE)" + "-m elf_s390 tmpdir/libpltlib_31.so" "" "-m31" {plt_31-1.s} + {{objdump "-M insnlength -dzrj.plt" plt_31_non-pic-1.pd} {readelf "-wf" plt_31-1.wf}} + "plt_31_non-pic-1"} + {"PLT: PLT generation (PIC/PIE)" + "-m elf_s390 tmpdir/libpltlib_31.so -pic" "" "-m31" {plt_31-1.s} + {{objdump "-M insnlength -dzrj.plt" plt_31_pic-1.pd} {readelf "-wf" plt_31-1.wf}} + "plt_31_pic-1"} } set s390xtests { @@ -101,6 +113,14 @@ set s390xtests { {"WEAKUNDEF2: overflow test (PLT32DBL)" "-m elf64_s390 -dT 8GB.ld --no-error-rwx-segments -no-pie" "" "-m64" {weakundef-2.s} {{objdump "-dzrj.text" weakundef-2.dd}} "weakundef-2"} + {"Helper shared library (PLT test)" + "-shared -m elf64_s390" "" "-m64" {pltlib.s} + {} + "libpltlib_64.so"} + {"PLT: PLT generation" + "-m elf64_s390 tmpdir/libpltlib_64.so" "" "-m64" {plt_64-1.s} + {{objdump "-dzrj.plt" plt_64-1.pd} {readelf "-wf" plt_64-1.wf}} + "plt_64-1"} } if [istarget "s390-*-*"] {