From: Richard Sandiford Date: Mon, 4 Aug 2025 10:45:33 +0000 (+0100) Subject: aarch64: Use VNx16BI for svac* X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6e26bf69004d5e5476d8813f0546bbb6034aead9;p=thirdparty%2Fgcc.git aarch64: Use VNx16BI for svac* This patch continues the work of making ACLE intrinsics use VNx16BI for svbool_t results. It deals with the svac* intrinsics (floating- point compare absolute). gcc/ * config/aarch64/aarch64-sve.md (@aarch64_pred_fac): Replace with... (@aarch64_pred_fac_acle): ...this new expander. (*aarch64_pred_fac_strict_acle): New pattern. * config/aarch64/aarch64-sve-builtins-base.cc (svac_impl::expand): Update accordingly. gcc/testsuite/ * gcc.target/aarch64/sve/acle/general/acge_1.c: New test. * gcc.target/aarch64/sve/acle/general/acgt_1.c: Likewise. * gcc.target/aarch64/sve/acle/general/acle_1.c: Likewise. * gcc.target/aarch64/sve/acle/general/aclt_1.c: Likewise. --- diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc index 79b5d570694..d58d5972baf 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc @@ -214,7 +214,8 @@ public: expand (function_expander &e) const override { e.add_ptrue_hint (0, e.gp_mode (0)); - insn_code icode = code_for_aarch64_pred_fac (m_unspec, e.vector_mode (0)); + insn_code icode = code_for_aarch64_pred_fac_acle (m_unspec, + e.vector_mode (0)); return e.use_exact_insn (icode); } diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index b653d105717..fef18c31fb8 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -9314,23 +9314,30 @@ ;; ------------------------------------------------------------------------- ;; Predicated floating-point absolute comparisons. -(define_expand "@aarch64_pred_fac" - [(set (match_operand: 0 "register_operand") - (unspec: - [(match_operand: 1 "register_operand") - (match_operand:SI 2 "aarch64_sve_ptrue_flag") - (unspec:SVE_FULL_F - [(match_dup 1) - (match_dup 2) - (match_operand:SVE_FULL_F 3 "register_operand")] - UNSPEC_COND_FABS) - (unspec:SVE_FULL_F - [(match_dup 1) - (match_dup 2) - (match_operand:SVE_FULL_F 4 "register_operand")] - UNSPEC_COND_FABS)] - SVE_COND_FP_ABS_CMP))] +(define_expand "@aarch64_pred_fac_acle" + [(set (match_operand:VNx16BI 0 "register_operand") + (and:VNx16BI + (subreg:VNx16BI + (unspec: + [(match_operand: 1 "register_operand") + (match_operand:SI 2 "aarch64_sve_ptrue_flag") + (unspec:SVE_FULL_F + [(match_dup 1) + (match_dup 2) + (match_operand:SVE_FULL_F 3 "register_operand")] + UNSPEC_COND_FABS) + (unspec:SVE_FULL_F + [(match_dup 1) + (match_dup 2) + (match_operand:SVE_FULL_F 4 "register_operand")] + UNSPEC_COND_FABS)] + SVE_COND_FP_ABS_CMP) + 0) + (match_dup 5)))] "TARGET_SVE" + { + operands[5] = aarch64_ptrue_all (GET_MODE_UNIT_SIZE (mode)); + } ) (define_insn_and_rewrite "*aarch64_pred_fac_relaxed" @@ -9379,6 +9386,30 @@ "fac\t%0., %1/z, %2., %3." ) +(define_insn "*aarch64_pred_fac_strict_acle" + [(set (match_operand:VNx16BI 0 "register_operand" "=Upa") + (and:VNx16BI + (subreg:VNx16BI + (unspec: + [(match_operand: 1 "register_operand" "Upl") + (match_operand:SI 4 "aarch64_sve_ptrue_flag") + (unspec:SVE_FULL_F + [(match_dup 1) + (match_operand:SI 5 "aarch64_sve_gp_strictness") + (match_operand:SVE_FULL_F 2 "register_operand" "w")] + UNSPEC_COND_FABS) + (unspec:SVE_FULL_F + [(match_dup 1) + (match_operand:SI 6 "aarch64_sve_gp_strictness") + (match_operand:SVE_FULL_F 3 "register_operand" "w")] + UNSPEC_COND_FABS)] + SVE_COND_FP_ABS_CMP) + 0) + (match_operand: 7 "aarch64_ptrue_all_operand")))] + "TARGET_SVE" + "fac\t%0., %1/z, %2., %3." +) + ;; ------------------------------------------------------------------------- ;; ---- [PRED] Select ;; ------------------------------------------------------------------------- diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acge_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acge_1.c new file mode 100644 index 00000000000..37428a86700 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acge_1.c @@ -0,0 +1,104 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* +** test1: +** facge p0\.h, p0/z, z0\.h, z1\.h +** ret +*/ +svbool_t +test1 (svbool_t pg, svfloat16_t x, svfloat16_t y) +{ + return svand_z (svptrue_b8 (), + svacge (pg, x, y), + svptrue_b16 ()); +} + +/* +** test2: +** facge p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test2 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svacge (pg, x, y), + svptrue_b16 ()); +} + +/* +** test3: +** facge p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test3 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svacge (pg, x, y), + svptrue_b32 ()); +} + +/* +** test4: +** facge p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test4 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svacge (pg, x, y), + svptrue_b16 ()); +} + +/* +** test5: +** facge p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test5 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svacge (pg, x, y), + svptrue_b8 ()); +} + +/* +** test6: +** facge p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test6 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svacge (pg, x, y), + svptrue_b64 ()); +} + +/* +** test7: +** facge p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test7 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svacge (pg, x, y), + svptrue_b64 ()); +} + +#ifdef __cplusplus +} +#endif diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acgt_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acgt_1.c new file mode 100644 index 00000000000..5829369a479 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acgt_1.c @@ -0,0 +1,104 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* +** test1: +** facgt p0\.h, p0/z, z0\.h, z1\.h +** ret +*/ +svbool_t +test1 (svbool_t pg, svfloat16_t x, svfloat16_t y) +{ + return svand_z (svptrue_b8 (), + svacgt (pg, x, y), + svptrue_b16 ()); +} + +/* +** test2: +** facgt p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test2 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svacgt (pg, x, y), + svptrue_b16 ()); +} + +/* +** test3: +** facgt p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test3 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svacgt (pg, x, y), + svptrue_b32 ()); +} + +/* +** test4: +** facgt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test4 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svacgt (pg, x, y), + svptrue_b16 ()); +} + +/* +** test5: +** facgt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test5 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svacgt (pg, x, y), + svptrue_b8 ()); +} + +/* +** test6: +** facgt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test6 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svacgt (pg, x, y), + svptrue_b64 ()); +} + +/* +** test7: +** facgt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test7 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svacgt (pg, x, y), + svptrue_b64 ()); +} + +#ifdef __cplusplus +} +#endif diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acle_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acle_1.c new file mode 100644 index 00000000000..bd5200e94b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/acle_1.c @@ -0,0 +1,104 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* +** test1: +** facle p0\.h, p0/z, z0\.h, z1\.h +** ret +*/ +svbool_t +test1 (svbool_t pg, svfloat16_t x, svfloat16_t y) +{ + return svand_z (svptrue_b8 (), + svacle (pg, x, y), + svptrue_b16 ()); +} + +/* +** test2: +** facle p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test2 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svacle (pg, x, y), + svptrue_b16 ()); +} + +/* +** test3: +** facle p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test3 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svacle (pg, x, y), + svptrue_b32 ()); +} + +/* +** test4: +** facle p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test4 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svacle (pg, x, y), + svptrue_b16 ()); +} + +/* +** test5: +** facle p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test5 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svacle (pg, x, y), + svptrue_b8 ()); +} + +/* +** test6: +** facle p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test6 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svacle (pg, x, y), + svptrue_b64 ()); +} + +/* +** test7: +** facle p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test7 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svacle (pg, x, y), + svptrue_b64 ()); +} + +#ifdef __cplusplus +} +#endif diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/aclt_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/aclt_1.c new file mode 100644 index 00000000000..876aba965e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/aclt_1.c @@ -0,0 +1,104 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* +** test1: +** faclt p0\.h, p0/z, z0\.h, z1\.h +** ret +*/ +svbool_t +test1 (svbool_t pg, svfloat16_t x, svfloat16_t y) +{ + return svand_z (svptrue_b8 (), + svaclt (pg, x, y), + svptrue_b16 ()); +} + +/* +** test2: +** faclt p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test2 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svaclt (pg, x, y), + svptrue_b16 ()); +} + +/* +** test3: +** faclt p0\.s, p0/z, z0\.s, z1\.s +** ret +*/ +svbool_t +test3 (svbool_t pg, svfloat32_t x, svfloat32_t y) +{ + return svand_z (svptrue_b8 (), + svaclt (pg, x, y), + svptrue_b32 ()); +} + +/* +** test4: +** faclt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test4 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svaclt (pg, x, y), + svptrue_b16 ()); +} + +/* +** test5: +** faclt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test5 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svaclt (pg, x, y), + svptrue_b8 ()); +} + +/* +** test6: +** faclt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test6 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b8 (), + svaclt (pg, x, y), + svptrue_b64 ()); +} + +/* +** test7: +** faclt p0\.d, p0/z, z0\.d, z1\.d +** ret +*/ +svbool_t +test7 (svbool_t pg, svfloat64_t x, svfloat64_t y) +{ + return svand_z (svptrue_b32 (), + svaclt (pg, x, y), + svptrue_b64 ()); +} + +#ifdef __cplusplus +} +#endif