From: Richard Earnshaw Date: Sat, 4 Aug 2012 14:02:56 +0000 (+0000) Subject: arm.c (arm_gen_constant): Use SImode when preparing operands for gen_extzv_t2. X-Git-Tag: releases/gcc-4.8.0~4125 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6f34864a43e8ce45fedaffc62ce2432bb100eb10;p=thirdparty%2Fgcc.git arm.c (arm_gen_constant): Use SImode when preparing operands for gen_extzv_t2. * arm.c (arm_gen_constant): Use SImode when preparing operands for gen_extzv_t2. From-SVN: r190143 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c8985aee9fab..c849368db0a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-08-04 Richard Earnshaw + + * arm.c (arm_gen_constant): Use SImode when preparing operands for + gen_extzv_t2. + 2012-08-04 Uros Bizjak * config/i386/i386.h (QI_REGNO_P): New define. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 00ccb9280de7..b799e0d0be10 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2999,8 +2999,8 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, /* Extz only supports SImode, but we can coerce the operands into that mode. */ emit_constant_insn (cond, - gen_extzv_t2 (gen_lowpart (mode, target), - gen_lowpart (mode, source), + gen_extzv_t2 (gen_lowpart (SImode, target), + gen_lowpart (SImode, source), GEN_INT (i), const0_rtx)); }