From: Maxime Chevallier Date: Thu, 24 Apr 2025 07:12:20 +0000 (+0200) Subject: net: stmmac: socfpga: Enable internal GMII when using 1000BaseX X-Git-Tag: v6.16-rc1~132^2~211^2~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=6fba40e7f61033a2350bd812c5faa1d30333eefd;p=thirdparty%2Flinux.git net: stmmac: socfpga: Enable internal GMII when using 1000BaseX Dwmac Socfpga may be used with an instance of a Lynx / Altera TSE PCS, in which case it gains support for 1000BaseX. It appears that the PCS is wired to the MAC through an internal GMII bus. Make sure that we enable the GMII_MII mode for the internal MAC when using 1000BaseX. Reviewed-by: Russell King (Oracle) Signed-off-by: Maxime Chevallier Link: https://patch.msgid.link/20250424071223.221239-2-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c index 59f90b123c5b8..027356033e5e0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c @@ -256,6 +256,7 @@ static int socfpga_set_phy_mode_common(int phymode, u32 *val) case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_GMII: case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_1000BASEX: *val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; break; case PHY_INTERFACE_MODE_RMII: