From: Greg Kroah-Hartman Date: Mon, 14 Jul 2025 13:52:55 +0000 (+0200) Subject: 5.15-stable patches X-Git-Tag: v5.15.188~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7036a5e2fe471f613ae4741fc943de9aee3d4ddf;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: series x86-cpu-amd-properly-check-the-tsa-microcode.patch --- diff --git a/queue-5.15/series b/queue-5.15/series new file mode 100644 index 0000000000..4be1194508 --- /dev/null +++ b/queue-5.15/series @@ -0,0 +1 @@ +x86-cpu-amd-properly-check-the-tsa-microcode.patch diff --git a/queue-5.15/x86-cpu-amd-properly-check-the-tsa-microcode.patch b/queue-5.15/x86-cpu-amd-properly-check-the-tsa-microcode.patch new file mode 100644 index 0000000000..1591a54205 --- /dev/null +++ b/queue-5.15/x86-cpu-amd-properly-check-the-tsa-microcode.patch @@ -0,0 +1,66 @@ +From bp@alien8.de Sat Jul 12 14:03:30 2025 +From: Borislav Petkov +Date: Fri, 11 Jul 2025 21:45:58 +0200 +Subject: x86/CPU/AMD: Properly check the TSA microcode +To: stable@vger.kernel.org +Cc: Thomas Voegtle , kim.phillips@amd.com +Message-ID: <20250711194558.GLaHFp9kw1s5dSmBUa@fat_crate.local> +Content-Disposition: inline + +From: "Borislav Petkov (AMD)" + +In order to simplify backports, I resorted to an older version of the +microcode revision checking which didn't pull in the whole struct +x86_cpu_id matching machinery. + +My simpler method, however, forgot to add the extended CPU model to the +patch revision, which lead to mismatches when determining whether TSA +mitigation support is present. + +So add that forgotten extended model. + +Also, fix a backport mismerge which put tsa_init() where it doesn't +belong. + +This is a stable-only fix and the preference is to do it this way +because it is a lot simpler. Also, the Fixes: tag below points to the +respective stable patch. + +Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation") +Reported-by: Thomas Voegtle +Signed-off-by: Borislav Petkov (AMD) +Tested-by: Thomas Voegtle +Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de> +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/cpu/amd.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -590,6 +590,7 @@ static bool amd_check_tsa_microcode(void + + p.ext_fam = c->x86 - 0xf; + p.model = c->x86_model; ++ p.ext_model = c->x86_model >> 4; + p.stepping = c->x86_stepping; + + if (c->x86 == 0x19) { +@@ -704,6 +705,8 @@ static void bsp_init_amd(struct cpuinfo_ + } + + resctrl_cpu_detect(c); ++ ++ tsa_init(c); + } + + static void early_detect_mem_encrypt(struct cpuinfo_x86 *c) +@@ -743,8 +746,6 @@ static void early_detect_mem_encrypt(str + goto clear_sev; + + +- tsa_init(c); +- + return; + + clear_all: