From: Greg Kroah-Hartman Date: Mon, 5 Jul 2021 07:17:51 +0000 (+0200) Subject: 5.4-stable patches X-Git-Tag: v5.13.1~7 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=70ff58c037104c1d57b7b4a9f221fc0256541cc6;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch --- diff --git a/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch b/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch index cac4dc797a2..54646ea7a2e 100644 --- a/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch +++ b/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch @@ -17,11 +17,9 @@ Signed-off-by: Johannes Berg Signed-off-by: Bartosz Golaszewski Signed-off-by: Sasha Levin --- - drivers/gpio/Kconfig | 2 ++ + drivers/gpio/Kconfig | 2 ++ 1 file changed, 2 insertions(+) -diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig -index f9263426af03..ae414045a750 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1232,6 +1232,7 @@ config GPIO_TPS68470 @@ -40,6 +38,3 @@ index f9263426af03..ae414045a750 100644 help The AMD 8111 south bridge contains 32 GPIO pins which can be used. --- -2.30.2 - diff --git a/queue-5.4/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch b/queue-5.4/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch new file mode 100644 index 00000000000..99ec274e5fa --- /dev/null +++ b/queue-5.4/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch @@ -0,0 +1,53 @@ +From foo@baz Mon Jul 5 09:13:30 AM CEST 2021 +From: Mark Bloch +Date: Mon, 7 Jun 2021 11:03:12 +0300 +Subject: RDMA/mlx5: Block FDB rules when not in switchdev mode + +From: Mark Bloch + +commit edc0b0bccc9c80d9a44d3002dcca94984b25e7cf upstream. + +Allow creating FDB steering rules only when in switchdev mode. + +The only software model where a userspace application can manipulate +FDB entries is when it manages the eswitch. This is only possible in +switchdev mode where we expose a single RDMA device with representors +for all the vports that are connected to the eswitch. + +Fixes: 52438be44112 ("RDMA/mlx5: Allow inserting a steering rule to the FDB") +Link: https://lore.kernel.org/r/e928ae7c58d07f104716a2a8d730963d1bd01204.1623052923.git.leonro@nvidia.com +Reviewed-by: Maor Gottlieb +Signed-off-by: Mark Bloch +Signed-off-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +[sudip: manually backport to old file] +Signed-off-by: Sudip Mukherjee +Signed-off-by: Greg Kroah-Hartman +--- + drivers/infiniband/hw/mlx5/flow.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/infiniband/hw/mlx5/flow.c ++++ b/drivers/infiniband/hw/mlx5/flow.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include "mlx5_ib.h" + + #define UVERBS_MODULE_NAME mlx5_ib +@@ -316,6 +317,13 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD + if (err) + goto end; + ++ if (obj->ns_type == MLX5_FLOW_NAMESPACE_FDB && ++ mlx5_eswitch_mode(dev->mdev->priv.eswitch) != ++ MLX5_ESWITCH_OFFLOADS) { ++ err = -EINVAL; ++ goto end; ++ } ++ + uobj->object = obj; + obj->mdev = dev->mdev; + atomic_set(&obj->usecnt, 0);