From: eager Date: Thu, 9 Mar 2017 18:09:39 +0000 (+0000) Subject: Correct failures with --enable-checking=yes,rtl. X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7263e05a508eddc151401b04479eb82a6c729503;p=thirdparty%2Fgcc.git Correct failures with --enable-checking=yes,rtl. * config/microblaze/microblaze.c (microblaze_expand_shift): Replace GET_CODE test with CONST_INT_P and INTVAL test with test for const0_rtx. * config/microblaze/microblaze.md (ashlsi3_byone, ashrsi3_byone, lshrsi3_byone): Replace INTVAL with test for const1_rtx. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@246012 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2c1b515b9107..96fb28b0901d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2017-03-09 Michael Eager + + Correct failures with --enable-checking=yes,rtl. + + * config/microblaze/microblaze.c (microblaze_expand_shift): + Replace GET_CODE test with CONST_INT_P and INTVAL test with + test for const0_rtx. + * config/microblaze/microblaze.md (ashlsi3_byone, ashrsi3_byone, + lshrsi3_byone): Replace INTVAL with test for const1_rtx. + 2017-03-09 Richard Biener PR tree-optimization/79977 diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c index 746bef1faea4..fb115e69e766 100644 --- a/gcc/config/microblaze/microblaze.c +++ b/gcc/config/microblaze/microblaze.c @@ -3323,10 +3323,10 @@ microblaze_expand_shift (rtx operands[]) || (GET_CODE (operands[1]) == SUBREG)); /* Shift by zero -- copy regs if necessary. */ - if ((GET_CODE (operands[2]) == CONST_INT) && (INTVAL (operands[2]) == 0)) + if (CONST_INT_P (operands[2]) && (operands[2] == const0_rtx) + && !rtx_equal_p (operands[0], operands[1])) { - if (REGNO (operands[0]) != REGNO (operands[1])) - emit_insn (gen_movsi (operands[0], operands[1])); + emit_insn (gen_movsi (operands[0], operands[1])); return 1; } diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md index 66ebc1e59498..b3a0011fd7e8 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1321,7 +1321,7 @@ [(set (match_operand:SI 0 "register_operand" "=d") (ashift:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "arith_operand" "I")))] - "(INTVAL (operands[2]) == 1)" + "(operands[2] == const1_rtx)" "addk\t%0,%1,%1" [(set_attr "type" "arith") (set_attr "mode" "SI") @@ -1482,7 +1482,7 @@ [(set (match_operand:SI 0 "register_operand" "=d") (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "arith_operand" "I")))] - "(INTVAL (operands[2]) == 1)" + "(operands[2] == const1_rtx)" "sra\t%0,%1" [(set_attr "type" "arith") (set_attr "mode" "SI") @@ -1571,7 +1571,7 @@ [(set (match_operand:SI 0 "register_operand" "=d") (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "arith_operand" "I")))] - "(INTVAL (operands[2]) == 1)" + "(operands[2] == const1_rtx)" "srl\t%0,%1" [(set_attr "type" "arith") (set_attr "mode" "SI")