From: Geert Uytterhoeven Date: Mon, 21 Feb 2022 15:35:56 +0000 (+0100) Subject: clk: renesas: r8a779f0: Add PFC clock X-Git-Tag: v5.18-rc1~61^2~4^5~4^2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=73421f2a48e6bd1d1024a09aedbc9c662cb88e77;p=thirdparty%2Flinux.git clk: renesas: r8a779f0: Add PFC clock Add the module clock used by the Pin Function (PFC/GPIO) controller on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/4ef3d3dfe714ad75112e4886efea0b66e40a33bc.1645457502.git.geert+renesas@glider.be --- diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index 123c1b01550d9..76b4419650377 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -128,6 +128,7 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("sys-dmac0", 709, R8A779F0_CLK_S0D3_PER), DEF_MOD("sys-dmac1", 710, R8A779F0_CLK_S0D3_PER), DEF_MOD("wdt", 907, R8A779F0_CLK_R), + DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M), }; static const unsigned int r8a779f0_crit_mod_clks[] __initconst = {