From: Richard Henderson Date: Thu, 1 Nov 2018 19:57:44 +0000 (+0000) Subject: softfloat: Don't execute divdeu without power7 X-Git-Tag: v3.1.0-rc0~9^2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7370981bd1ef58b3c20ba8b83cc342d1c61bc773;p=thirdparty%2Fqemu.git softfloat: Don't execute divdeu without power7 The divdeu instruction was added to ISA 2.06 (Power7). Exclude this block from older cpus. Fixes: 27ae5109a2ba (softfloat: Specialize udiv_qrnnd for ppc64) Reported-by: Laurent Vivier Signed-off-by: Richard Henderson --- diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index c86687fa5e7..b1d772e6d46 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -647,8 +647,8 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1, asm("dlgr %0, %1" : "+r"(n) : "r"(d)); *r = n >> 64; return n; -#elif defined(_ARCH_PPC64) - /* From Power ISA 3.0B, programming note for divdeu. */ +#elif defined(_ARCH_PPC64) && defined(_ARCH_PWR7) + /* From Power ISA 2.06, programming note for divdeu. */ uint64_t q1, q2, Q, r1, r2, R; asm("divdeu %0,%2,%4; divdu %1,%3,%4" : "=&r"(q1), "=r"(q2)