From: Greg Kroah-Hartman Date: Fri, 22 Jan 2021 13:52:29 +0000 (+0100) Subject: 4.14-stable patches X-Git-Tag: v4.4.253~5 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=74ba8ceb472a5988861c7dc7f84acebccba97f83;p=thirdparty%2Fkernel%2Fstable-queue.git 4.14-stable patches added patches: spi-cadence-cache-reference-clock-rate-during-probe.patch --- diff --git a/queue-4.14/series b/queue-4.14/series index 397f0438115..246f77cf07f 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -47,3 +47,4 @@ net-use-skb_list_del_init-to-remove-from-rx-sublists.patch net-introduce-skb_list_walk_safe-for-skb-segment-walking.patch net-skbuff-disambiguate-argument-and-member-for-skb_list_walk_safe-helper.patch net-ipv6-validate-gso-skb-before-finish-ipv6-processing.patch +spi-cadence-cache-reference-clock-rate-during-probe.patch diff --git a/queue-4.14/spi-cadence-cache-reference-clock-rate-during-probe.patch b/queue-4.14/spi-cadence-cache-reference-clock-rate-during-probe.patch new file mode 100644 index 00000000000..2ed1e8ace05 --- /dev/null +++ b/queue-4.14/spi-cadence-cache-reference-clock-rate-during-probe.patch @@ -0,0 +1,53 @@ +From 4d163ad79b155c71bf30366dc38f8d2502f78844 Mon Sep 17 00:00:00 2001 +From: Michael Hennerich +Date: Thu, 14 Jan 2021 17:42:17 +0200 +Subject: spi: cadence: cache reference clock rate during probe + +From: Michael Hennerich + +commit 4d163ad79b155c71bf30366dc38f8d2502f78844 upstream. + +The issue is that using SPI from a callback under the CCF lock will +deadlock, since this code uses clk_get_rate(). + +Fixes: c474b38665463 ("spi: Add driver for Cadence SPI controller") +Signed-off-by: Michael Hennerich +Signed-off-by: Alexandru Ardelean +Link: https://lore.kernel.org/r/20210114154217.51996-1-alexandru.ardelean@analog.com +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-cadence.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/spi/spi-cadence.c ++++ b/drivers/spi/spi-cadence.c +@@ -119,6 +119,7 @@ struct cdns_spi { + void __iomem *regs; + struct clk *ref_clk; + struct clk *pclk; ++ unsigned int clk_rate; + u32 speed_hz; + const u8 *txbuf; + u8 *rxbuf; +@@ -258,7 +259,7 @@ static void cdns_spi_config_clock_freq(s + u32 ctrl_reg, baud_rate_val; + unsigned long frequency; + +- frequency = clk_get_rate(xspi->ref_clk); ++ frequency = xspi->clk_rate; + + ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR); + +@@ -628,8 +629,9 @@ static int cdns_spi_probe(struct platfor + master->auto_runtime_pm = true; + master->mode_bits = SPI_CPOL | SPI_CPHA; + ++ xspi->clk_rate = clk_get_rate(xspi->ref_clk); + /* Set to default valid value */ +- master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4; ++ master->max_speed_hz = xspi->clk_rate / 4; + xspi->speed_hz = master->max_speed_hz; + + master->bits_per_word_mask = SPI_BPW_MASK(8);