From: Peter Maydell Date: Thu, 18 Aug 2022 13:54:21 +0000 (+0100) Subject: pci: Sanity check mask argument to pci_set_*_by_mask() X-Git-Tag: v7.2.0-rc0~55^2~18 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=775cc426a986742fb252dd3aa865763c10cdb438;p=thirdparty%2Fqemu.git pci: Sanity check mask argument to pci_set_*_by_mask() Coverity complains that in functions like pci_set_word_by_mask() we might end up shifting by more than 31 bits. This is true, but only if the caller passes in a zero mask. Help Coverity out by asserting that the mask argument is valid. Fixes: CID 1487168 Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-Id: <20220818135421.2515257-3-peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Paolo Bonzini --- diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c79144bc5ef..97937cc9221 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -688,7 +688,10 @@ static inline void pci_set_byte_by_mask(uint8_t *config, uint8_t mask, uint8_t reg) { uint8_t val = pci_get_byte(config); - uint8_t rval = reg << ctz32(mask); + uint8_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_byte(config, (~mask & val) | (mask & rval)); } @@ -696,7 +699,10 @@ static inline void pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) { uint16_t val = pci_get_word(config); - uint16_t rval = reg << ctz32(mask); + uint16_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_word(config, (~mask & val) | (mask & rval)); } @@ -704,7 +710,10 @@ static inline void pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) { uint32_t val = pci_get_long(config); - uint32_t rval = reg << ctz32(mask); + uint32_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_long(config, (~mask & val) | (mask & rval)); } @@ -712,7 +721,10 @@ static inline void pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) { uint64_t val = pci_get_quad(config); - uint64_t rval = reg << ctz32(mask); + uint64_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_quad(config, (~mask & val) | (mask & rval)); }