From: Palmer Dabbelt <palmer@rivosinc.com>
Date: Wed, 24 Apr 2024 19:57:51 +0000 (-0700)
Subject: Merge patch series "riscv: enable lockless lockref implementation"
X-Git-Tag: v6.10-rc1~52^2~3
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7845f52256e7b8bc97d17b629ea03c87775f2b48;p=thirdparty%2Fkernel%2Flinux.git

Merge patch series "riscv: enable lockless lockref implementation"

Jisheng Zhang <jszhang@kernel.org> says:

This series selects ARCH_USE_CMPXCHG_LOCKREF to enable the
cmpxchg-based lockless lockref implementation for riscv. Then,
implement arch_cmpxchg64_{relaxed|acquire|release}.

After patch1:
Using Linus' test case[1] on TH1520 platform, I see a 11.2% improvement.
On JH7110 platform, I see 12.0% improvement.

After patch2:
on both TH1520 and JH7110 platforms, I didn't see obvious
performance improvement with Linus' test case [1]. IMHO, this may
be related with the fence and lr.d/sc.d hw implementations. In theory,
lr/sc without fence could give performance improvement over lr/sc plus
fence, so add the code here to leave performance improvement room on
newer HW platforms.

* b4-shazam-merge:
  riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release}
  riscv: select ARCH_USE_CMPXCHG_LOCKREF

Link: http://marc.info/?l=linux-fsdevel&m=137782380714721&w=4 [1]
Link: https://lore.kernel.org/r/20240325111038.1700-1-jszhang@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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7845f52256e7b8bc97d17b629ea03c87775f2b48