From: Sandra Loosemore <sandra@codesourcery.com>
Date: Fri, 19 Jan 2007 13:34:59 +0000 (-0500)
Subject: 200x-xx-xx Sandra Loosemore <sandra@codesourcery.com>
X-Git-Tag: releases/gcc-4.3.0~7381
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7a6525d680adecf48a0302cb13cc9dcc93fe78d3;p=thirdparty%2Fgcc.git

200x-xx-xx Sandra Loosemore <sandra@codesourcery.com>

gcc/
200x-xx-xx  Sandra Loosemore  <sandra@codesourcery.com>

	* longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add
	ColdFire alternatives.
	* config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro.
	* config/m68k/m68k.md (clzsi2):  Define for ColdFire
	architectures that support ff1 instruction.

From-SVN: r120959
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 014c268ee8d3..ee405910c195 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2007-01-19  Sandra Loosemore  <sandra@codesourcery.com>
+
+	* longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add
+	ColdFire alternatives.
+	* config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro.
+	* config/m68k/m68k.md (clzsi2):  Define for ColdFire
+	architectures that support ff1 instruction.
+
 2007-01-19  Richard Sandiford  <richard@codesourcery.com>
 	    Julian Brown  <julian@codesourcery.com>
 
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index d373be7c4688..e85c1d9b5fab 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -1006,6 +1006,9 @@ __transfer_from_trampoline ()					\
 
 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 
+/* The ColdFire FF1 instruction returns 32 for zero. */
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
+
 #define STORE_FLAG_VALUE (-1)
 
 #define Pmode SImode
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index c953ec2d4349..b3e72e78a407 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -3961,6 +3961,15 @@
   return "f<FP:prec>abs%.<FP:prec> %1,%0";
 })
 
+;; bit indexing instructions
+
+;; ColdFire ff1 instruction implements clz.
+(define_insn "clzsi2"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+ 	(clz:SI (match_operand:SI 1 "register_operand" "0")))]
+  "TARGET_ISAAPLUS || TARGET_ISAC"
+  "ff1 %0")
+
 ;; one complement instructions
 
 ;; "one_cmpldi2" is mainly here to help combine().
diff --git a/gcc/longlong.h b/gcc/longlong.h
index 1325b31f0c90..8b512d2f2844 100644
--- a/gcc/longlong.h
+++ b/gcc/longlong.h
@@ -521,6 +521,11 @@ UDItype __umulsidi3 (USItype, USItype);
   __asm__ ("bfffo %1{%b2:%b2},%0"					\
 	   : "=d" ((USItype) (count))					\
 	   : "od" ((USItype) (x)), "n" (0))
+/* Some ColdFire architectures have a ff1 instruction supported via
+   __builtin_clz. */
+#elif defined (__mcfisaaplus__) || defined (__mcfisac__)
+#define count_leading_zeros(count,x) ((count) = __builtin_clz (x))
+#define COUNT_LEADING_ZEROS_0 32
 #endif
 #endif /* mc68000 */