From: Sasha Levin Date: Sun, 24 Mar 2024 17:48:30 +0000 (-0400) Subject: Drop arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch X-Git-Tag: v6.8.2~59 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7b7ee8be13053688565d37d68754a3a1cb888230;p=thirdparty%2Fkernel%2Fstable-queue.git Drop arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch Signed-off-by: Sasha Levin --- diff --git a/queue-5.15/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch b/queue-5.15/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch deleted file mode 100644 index fd053bfa8b5..00000000000 --- a/queue-5.15/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,51 +0,0 @@ -From d17f3c37c3ab47c46e23e7d904396f486eb2c3dd Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:35 +0530 -Subject: arm64: dts: qcom: sm8250: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 55ee02b10bdd9577b6eabe98ebb383ec4e0674a7 ] - -QMP PHY used in SM8250 requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -While at it, let's move 'clocks' property before 'clock-names' to match -the style used commonly. - -Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") -Reviewed-by: Konrad Dybcio -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-12-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 71705b760c8b1..0ec55883a643d 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -1748,10 +1748,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sm8250-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clock-names = "ref", -- "ref_aux"; - clocks = <&rpmhcc RPMH_CXO_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1X_CLKREF_EN>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - resets = <&ufs_mem_hc 0>; - reset-names = "ufsphy"; --- -2.43.0 - diff --git a/queue-5.15/series b/queue-5.15/series index 8e6d25c9d1c..b5e86c8a5ff 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -88,7 +88,6 @@ arm64-dts-qcom-msm8998-drop-usb-phy-clock-index.patch arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch -arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch printk-add-panic_in_progress-helper.patch printk-disable-passing-console-lock-owner-completely.patch pwm-sti-implement-.apply-callback.patch diff --git a/queue-6.1/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch b/queue-6.1/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch deleted file mode 100644 index 240eb255013..00000000000 --- a/queue-6.1/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 8af5a30adf728eb5158b357e245e4e2957196e23 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:35 +0530 -Subject: arm64: dts: qcom: sm8250: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 55ee02b10bdd9577b6eabe98ebb383ec4e0674a7 ] - -QMP PHY used in SM8250 requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -While at it, let's move 'clocks' property before 'clock-names' to match -the style used commonly. - -Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") -Reviewed-by: Konrad Dybcio -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-12-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 194fb00051d66..30f00989bfcdc 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -2171,10 +2171,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sm8250-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clock-names = "ref", -- "ref_aux"; - clocks = <&rpmhcc RPMH_CXO_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1X_CLKREF_EN>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - resets = <&ufs_mem_hc 0>; - reset-names = "ufsphy"; --- -2.43.0 - diff --git a/queue-6.1/series b/queue-6.1/series index a19d5687ed1..3f7a7a2c0bc 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -128,7 +128,6 @@ wifi-wfx-fix-memory-leak-when-starting-ap.patch arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch -arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch arm64-dts-qcom-sc8280xp-update-ufs-phy-nodes.patch printk-disable-passing-console-lock-owner-completely.patch pwm-sti-fix-capture-for-st-pwm-num-chan-st-capture-n.patch diff --git a/queue-6.6/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch b/queue-6.6/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch deleted file mode 100644 index 2addacda623..00000000000 --- a/queue-6.6/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,51 +0,0 @@ -From f8d05fabed9178c573eb5be83ec30baf60e61710 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:35 +0530 -Subject: arm64: dts: qcom: sm8250: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 55ee02b10bdd9577b6eabe98ebb383ec4e0674a7 ] - -QMP PHY used in SM8250 requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -While at it, let's move 'clocks' property before 'clock-names' to match -the style used commonly. - -Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") -Reviewed-by: Konrad Dybcio -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-12-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index a67a12b466f34..db567426e70b4 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -2219,10 +2219,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sm8250-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clock-names = "ref", -- "ref_aux"; - clocks = <&rpmhcc RPMH_CXO_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1X_CLKREF_EN>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - resets = <&ufs_mem_hc 0>; - reset-names = "ufsphy"; --- -2.43.0 - diff --git a/queue-6.6/series b/queue-6.6/series index 5962858758a..0fd8641a628 100644 --- a/queue-6.6/series +++ b/queue-6.6/series @@ -188,7 +188,6 @@ arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch -arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch diff --git a/queue-6.7/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch b/queue-6.7/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch deleted file mode 100644 index 2a93a52a19a..00000000000 --- a/queue-6.7/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,51 +0,0 @@ -From ebf5cb746b99e61f1745cb7f808ee4590faebb3f Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:35 +0530 -Subject: arm64: dts: qcom: sm8250: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 55ee02b10bdd9577b6eabe98ebb383ec4e0674a7 ] - -QMP PHY used in SM8250 requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -While at it, let's move 'clocks' property before 'clock-names' to match -the style used commonly. - -Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") -Reviewed-by: Konrad Dybcio -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-12-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index ed111145afd2d..8e10f2a920186 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -2484,10 +2484,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sm8250-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clock-names = "ref", -- "ref_aux"; - clocks = <&rpmhcc RPMH_CXO_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1X_CLKREF_EN>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - resets = <&ufs_mem_hc 0>; - reset-names = "ufsphy"; --- -2.43.0 - diff --git a/queue-6.7/series b/queue-6.7/series index ae04d1464a3..458169c6ad7 100644 --- a/queue-6.7/series +++ b/queue-6.7/series @@ -213,7 +213,6 @@ arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch -arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch diff --git a/queue-6.8/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch b/queue-6.8/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch deleted file mode 100644 index 7b3ab710929..00000000000 --- a/queue-6.8/arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 5a15a5c0b16dfecd9d6026379146826e57cfd100 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:35 +0530 -Subject: arm64: dts: qcom: sm8250: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 55ee02b10bdd9577b6eabe98ebb383ec4e0674a7 ] - -QMP PHY used in SM8250 requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -While at it, let's move 'clocks' property before 'clock-names' to match -the style used commonly. - -Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") -Reviewed-by: Konrad Dybcio -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-12-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 760501c1301a6..5e4265b2d80bd 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -2506,10 +2506,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sm8250-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clock-names = "ref", -- "ref_aux"; - clocks = <&rpmhcc RPMH_CXO_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1X_CLKREF_EN>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - resets = <&ufs_mem_hc 0>; - reset-names = "ufsphy"; --- -2.43.0 - diff --git a/queue-6.8/series b/queue-6.8/series index e78aa7fb02e..9441f7791b0 100644 --- a/queue-6.8/series +++ b/queue-6.8/series @@ -154,7 +154,6 @@ wifi-wfx-fix-memory-leak-when-starting-ap.patch arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch -arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8650-fix-ufs-phy-clocks.patch