From: Guinevere Larsen <guinevere@redhat.com>
Date: Thu, 28 Aug 2025 13:40:34 +0000 (-0300)
Subject: gdb/riscv/record: remove possibility of recording an empty instruction
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=7fb4db4c6316347a83b152d94c9aa74641b970dc;p=thirdparty%2Fbinutils-gdb.git

gdb/riscv/record: remove possibility of recording an empty instruction

When recording instructions in a riscv CPU, the function
riscv_process_record works in 2 steps: first, it disassembles the
current instruction and creates std::vectors with all the data that will
be changed (in the "record" method), and then those get added to the
history in a helper function. If the disassembly fails, the
process_record function will add a new "end instruction" marker to the
recorded history.

And that is where the issue happens. Because the previous instruction
must already have added an "end" marker and no new information has been
added, since it was only disassembly, the end result is having an empty
instruction in the history, which will be fully redundant. This commit
just removes the end marker addition.

Approved-By: Guinevere Larsen <guinevere@redhat.com>
---

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 6fd7c616664..697071bf69e 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -5579,10 +5579,7 @@ riscv_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 
   riscv_recorded_insn insn;
   if (!insn.record (gdbarch, regcache, addr))
-    {
-      record_full_arch_list_add_end ();
-      return -1;
-    }
+    return -1;
 
   int ret_val = riscv_record_insn_details (gdbarch, regcache, insn);