From: Jamin Lin Date: Thu, 15 May 2025 08:09:59 +0000 (+0800) Subject: test/qtest/hace: Support to validate 64-bit hmac key buffer addresses X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=823288fc136f8d4b165d2eb573306893e43bcdff;p=thirdparty%2Fqemu.git test/qtest/hace: Support to validate 64-bit hmac key buffer addresses Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and "HACE_HASH_KEY_BUFF_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater Acked-by: Fabiano Rosas Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-28-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c index cb78f18117..0f7f911e5e 100644 --- a/tests/qtest/aspeed-hace-utils.c +++ b/tests/qtest/aspeed-hace-utils.c @@ -591,6 +591,8 @@ void aspeed_test_addresses(const char *machine, const uint32_t base, g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC_HI), ==, 0); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, 0); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST_HI), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_KEY_BUFF), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_KEY_BUFF_HI), ==, 0); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, 0); /* Check that the address masking is correct */ @@ -609,6 +611,14 @@ void aspeed_test_addresses(const char *machine, const uint32_t base, g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST_HI), ==, expected->dest_hi); + qtest_writel(s, base + HACE_HASH_KEY_BUFF, 0xffffffff); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_KEY_BUFF), ==, + expected->key); + + qtest_writel(s, base + HACE_HASH_KEY_BUFF_HI, 0xffffffff); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_KEY_BUFF_HI), ==, + expected->key_hi); + qtest_writel(s, base + HACE_HASH_DATA_LEN, 0xffffffff); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, expected->len); @@ -618,6 +628,8 @@ void aspeed_test_addresses(const char *machine, const uint32_t base, qtest_writel(s, base + HACE_HASH_SRC_HI, 0); qtest_writel(s, base + HACE_HASH_DIGEST, 0); qtest_writel(s, base + HACE_HASH_DIGEST_HI, 0); + qtest_writel(s, base + HACE_HASH_KEY_BUFF, 0); + qtest_writel(s, base + HACE_HASH_KEY_BUFF_HI, 0); qtest_writel(s, base + HACE_HASH_DATA_LEN, 0); /* Check that all bits are now zero */ @@ -625,6 +637,8 @@ void aspeed_test_addresses(const char *machine, const uint32_t base, g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC_HI), ==, 0); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, 0); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST_HI), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_KEY_BUFF), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_KEY_BUFF_HI), ==, 0); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, 0); qtest_quit(s); diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-utils.h index de8055a1db..c8b2ec45af 100644 --- a/tests/qtest/aspeed-hace-utils.h +++ b/tests/qtest/aspeed-hace-utils.h @@ -50,9 +50,11 @@ struct AspeedSgList { struct AspeedMasks { uint32_t src; uint32_t dest; + uint32_t key; uint32_t len; uint32_t src_hi; uint32_t dest_hi; + uint32_t key_hi; }; void aspeed_test_md5(const char *machine, const uint32_t base, diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.c index 31890d574e..38777020ca 100644 --- a/tests/qtest/aspeed_hace-test.c +++ b/tests/qtest/aspeed_hace-test.c @@ -13,24 +13,28 @@ static const struct AspeedMasks ast1030_masks = { .src = 0x7fffffff, .dest = 0x7ffffff8, + .key = 0x7ffffff8, .len = 0x0fffffff, }; static const struct AspeedMasks ast2600_masks = { .src = 0x7fffffff, .dest = 0x7ffffff8, + .key = 0x7ffffff8, .len = 0x0fffffff, }; static const struct AspeedMasks ast2500_masks = { .src = 0x3fffffff, .dest = 0x3ffffff8, + .key = 0x3fffffc0, .len = 0x0fffffff, }; static const struct AspeedMasks ast2400_masks = { .src = 0x0fffffff, .dest = 0x0ffffff8, + .key = 0x0fffffc0, .len = 0x0fffffff, };