From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Date: Mon, 7 Oct 2019 19:39:25 +0000 (-0400)
Subject: drm/amd/display: disable timing sync b/w odm halves
X-Git-Tag: v6.0-rc1~138^2~7^2~110
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=82a562ab5f0a918ef905c29c759b4f0c788754d3;p=thirdparty%2Flinux.git

drm/amd/display: disable timing sync b/w odm halves

Fix for a bug where we would try to timing sync 2 odm halves.

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 40848eda44d92..795766cb27dd2 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1333,7 +1333,9 @@ static void program_timing_sync(
 	struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL };
 
 	for (i = 0; i < pipe_count; i++) {
-		if (!ctx->res_ctx.pipe_ctx[i].stream || ctx->res_ctx.pipe_ctx[i].top_pipe)
+		if (!ctx->res_ctx.pipe_ctx[i].stream
+				|| ctx->res_ctx.pipe_ctx[i].top_pipe
+				|| ctx->res_ctx.pipe_ctx[i].prev_odm_pipe)
 			continue;
 
 		unsynced_pipes[i] = &ctx->res_ctx.pipe_ctx[i];