From: Julian Brown <julian@codesourcery.com>
Date: Wed, 16 Aug 2006 10:37:32 +0000 (+0000)
Subject: 	gas/
X-Git-Tag: binutils-csl-renesas-4_1-8~5
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8344bd7486ef7fd6b3d1805abba1e1466739223b;p=thirdparty%2Fbinutils-gdb.git

	gas/
	* config/tc-arm.c (md_assemble): Improve diagnostic when attempting
	to use ARM instructions on non-ARM-supporting cores.
	(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
	mode automatically based on cpu variant.
	(md_begin): Call above function.

	gas/testsuite/
	* gas/arm/noarm.s: Add test for disabled ARM insns.
	* gas/arm/noarm.d: Drive test for above.
	* gas/arm/noarm.l: Expected error output.
---

diff --git a/ChangeLog.csl b/ChangeLog.csl
index e25c8d37ce5..502d2f37f55 100644
--- a/ChangeLog.csl
+++ b/ChangeLog.csl
@@ -1,5 +1,20 @@
 2006-08-16  Julian Brown  <julian@codesourcery.com>
 
+	gas/
+	* config/tc-arm.c (md_assemble): Improve diagnostic when attempting
+	to use ARM instructions on non-ARM-supporting cores.
+	(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
+	mode automatically based on cpu variant.
+	(md_begin): Call above function.
+
+	gas/testsuite/
+	* gas/arm/noarm.s: Add test for disabled ARM insns.
+	* gas/arm/noarm.d: Drive test for above.
+	* gas/arm/noarm.l: Expected error output.
+
+2006-08-16  Julian Brown  <julian@codesourcery.com>
+
+	gas/
 	* config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
 	recognized in non-unified syntax mode.
 
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index ff03cc946cb..9c3077ab53c 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -13809,7 +13809,7 @@ md_assemble (char *str)
 	ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
 				arm_ext_v6t2);
     }
-  else
+  else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1))
     {
       /* Check that this instruction is supported for this CPU.  */
       if (!opcode->avariant ||
@@ -13842,6 +13842,12 @@ md_assemble (char *str)
 	ARM_MERGE_FEATURE_SETS (arm_arch_used, arm_arch_used,
 				*opcode->avariant);
     }
+  else
+    {
+      as_bad (_("attempt to use an ARM instruction on a Thumb-only processor "
+		"-- `%s'"), str);
+      return;
+    }
   output_inst (str);
 }
 
@@ -18846,6 +18852,16 @@ set_constant_flonums (void)
       abort ();
 }
 
+/* Auto-select Thumb mode if it's the only available instruction set for the
+   given architecture.  */
+
+static void
+autoselect_thumb_from_cpu_variant (void)
+{
+  if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1))
+    opcode_select (16);
+}
+
 void
 md_begin (void)
 {
@@ -18946,6 +18962,8 @@ md_begin (void)
 
   ARM_MERGE_FEATURE_SETS (cpu_variant, *mcpu_cpu_opt, *mfpu_opt);
 
+  autoselect_thumb_from_cpu_variant ();
+
   arm_arch_used = thumb_arch_used = arm_arch_none;
 
 #if defined OBJ_COFF || defined OBJ_ELF