From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Mon, 9 Feb 2015 08:20:29 +0000 (+0800)
Subject: 3.18-stable patches
X-Git-Tag: v3.10.69~5
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=84ed8b8c5157f8a67ee083db8e5a1a862b691dcc;p=thirdparty%2Fkernel%2Fstable-queue.git

3.18-stable patches

added patches:
	mips-mipsregs.h-add-write_32bit_cp1_register.patch
---

diff --git a/queue-3.18/mips-mipsregs.h-add-write_32bit_cp1_register.patch b/queue-3.18/mips-mipsregs.h-add-write_32bit_cp1_register.patch
new file mode 100644
index 00000000000..fae6c9ff2f4
--- /dev/null
+++ b/queue-3.18/mips-mipsregs.h-add-write_32bit_cp1_register.patch
@@ -0,0 +1,64 @@
+From 5e32033e14ca9c7f7341cb383f5a05699b0b5382 Mon Sep 17 00:00:00 2001
+From: James Hogan <james.hogan@imgtec.com>
+Date: Fri, 30 Jan 2015 15:40:19 +0000
+Subject: MIPS: mipsregs.h: Add write_32bit_cp1_register()
+
+From: James Hogan <james.hogan@imgtec.com>
+
+commit 5e32033e14ca9c7f7341cb383f5a05699b0b5382 upstream.
+
+Add a write_32bit_cp1_register() macro to compliment the
+read_32bit_cp1_register() macro. This is to abstract whether .set
+hardfloat needs to be used based on GAS_HAS_SET_HARDFLOAT.
+
+The implementation of _read_32bit_cp1_register() .sets mips1 due to
+failure of gas v2.19 to assemble cfc1 for Octeon (see commit
+25c300030016 ("MIPS: Override assembler target architecture for
+octeon.")). I haven't copied this over to _write_32bit_cp1_register() as
+I'm uncertain whether it applies to ctc1 too, or whether anybody cares
+about that version of binutils any longer.
+
+Signed-off-by: James Hogan <james.hogan@imgtec.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Paul Burton <paul.burton@imgtec.com>
+Cc: David Daney <david.daney@cavium.com>
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/9172/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+Cc: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/include/asm/mipsregs.h |   15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/mips/include/asm/mipsregs.h
++++ b/arch/mips/include/asm/mipsregs.h
+@@ -1343,12 +1343,27 @@ do {									\
+ 	__res;								\
+ })
+ 
++#define _write_32bit_cp1_register(dest, val, gas_hardfloat)		\
++do {									\
++	__asm__ __volatile__(						\
++	"	.set	push					\n"	\
++	"	.set	reorder					\n"	\
++	"	"STR(gas_hardfloat)"				\n"	\
++	"	ctc1	%0,"STR(dest)"				\n"	\
++	"	.set	pop					\n"	\
++	: : "r" (val));							\
++} while (0)
++
+ #ifdef GAS_HAS_SET_HARDFLOAT
+ #define read_32bit_cp1_register(source)					\
+ 	_read_32bit_cp1_register(source, .set hardfloat)
++#define write_32bit_cp1_register(dest, val)				\
++	_write_32bit_cp1_register(dest, val, .set hardfloat)
+ #else
+ #define read_32bit_cp1_register(source)					\
+ 	_read_32bit_cp1_register(source, )
++#define write_32bit_cp1_register(dest, val)				\
++	_write_32bit_cp1_register(dest, val, )
+ #endif
+ 
+ #ifdef HAVE_AS_DSP
diff --git a/queue-3.18/series b/queue-3.18/series
index b023cf6aa01..bd8497de8d1 100644
--- a/queue-3.18/series
+++ b/queue-3.18/series
@@ -11,6 +11,7 @@ mips-fix-c0_pagegrain-support.patch
 mips-irq-fix-disable_irq-on-cpu-irqs.patch
 mips-octeon-fix-kernel-crash-when-offlining-a-cpu.patch
 mips-fix-kernel-lockup-or-crash-after-cpu-offline-online.patch
+mips-mipsregs.h-add-write_32bit_cp1_register.patch
 mips-traps-fix-inline-asm-ctc1-missing-.set-hardfloat.patch
 arm-8299-1-mm-ensure-local-active-asid-is-marked-as-allocated-on-rollover.patch
 complete-oplock-break-jobs-before-closing-file-handle.patch