From: Greg Kroah-Hartman Date: Tue, 9 Oct 2012 23:56:41 +0000 (+0900) Subject: 3.5-stable patches X-Git-Tag: v3.0.46~28 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=866d324433f6195c80f64dd81371bfad3dbe911e;p=thirdparty%2Fkernel%2Fstable-queue.git 3.5-stable patches added patches: drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch drm-radeon-add-msi-quirk-for-gateway-rs690.patch drm-radeon-force-msis-on-rs690-asics.patch drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch --- diff --git a/queue-3.5/drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch b/queue-3.5/drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch new file mode 100644 index 00000000000..6f0200ddae6 --- /dev/null +++ b/queue-3.5/drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch @@ -0,0 +1,47 @@ +From 3184009c36da413724f283e3c7ac9cc60c623bc4 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Mon, 17 Sep 2012 09:38:03 +0000 +Subject: drm: Destroy the planes prior to destroying the associated CRTC + +From: Chris Wilson + +commit 3184009c36da413724f283e3c7ac9cc60c623bc4 upstream. + +As during the plane cleanup, we wish to disable the hardware and +so may modify state on the associated CRTC, that CRTC must continue to +exist until we are finished. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54101 +Signed-off-by: Chris Wilson +Cc: Jesse Barnes +Reviewed-by: Jesse Barnes +Tested-by: lu hua +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_crtc.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/drm_crtc.c ++++ b/drivers/gpu/drm/drm_crtc.c +@@ -1034,15 +1034,15 @@ void drm_mode_config_cleanup(struct drm_ + fb->funcs->destroy(fb); + } + +- list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) { +- crtc->funcs->destroy(crtc); +- } +- + list_for_each_entry_safe(plane, plt, &dev->mode_config.plane_list, + head) { + plane->funcs->destroy(plane); + } + ++ list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) { ++ crtc->funcs->destroy(crtc); ++ } ++ + idr_remove_all(&dev->mode_config.crtc_idr); + idr_destroy(&dev->mode_config.crtc_idr); + } diff --git a/queue-3.5/drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch b/queue-3.5/drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch new file mode 100644 index 00000000000..16c416d8699 --- /dev/null +++ b/queue-3.5/drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch @@ -0,0 +1,67 @@ +From d6ba6d215a538a58f0f0026f0961b0b9125e8042 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Fri, 28 Sep 2012 11:50:29 +1000 +Subject: drm/nvc0/fence: restore pre-suspend fence buffer context on resume + +From: Ben Skeggs + +commit d6ba6d215a538a58f0f0026f0961b0b9125e8042 upstream. + +Fixes some unfortunate races on resume. The G84 version of the code doesn't +need this as "gpuobj"s are automagically suspended/resumed by the core code +whereas pinned buffer objects are not. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvc0_fence.c | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/drivers/gpu/drm/nouveau/nvc0_fence.c ++++ b/drivers/gpu/drm/nouveau/nvc0_fence.c +@@ -32,6 +32,7 @@ + struct nvc0_fence_priv { + struct nouveau_fence_priv base; + struct nouveau_bo *bo; ++ u32 *suspend; + }; + + struct nvc0_fence_chan { +@@ -125,12 +126,36 @@ nvc0_fence_context_new(struct nouveau_ch + static int + nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend) + { ++ struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); ++ struct nvc0_fence_priv *priv = nv_engine(dev, engine); ++ int i; ++ ++ if (suspend) { ++ priv->suspend = vmalloc(pfifo->channels * sizeof(u32)); ++ if (!priv->suspend) ++ return -ENOMEM; ++ ++ for (i = 0; i < pfifo->channels; i++) ++ priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); ++ } ++ + return 0; + } + + static int + nvc0_fence_init(struct drm_device *dev, int engine) + { ++ struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); ++ struct nvc0_fence_priv *priv = nv_engine(dev, engine); ++ int i; ++ ++ if (priv->suspend) { ++ for (i = 0; i < pfifo->channels; i++) ++ nouveau_bo_wr32(priv->bo, i, priv->suspend[i]); ++ vfree(priv->suspend); ++ priv->suspend = NULL; ++ } ++ + return 0; + } + diff --git a/queue-3.5/drm-radeon-add-msi-quirk-for-gateway-rs690.patch b/queue-3.5/drm-radeon-add-msi-quirk-for-gateway-rs690.patch new file mode 100644 index 00000000000..f2726af0fd0 --- /dev/null +++ b/queue-3.5/drm-radeon-add-msi-quirk-for-gateway-rs690.patch @@ -0,0 +1,34 @@ +From 3a6d59df80897cc87812b6826d70085905bed013 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 26 Sep 2012 12:31:45 -0400 +Subject: drm/radeon: Add MSI quirk for gateway RS690 + +From: Alex Deucher + +commit 3a6d59df80897cc87812b6826d70085905bed013 upstream. + +Fixes another system on: +https://bugs.freedesktop.org/show_bug.cgi?id=37679 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_irq_kms.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c ++++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c +@@ -149,6 +149,12 @@ static bool radeon_msi_ok(struct radeon_ + (rdev->pdev->subsystem_device == 0x01fd)) + return true; + ++ /* Gateway RS690 only seems to work with MSIs. */ ++ if ((rdev->pdev->device == 0x791f) && ++ (rdev->pdev->subsystem_vendor == 0x107b) && ++ (rdev->pdev->subsystem_device == 0x0185)) ++ return true; ++ + /* RV515 seems to have MSI issues where it loses + * MSI rearms occasionally. This leads to lockups and freezes. + * disable it by default. diff --git a/queue-3.5/drm-radeon-force-msis-on-rs690-asics.patch b/queue-3.5/drm-radeon-force-msis-on-rs690-asics.patch new file mode 100644 index 00000000000..f922f5ad46d --- /dev/null +++ b/queue-3.5/drm-radeon-force-msis-on-rs690-asics.patch @@ -0,0 +1,33 @@ +From fb6ca6d154cdcd53e7f27f8dbba513830372699b Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 26 Sep 2012 12:40:45 -0400 +Subject: drm/radeon: force MSIs on RS690 asics + +From: Alex Deucher + +commit fb6ca6d154cdcd53e7f27f8dbba513830372699b upstream. + +There are so many quirks, lets just try and force +this for all RS690s. See: +https://bugs.freedesktop.org/show_bug.cgi?id=37679 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_irq_kms.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c ++++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c +@@ -155,6 +155,10 @@ static bool radeon_msi_ok(struct radeon_ + (rdev->pdev->subsystem_device == 0x0185)) + return true; + ++ /* try and enable MSIs by default on all RS690s */ ++ if (rdev->family == CHIP_RS690) ++ return true; ++ + /* RV515 seems to have MSI issues where it loses + * MSI rearms occasionally. This leads to lockups and freezes. + * disable it by default. diff --git a/queue-3.5/drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch b/queue-3.5/drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch new file mode 100644 index 00000000000..daed6828fe3 --- /dev/null +++ b/queue-3.5/drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch @@ -0,0 +1,43 @@ +From 2e3b3b105ab3bb5b6a37198da4f193cd13781d13 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 14 Sep 2012 10:59:26 -0400 +Subject: drm/radeon: only adjust default clocks on NI GPUs + +From: Alex Deucher + +commit 2e3b3b105ab3bb5b6a37198da4f193cd13781d13 upstream. + +SI asics store voltage information differently so we +don't have a way to deal with it properly yet. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_pm.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_pm.c ++++ b/drivers/gpu/drm/radeon/radeon_pm.c +@@ -555,7 +555,9 @@ void radeon_pm_suspend(struct radeon_dev + void radeon_pm_resume(struct radeon_device *rdev) + { + /* set up the default clocks if the MC ucode is loaded */ +- if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { ++ if ((rdev->family >= CHIP_BARTS) && ++ (rdev->family <= CHIP_CAYMAN) && ++ rdev->mc_fw) { + if (rdev->pm.default_vddc) + radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, + SET_VOLTAGE_TYPE_ASIC_VDDC); +@@ -610,7 +612,9 @@ int radeon_pm_init(struct radeon_device + radeon_pm_print_states(rdev); + radeon_pm_init_profile(rdev); + /* set up the default clocks if the MC ucode is loaded */ +- if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { ++ if ((rdev->family >= CHIP_BARTS) && ++ (rdev->family <= CHIP_CAYMAN) && ++ rdev->mc_fw) { + if (rdev->pm.default_vddc) + radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, + SET_VOLTAGE_TYPE_ASIC_VDDC); diff --git a/queue-3.5/series b/queue-3.5/series index 2e5c78ef4aa..4d88f940ad4 100644 --- a/queue-3.5/series +++ b/queue-3.5/series @@ -89,3 +89,8 @@ alsa-hda-realtek-fix-detection-of-alc271x-codec.patch alsa-hda-limit-internal-mic-boost-for-asus-x202e.patch alsa-usb-disable-broken-hw-volume-for-tenx-tp6911.patch alsa-usb-support-for-original-xbox-communicator.patch +drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch +drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch +drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch +drm-radeon-add-msi-quirk-for-gateway-rs690.patch +drm-radeon-force-msis-on-rs690-asics.patch