From: renlin <renlin@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed, 24 Jun 2015 13:36:53 +0000 (+0000)
Subject: [PATCH][AARCH64]Add ACLE predefined marcos: __ARM_ALIGN_MAX_PWR and
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=87eb018353c4ea3db4992cf3c325e08a70a2d7df;p=thirdparty%2Fgcc.git

[PATCH][AARCH64]Add ACLE predefined marcos: __ARM_ALIGN_MAX_PWR and
__ARM_ALIGN_MAX_STACK_PWR

gcc/

2015-06-24 Renlin Li <renlin.li@arm.com>

	* config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Add
	__ARM_ALIGN_MAX_PWR, __ARM_ALIGN_MAX_STACK_PWR.

gcc/testsuite/

2015-06-24  Renlin Li  <renlin.li@arm.com>

	* gcc.target/aarch64/arm_align_max_pwr.c: New.
	* gcc.target/aarch64/arm_align_max_stack_pwr.c: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@224898 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b4694b14da07..6c4a26788788 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-24 Renlin Li <renlin.li@arm.com>
+
+	* config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Add
+	__ARM_ALIGN_MAX_PWR, __ARM_ALIGN_MAX_STACK_PWR.
+
 2015-06-24  Richard Biener  <rguenther@suse.de>
 
 	* genmatch.c (enum tree_code): Add VIEW_CONVERT[012].
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index a22c6e40b5e8..8b2d2ca6ff7d 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -28,6 +28,10 @@
     {							\
       builtin_define ("__aarch64__");                   \
       builtin_define ("__ARM_64BIT_STATE");             \
+      builtin_define_with_int_value                     \
+        ("__ARM_ALIGN_MAX_PWR", 28);                    \
+      builtin_define_with_int_value                     \
+        ("__ARM_ALIGN_MAX_STACK_PWR", 16);              \
       builtin_define_with_int_value                     \
         ("__ARM_ARCH", aarch64_architecture_version);   \
       cpp_define_formatted                                              \
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7040593fbed4..4de428598170 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-24  Renlin Li  <renlin.li@arm.com>
+
+	* gcc.target/aarch64/arm_align_max_pwr.c: New.
+	* gcc.target/aarch64/arm_align_max_stack_pwr.c: New.
+
 2015-06-24  Patrick Palka  <ppalka@gcc.gnu.org>
 
 	Revert:
diff --git a/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c b/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
new file mode 100644
index 000000000000..bbb4c6f9d046
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+
+#include <stdio.h>
+#include <assert.h>
+
+#define align (1ul << __ARM_ALIGN_MAX_PWR)
+static int x __attribute__ ((aligned (align)));
+
+int
+main ()
+{
+  assert ((((unsigned long)&x) & (align - 1)) == 0);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c b/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
new file mode 100644
index 000000000000..7a6355b054e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+
+#include <stdio.h>
+#include <assert.h>
+
+#define align (1ul << __ARM_ALIGN_MAX_STACK_PWR)
+
+int
+main ()
+{
+  int x __attribute__ ((aligned (align)));
+
+  assert ((((unsigned long)&x) & (align - 1)) == 0);
+  return 0;
+}