From: Jakub Jelinek <jakub@redhat.com>
Date: Thu, 25 Feb 2021 09:22:53 +0000 (+0100)
Subject: match.pd: Use :s for (T)(A) + CST -> (T)(A + CST) [PR95798]
X-Git-Tag: basepoints/gcc-12~873
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=880682e7b2348d66f4089fa4af102b69eaaefbc2;p=thirdparty%2Fgcc.git

match.pd: Use :s for (T)(A) + CST -> (T)(A + CST) [PR95798]

The r10-2806 change regressed following testcases, instead of doing
int -> unsigned long sign-extension once and then add 8, 16, ... 56 to it
for each of the memory access, it adds 8, 16, ... 56 in int mode and then
sign extends each.  So that means:
+       movq    $0, (%rsp,%rax,8)
+       leal    1(%rdx), %eax
+       cltq
+       movq    $1, (%rsp,%rax,8)
+       leal    2(%rdx), %eax
+       cltq
+       movq    $2, (%rsp,%rax,8)
+       leal    3(%rdx), %eax
+       cltq
+       movq    $3, (%rsp,%rax,8)
+       leal    4(%rdx), %eax
+       cltq
+       movq    $4, (%rsp,%rax,8)
+       leal    5(%rdx), %eax
+       cltq
+       movq    $5, (%rsp,%rax,8)
+       leal    6(%rdx), %eax
+       addl    $7, %edx
+       cltq
+       movslq  %edx, %rdx
+       movq    $6, (%rsp,%rax,8)
+       movq    $7, (%rsp,%rdx,8)
-       movq    $0, (%rsp,%rdx,8)
-       movq    $1, 8(%rsp,%rdx,8)
-       movq    $2, 16(%rsp,%rdx,8)
-       movq    $3, 24(%rsp,%rdx,8)
-       movq    $4, 32(%rsp,%rdx,8)
-       movq    $5, 40(%rsp,%rdx,8)
-       movq    $6, 48(%rsp,%rdx,8)
-       movq    $7, 56(%rsp,%rdx,8)
GCC 9 -> 10 change or:
-       movq    $0, (%rsp,%rdx,8)
-       movq    $1, 8(%rsp,%rdx,8)
-       movq    $2, 16(%rsp,%rdx,8)
-       movq    $3, 24(%rsp,%rdx,8)
-       movq    $4, 32(%rsp,%rdx,8)
-       movq    $5, 40(%rsp,%rdx,8)
-       movq    $6, 48(%rsp,%rdx,8)
-       movq    $7, 56(%rsp,%rdx,8)
+       movq    $0, (%rsp,%rax,8)
+       leal    1(%rdx), %eax
+       movq    $1, (%rsp,%rax,8)
+       leal    2(%rdx), %eax
+       movq    $2, (%rsp,%rax,8)
+       leal    3(%rdx), %eax
+       movq    $3, (%rsp,%rax,8)
+       leal    4(%rdx), %eax
+       movq    $4, (%rsp,%rax,8)
+       leal    5(%rdx), %eax
+       movq    $5, (%rsp,%rax,8)
+       leal    6(%rdx), %eax
+       movq    $6, (%rsp,%rax,8)
+       leal    7(%rdx), %eax
+       movq    $7, (%rsp,%rax,8)
change on the other test.  While for the former case of
int there is due to signed integer overflow (unless -fwrapv)
the possibility to undo it e.g. during expansion, for the unsigned
case information is unfortunately lost.

The following patch adds :s to the convert which restores these
testcases but keeps the testcases the patch meant to improve as is.

2021-02-25  Jakub Jelinek  <jakub@redhat.com>

	PR target/95798
	* match.pd ((T)(A) + CST -> (T)(A + CST)): Add :s to convert.

	* gcc.target/i386/pr95798-1.c: New test.
	* gcc.target/i386/pr95798-2.c: New test.
---

diff --git a/gcc/match.pd b/gcc/match.pd
index 760f773cf1b1..a34c283e28c9 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -2492,7 +2492,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 /* ((T)(A)) + CST -> (T)(A + CST)  */
 #if GIMPLE
   (simplify
-   (plus (convert SSA_NAME@0) INTEGER_CST@1)
+   (plus (convert:s SSA_NAME@0) INTEGER_CST@1)
     (if (TREE_CODE (TREE_TYPE (@0)) == INTEGER_TYPE
          && TREE_CODE (type) == INTEGER_TYPE
          && TYPE_PRECISION (type) > TYPE_PRECISION (TREE_TYPE (@0))
diff --git a/gcc/testsuite/gcc.target/i386/pr95798-1.c b/gcc/testsuite/gcc.target/i386/pr95798-1.c
new file mode 100644
index 000000000000..e7d29d1856dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr95798-1.c
@@ -0,0 +1,29 @@
+/* PR target/95798 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -masm=att" } */
+/* { dg-final { scan-assembler "1, 8\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "2, 16\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "3, 24\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "4, 32\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "5, 40\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "6, 48\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "7, 56\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+
+void bar (unsigned long long *, int);
+
+void
+foo (int y, unsigned long long z)
+{
+  unsigned long long x[1024];
+  unsigned long long i = y % 127;
+  __builtin_memset (x, -1, sizeof (x));
+  x[i] = 0;
+  x[i + 1] = 1;
+  x[i + 2] = 2;
+  x[i + 3] = 3;
+  x[i + 4] = 4;
+  x[i + 5] = 5;
+  x[i + 6] = 6;
+  x[i + 7] = 7;
+  bar (x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr95798-2.c b/gcc/testsuite/gcc.target/i386/pr95798-2.c
new file mode 100644
index 000000000000..4e0deb74ea78
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr95798-2.c
@@ -0,0 +1,29 @@
+/* PR target/95798 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -masm=att" } */
+/* { dg-final { scan-assembler "1, 8\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "2, 16\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "3, 24\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "4, 32\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "5, 40\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "6, 48\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "7, 56\\\(%rsp,%r\[a-z0-9]*,8\\\)" { target lp64 } } } */
+
+void bar (unsigned long long *, int);
+
+void
+foo (unsigned int y, unsigned long long z)
+{
+  unsigned long long x[1024];
+  unsigned long long i = y % 127;
+  __builtin_memset (x, -1, sizeof (x));
+  x[i] = 0;
+  x[i + 1] = 1;
+  x[i + 2] = 2;
+  x[i + 3] = 3;
+  x[i + 4] = 4;
+  x[i + 5] = 5;
+  x[i + 6] = 6;
+  x[i + 7] = 7;
+  bar (x, y);
+}