From: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Date: Mon, 30 Nov 2020 15:08:47 +0000 (-0700)
Subject: mmc: zynq_sdhci: Fix UHS 1.8v switching with 5ms delay
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=880b655d660ecfc8272430ff631740b35a3dfa2f;p=thirdparty%2Fu-boot.git

mmc: zynq_sdhci: Fix UHS 1.8v switching with 5ms delay

SD3.0 spec needs 5ms delay after host controller switches to 1.8v.
Remove the clock disable/enable logic from sdhci.c and add 5ms delay.

Return if clock is disabled from set_ios() so that we dont touch
anything else.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
State: pending
---

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 06289343124..f25a9390232 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -528,7 +528,7 @@ static int sdhci_set_ios(struct mmc *mmc)
 		sdhci_set_clock(mmc, mmc->clock);
 
 	if (mmc->clk_disable)
-		sdhci_set_clock(mmc, 0);
+		return sdhci_set_clock(mmc, 0);
 
 	/* Set bus width */
 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
@@ -553,19 +553,11 @@ static int sdhci_set_ios(struct mmc *mmc)
 		no_hispd_bit = true;
 	}
 
-	if (!no_hispd_bit) {
-		if (mmc->selected_mode == MMC_HS ||
-		    mmc->selected_mode == SD_HS ||
-		    mmc->selected_mode == MMC_DDR_52 ||
-		    mmc->selected_mode == MMC_HS_200 ||
-		    mmc->selected_mode == MMC_HS_400 ||
-		    mmc->selected_mode == UHS_SDR25 ||
-		    mmc->selected_mode == UHS_SDR50 ||
-		    mmc->selected_mode == UHS_SDR104 ||
-		    mmc->selected_mode == UHS_DDR50)
-			ctrl |= SDHCI_CTRL_HISPD;
-		else
-			ctrl &= ~SDHCI_CTRL_HISPD;
+	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+
+	if (IS_SD(mmc) && SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
+		if (host->ops && host->ops->set_control_reg)
+			host->ops->set_control_reg(host);
 	}
 
 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 6bcdb477941..442ce5cf168 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -534,6 +534,11 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host)
 		reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
 		reg |= SDHCI_CTRL_VDD_180;
 		sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
+		/*
+		 * 5ms delay is required as per SD3.0 spec while switching
+		 * voltage to 1.8v
+		 */
+		mdelay(5);
 	}
 
 	if (mmc->selected_mode > SD_HS &&