From: bernds Date: Wed, 22 Oct 2008 19:42:56 +0000 (+0000) Subject: gcc/: X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=88ba66b5912c4ffe60f7725334e535268799f4d6;p=thirdparty%2Fgcc.git gcc/: From Mike Frysinger * config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF512, BFIN_CPU_BF514, BFIN_CPU_BF516, and BFIN_CPU_BF518. * config/bfin/bfin.c (bfin_cpus[]): Add 0.0 for bf512, bf514, bf516, and bf518. Add 0.2 for bf522, bf523, bf524, bf526, and bf527. Add 0.6 for bf533, bf532, and bf531. Add 0.5 for bf538 and bf539. Add 0.2 for bf542, bf544, bf547, bf548, and bf549. * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF512__ for BFIN_CPU_BF512, __ADSPBF514__ for BFIN_CPU_BF514, __ADSPBF516__ for BFIN_CPU_BF516, and __ADSPBF518__ for BFIN_CPU_BF518. Define __ADSPBF51x__ for all of them. * config/bfin/elf.h (LIB_SPEC): Select proper linker scripts for -mcpu bf512, bf514, bf516, and bf518. * config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for bf512-none, bf514-none, bf516-none, and bf518-none. * config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise. * config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise. * doc/invoke.texi (Blackfin Options): Document that -mcpu now accepts bf512, bf514, bf516, and bf518. gcc/testsuite/: From Mike Frysinger * gcc.target/bfin/mcpu-bf522.c: Check SILICON_REVISION is 0x0002. Invert check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+. * gcc.target/bfin/mcpu-bf523.c: Likewise. * gcc.target/bfin/mcpu-bf524.c: Likewise. * gcc.target/bfin/mcpu-bf525.c: Likewise. * gcc.target/bfin/mcpu-bf526.c: Likewise. * gcc.target/bfin/mcpu-bf527.c: Likewise. * gcc.target/bfin/mcpu-bf531.c: Check SILICON_REVISION is 0x0006. Invert check for __WORKAROUND_RETS when SILICON_REVISION is 0x0006+. * gcc.target/bfin/mcpu-bf532.c: Likewise. * gcc.target/bfin/mcpu-bf533.c: Likewise. * gcc.target/bfin/mcpu-bf538.c: Check SILICON_REVISION is 0x0005. Invert check for __WORKAROUND_RETS when SILICON_REVISION is 0x0005+. * gcc.target/bfin/mcpu-bf539.c: Likewise. * gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0002. Invert check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+. * gcc.target/bfin/mcpu-bf544.c: Likewise. * gcc.target/bfin/mcpu-bf547.c: Likewise. * gcc.target/bfin/mcpu-bf548.c: Likewise. * gcc.target/bfin/mcpu-bf549.c: Likewise. * gcc.target/bfin/mcpu-bf512.c: New file. * gcc.target/bfin/mcpu-bf514.c: Likewise. * gcc.target/bfin/mcpu-bf516.c: Likewise. * gcc.target/bfin/mcpu-bf518.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@141305 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f206c7006077..7dd092ce33ca 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,25 @@ +2008-10-22 Bernd Schmidt + + From Mike Frysinger + * config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF512, + BFIN_CPU_BF514, BFIN_CPU_BF516, and BFIN_CPU_BF518. + * config/bfin/bfin.c (bfin_cpus[]): Add 0.0 for bf512, bf514, bf516, + and bf518. Add 0.2 for bf522, bf523, bf524, bf526, and bf527. + Add 0.6 for bf533, bf532, and bf531. Add 0.5 for bf538 and bf539. + Add 0.2 for bf542, bf544, bf547, bf548, and bf549. + * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF512__ + for BFIN_CPU_BF512, __ADSPBF514__ for BFIN_CPU_BF514, __ADSPBF516__ + for BFIN_CPU_BF516, and __ADSPBF518__ for BFIN_CPU_BF518. Define + __ADSPBF51x__ for all of them. + * config/bfin/elf.h (LIB_SPEC): Select proper linker scripts for + -mcpu bf512, bf514, bf516, and bf518. + * config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for + bf512-none, bf514-none, bf516-none, and bf518-none. + * config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise. + * config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise. + * doc/invoke.texi (Blackfin Options): Document that + -mcpu now accepts bf512, bf514, bf516, and bf518. + 2008-10-22 Jakub Jelinek PR middle-end/37882 diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h index b068befd0e5d..6d6ffd2991d6 100644 --- a/gcc/config/bfin/bfin-protos.h +++ b/gcc/config/bfin/bfin-protos.h @@ -26,6 +26,10 @@ typedef enum bfin_cpu_type { BFIN_CPU_UNKNOWN, + BFIN_CPU_BF512, + BFIN_CPU_BF514, + BFIN_CPU_BF516, + BFIN_CPU_BF518, BFIN_CPU_BF522, BFIN_CPU_BF523, BFIN_CPU_BF524, diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 9af7fab73fe8..ccdd5bca770b 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -114,36 +114,62 @@ struct bfin_cpu struct bfin_cpu bfin_cpus[] = { + {"bf512", BFIN_CPU_BF512, 0x0000, + WA_SPECULATIVE_LOADS}, + + {"bf514", BFIN_CPU_BF514, 0x0000, + WA_SPECULATIVE_LOADS}, + + {"bf516", BFIN_CPU_BF516, 0x0000, + WA_SPECULATIVE_LOADS}, + + {"bf518", BFIN_CPU_BF518, 0x0000, + WA_SPECULATIVE_LOADS}, + + {"bf522", BFIN_CPU_BF522, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf522", BFIN_CPU_BF522, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf522", BFIN_CPU_BF522, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf523", BFIN_CPU_BF523, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf523", BFIN_CPU_BF523, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf523", BFIN_CPU_BF523, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf524", BFIN_CPU_BF524, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf524", BFIN_CPU_BF524, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf524", BFIN_CPU_BF524, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf525", BFIN_CPU_BF525, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf525", BFIN_CPU_BF525, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf525", BFIN_CPU_BF525, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf526", BFIN_CPU_BF526, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf526", BFIN_CPU_BF526, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf526", BFIN_CPU_BF526, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf527", BFIN_CPU_BF527, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf527", BFIN_CPU_BF527, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf527", BFIN_CPU_BF527, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf531", BFIN_CPU_BF531, 0x0006, + WA_SPECULATIVE_LOADS}, {"bf531", BFIN_CPU_BF531, 0x0005, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf531", BFIN_CPU_BF531, 0x0004, @@ -151,6 +177,8 @@ struct bfin_cpu bfin_cpus[] = {"bf531", BFIN_CPU_BF531, 0x0003, WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS}, + {"bf532", BFIN_CPU_BF532, 0x0006, + WA_SPECULATIVE_LOADS}, {"bf532", BFIN_CPU_BF532, 0x0005, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf532", BFIN_CPU_BF532, 0x0004, @@ -158,6 +186,8 @@ struct bfin_cpu bfin_cpus[] = {"bf532", BFIN_CPU_BF532, 0x0003, WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS}, + {"bf533", BFIN_CPU_BF533, 0x0006, + WA_SPECULATIVE_LOADS}, {"bf533", BFIN_CPU_BF533, 0x0005, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf533", BFIN_CPU_BF533, 0x0004, @@ -186,6 +216,8 @@ struct bfin_cpu bfin_cpus[] = {"bf537", BFIN_CPU_BF537, 0x0001, WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS}, + {"bf538", BFIN_CPU_BF538, 0x0005, + WA_SPECULATIVE_LOADS}, {"bf538", BFIN_CPU_BF538, 0x0004, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf538", BFIN_CPU_BF538, 0x0003, @@ -193,6 +225,8 @@ struct bfin_cpu bfin_cpus[] = {"bf538", BFIN_CPU_BF538, 0x0002, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf539", BFIN_CPU_BF539, 0x0005, + WA_SPECULATIVE_LOADS}, {"bf539", BFIN_CPU_BF539, 0x0004, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf539", BFIN_CPU_BF539, 0x0003, @@ -200,26 +234,36 @@ struct bfin_cpu bfin_cpus[] = {"bf539", BFIN_CPU_BF539, 0x0002, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf542", BFIN_CPU_BF542, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf542", BFIN_CPU_BF542, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf542", BFIN_CPU_BF542, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf544", BFIN_CPU_BF544, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf544", BFIN_CPU_BF544, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf544", BFIN_CPU_BF544, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf547", BFIN_CPU_BF547, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf547", BFIN_CPU_BF547, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf547", BFIN_CPU_BF547, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf548", BFIN_CPU_BF548, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf548", BFIN_CPU_BF548, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf548", BFIN_CPU_BF548, 0x0000, WA_SPECULATIVE_LOADS | WA_RETS}, + {"bf549", BFIN_CPU_BF549, 0x0002, + WA_SPECULATIVE_LOADS}, {"bf549", BFIN_CPU_BF549, 0x0001, WA_SPECULATIVE_LOADS | WA_RETS}, {"bf549", BFIN_CPU_BF549, 0x0000, diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h index 4ac369f10ba9..a5ab7f5a3465 100644 --- a/gcc/config/bfin/bfin.h +++ b/gcc/config/bfin/bfin.h @@ -45,6 +45,22 @@ extern int target_flags; \ switch (bfin_cpu_type) \ { \ + case BFIN_CPU_BF512: \ + builtin_define ("__ADSPBF512__"); \ + builtin_define ("__ADSPBF51x__"); \ + break; \ + case BFIN_CPU_BF514: \ + builtin_define ("__ADSPBF514__"); \ + builtin_define ("__ADSPBF51x__"); \ + break; \ + case BFIN_CPU_BF516: \ + builtin_define ("__ADSPBF516__"); \ + builtin_define ("__ADSPBF51x__"); \ + break; \ + case BFIN_CPU_BF518: \ + builtin_define ("__ADSPBF518__"); \ + builtin_define ("__ADSPBF51x__"); \ + break; \ case BFIN_CPU_BF522: \ builtin_define ("__ADSPBF522__"); \ builtin_define ("__ADSPBF52x__"); \ diff --git a/gcc/config/bfin/elf.h b/gcc/config/bfin/elf.h index 5d317cd8d7f8..9a2ec01cb891 100644 --- a/gcc/config/bfin/elf.h +++ b/gcc/config/bfin/elf.h @@ -12,6 +12,8 @@ crti%O%s crtbegin%O%s crtlibid%O%s" #undef LIB_SPEC #define LIB_SPEC "--start-group -lc %{msim:-lsim}%{!msim:-lnosys} --end-group \ %{!T*:%{!msim:%{!msdram: \ + %{mcpu=bf512*:-T bf512.ld%s}%{mcpu=bf514*:-T bf514.ld%s} \ + %{mcpu=bf516*:-T bf516.ld%s}%{mcpu=bf518*:-T bf518.ld%s} \ %{mcpu=bf522*:-T bf522.ld%s}%{mcpu=bf523*:-T bf523.ld%s} \ %{mcpu=bf524*:-T bf524.ld%s}%{mcpu=bf525*:-T bf525.ld%s} \ %{mcpu=bf526*:-T bf526.ld%s}%{mcpu=bf527*:-T bf527.ld%s} \ diff --git a/gcc/config/bfin/t-bfin-elf b/gcc/config/bfin/t-bfin-elf index 35fafd2ee80f..b5606e7bb758 100644 --- a/gcc/config/bfin/t-bfin-elf +++ b/gcc/config/bfin/t-bfin-elf @@ -21,7 +21,9 @@ MULTILIB_OPTIONS=mcpu=bf532-none MULTILIB_OPTIONS+=mid-shared-library/msep-data/mfdpic mleaf-id-shared-library MULTILIB_DIRNAMES=bf532-none mid-shared-library msep-data mfdpic mleaf-id-shared-library -MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none +MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf512-none mcpu?bf532-none=mcpu?bf514-none +MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf516-none mcpu?bf532-none=mcpu?bf518-none +MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none diff --git a/gcc/config/bfin/t-bfin-linux b/gcc/config/bfin/t-bfin-linux index 782d0cafd818..c8c03d69e28c 100644 --- a/gcc/config/bfin/t-bfin-linux +++ b/gcc/config/bfin/t-bfin-linux @@ -20,7 +20,9 @@ TARGET_LIBGCC2_CFLAGS = -fpic MULTILIB_OPTIONS=mcpu=bf532-none MULTILIB_DIRNAMES=bf532-none -MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none +MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf512-none mcpu?bf532-none=mcpu?bf514-none +MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf516-none mcpu?bf532-none=mcpu?bf518-none +MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none diff --git a/gcc/config/bfin/t-bfin-uclinux b/gcc/config/bfin/t-bfin-uclinux index 437666abb0b3..d075d6b5e653 100644 --- a/gcc/config/bfin/t-bfin-uclinux +++ b/gcc/config/bfin/t-bfin-uclinux @@ -21,7 +21,9 @@ MULTILIB_OPTIONS=mcpu=bf532-none MULTILIB_OPTIONS+=mid-shared-library/msep-data mleaf-id-shared-library MULTILIB_DIRNAMES=bf532-none mid-shared-library msep-data mleaf-id-shared-library -MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none +MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf512-none mcpu?bf532-none=mcpu?bf514-none +MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf516-none mcpu?bf532-none=mcpu?bf518-none +MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf522-none mcpu?bf532-none=mcpu?bf523-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf524-none mcpu?bf532-none=mcpu?bf525-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf526-none mcpu?bf532-none=mcpu?bf527-none MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index aa17a25b12f1..9016949ec96b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -9119,10 +9119,10 @@ size. @item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @opindex mcpu= Specifies the name of the target Blackfin processor. Currently, @var{cpu} -can be one of @samp{bf522}, @samp{bf523}, @samp{bf524}, -@samp{bf525}, @samp{bf526}, @samp{bf527}, -@samp{bf531}, @samp{bf532}, @samp{bf533}, @samp{bf534}, -@samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539}, +can be one of @samp{bf512}, @samp{bf514}, @samp{bf516}, @samp{bf518}, +@samp{bf522}, @samp{bf523}, @samp{bf524}, @samp{bf525}, @samp{bf526}, +@samp{bf527}, @samp{bf531}, @samp{bf532}, @samp{bf533}, +@samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539}, @samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549}, @samp{bf561}. The optional @var{sirevision} specifies the silicon revision of the target diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2db299781f3f..c82eab5f7834 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,31 @@ +2008-10-22 Bernd Schmidt + + From Mike Frysinger + * gcc.target/bfin/mcpu-bf522.c: Check SILICON_REVISION is 0x0002. Invert + check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+. + * gcc.target/bfin/mcpu-bf523.c: Likewise. + * gcc.target/bfin/mcpu-bf524.c: Likewise. + * gcc.target/bfin/mcpu-bf525.c: Likewise. + * gcc.target/bfin/mcpu-bf526.c: Likewise. + * gcc.target/bfin/mcpu-bf527.c: Likewise. + * gcc.target/bfin/mcpu-bf531.c: Check SILICON_REVISION is 0x0006. Invert + check for __WORKAROUND_RETS when SILICON_REVISION is 0x0006+. + * gcc.target/bfin/mcpu-bf532.c: Likewise. + * gcc.target/bfin/mcpu-bf533.c: Likewise. + * gcc.target/bfin/mcpu-bf538.c: Check SILICON_REVISION is 0x0005. Invert + check for __WORKAROUND_RETS when SILICON_REVISION is 0x0005+. + * gcc.target/bfin/mcpu-bf539.c: Likewise. + * gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0002. Invert + check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+. + * gcc.target/bfin/mcpu-bf544.c: Likewise. + * gcc.target/bfin/mcpu-bf547.c: Likewise. + * gcc.target/bfin/mcpu-bf548.c: Likewise. + * gcc.target/bfin/mcpu-bf549.c: Likewise. + * gcc.target/bfin/mcpu-bf512.c: New file. + * gcc.target/bfin/mcpu-bf514.c: Likewise. + * gcc.target/bfin/mcpu-bf516.c: Likewise. + * gcc.target/bfin/mcpu-bf518.c: Likewise. + 2008-10-22 Jakub Jelinek PR middle-end/37882 diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c new file mode 100644 index 000000000000..71fbcf38df96 --- /dev/null +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c @@ -0,0 +1,62 @@ +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf512" } */ + +#ifndef __ADSPBF512__ +#error "__ADSPBF512__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf512" } */ + +#ifndef __ADSPBF512__ +#error "__ADSPBF512__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c new file mode 100644 index 000000000000..b1ae2a2ce03a --- /dev/null +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c @@ -0,0 +1,62 @@ +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf514" } */ + +#ifndef __ADSPBF514__ +#error "__ADSPBF514__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf514" } */ + +#ifndef __ADSPBF514__ +#error "__ADSPBF514__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c new file mode 100644 index 000000000000..675d2659d270 --- /dev/null +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c @@ -0,0 +1,62 @@ +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf516" } */ + +#ifndef __ADSPBF516__ +#error "__ADSPBF516__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf516" } */ + +#ifndef __ADSPBF516__ +#error "__ADSPBF516__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c new file mode 100644 index 000000000000..d0675783b43c --- /dev/null +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c @@ -0,0 +1,62 @@ +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf518" } */ + +#ifndef __ADSPBF518__ +#error "__ADSPBF518__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif +/* Test for -mcpu=. */ +/* { dg-do preprocess } */ +/* { dg-bfin-options "-mcpu=bf518" } */ + +#ifndef __ADSPBF518__ +#error "__ADSPBF518__ is not defined" +#endif + +#ifndef __ADSPBF51x__ +#error "__ADSPBF51x__ is not defined" +#endif + +#if __SILICON_REVISION__ != 0x0000 +#error "__SILICON_REVISION__ is not 0x0000" +#endif + +#ifndef __WORKAROUNDS_ENABLED +#error "__WORKAROUNDS_ENABLED is not defined" +#endif + +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif + +#ifndef __WORKAROUND_SPECULATIVE_LOADS +#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" +#endif + +#ifdef __WORKAROUND_SPECULATIVE_SYNCS +#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" +#endif diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c index 7a1b3f491de4..58c325e0c8b1 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c @@ -10,17 +10,23 @@ #error "__ADSPBF52x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c index 46bc9c108251..10f71eddb49b 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c @@ -10,17 +10,23 @@ #error "__ADSPBF52x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c index 714be44de694..d8e30c4f5ef5 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c @@ -10,17 +10,23 @@ #error "__ADSPBF52x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c index 0c1c60ccaf3a..0e021e46fdea 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c @@ -10,17 +10,23 @@ #error "__ADSPBF52x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c index 43d09e1a93d5..e3e248a9bd56 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c @@ -10,17 +10,23 @@ #error "__ADSPBF52x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c index 179d58714b71..41f493114a26 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c @@ -10,17 +10,23 @@ #error "__ADSPBF52x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c index 9adf99e08e17..ebcf39822147 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c @@ -6,17 +6,23 @@ #error "__ADSPBF531__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0005 -#error "__SILICON_REVISION__ is not 0x0005" +#if __SILICON_REVISION__ != 0x0006 +#error "__SILICON_REVISION__ is not 0x0006" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0005 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c index 002535a5a15e..18ff74a4c74e 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c @@ -6,17 +6,23 @@ #error "__ADSPBF532__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0005 -#error "__SILICON_REVISION__ is not 0x0005" +#if __SILICON_REVISION__ != 0x0006 +#error "__SILICON_REVISION__ is not 0x0006" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0005 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c index a7cf0c6efd7a..d961d7a72db4 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c @@ -6,17 +6,23 @@ #error "__ADSPBF533__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0005 -#error "__SILICON_REVISION__ is not 0x0005" +#if __SILICON_REVISION__ != 0x0006 +#error "__SILICON_REVISION__ is not 0x0006" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0005 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c index 4baac1a0469e..188f8708cfd5 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c @@ -6,17 +6,23 @@ #error "__ADSPBF538__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0004 -#error "__SILICON_REVISION__ is not 0x0004" +#if __SILICON_REVISION__ != 0x0005 +#error "__SILICON_REVISION__ is not 0x0005" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0004 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c index 756c14d11141..acb0d89363db 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c @@ -6,17 +6,23 @@ #error "__ADSPBF539__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0004 -#error "__SILICON_REVISION__ is not 0x0004" +#if __SILICON_REVISION__ != 0x0005 +#error "__SILICON_REVISION__ is not 0x0005" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0004 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c index 199936776dcf..4d95d65def90 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c @@ -10,17 +10,23 @@ #error "__ADSPBF54x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c index e23abe04e032..39314b0089ee 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c @@ -10,17 +10,23 @@ #error "__ADSPBF54x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c index fa34108520f6..4036c02f416d 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c @@ -10,17 +10,23 @@ #error "__ADSPBF54x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c index bc1bcd840d44..71d3bb87bae2 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c @@ -10,17 +10,23 @@ #error "__ADSPBF54x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined" diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c index d60ee3f51f0a..201b1019b770 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c @@ -10,17 +10,23 @@ #error "__ADSPBF54x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0001 -#error "__SILICON_REVISION__ is not 0x0001" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED #error "__WORKAROUNDS_ENABLED is not defined" #endif +#if __SILICON_REVISION__ <= 0x0001 #ifndef __WORKAROUND_RETS #error "__WORKAROUND_RETS is not defined" #endif +#else +#ifdef __WORKAROUND_RETS +#error "__WORKAROUND_RETS is defined" +#endif +#endif #ifndef __WORKAROUND_SPECULATIVE_LOADS #error "__WORKAROUND_SPECULATIVE_LOADS is not defined"