From: Greg Kroah-Hartman Date: Tue, 20 Mar 2018 07:40:30 +0000 (+0100) Subject: 4.9-stable patches X-Git-Tag: v4.15.12~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=88f01e800e8738037371f6a0ea7071503db1417a;p=thirdparty%2Fkernel%2Fstable-queue.git 4.9-stable patches added patches: arm-dts-r8a7794-add-du1-clock-to-device-tree.patch --- diff --git a/queue-4.9/arm-dra7-hwmod_data-prevent-wait_target_disable-error-for-usb_otg_ss.patch b/queue-4.9/arm-dra7-hwmod_data-prevent-wait_target_disable-error-for-usb_otg_ss.patch deleted file mode 100644 index d590e57d8ee..00000000000 --- a/queue-4.9/arm-dra7-hwmod_data-prevent-wait_target_disable-error-for-usb_otg_ss.patch +++ /dev/null @@ -1,47 +0,0 @@ -From foo@baz Sun Mar 18 16:55:33 CET 2018 -From: Roger Quadros -Date: Mon, 13 Mar 2017 13:53:16 +0200 -Subject: ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss - -From: Roger Quadros - - -[ Upstream commit e2d54fe76997301b49311bde7ba8ef52b47896f9 ] - -It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss -is in use then there are random chances that the usb_otg_ss module -will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3. - -Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use -fixes this issue. - -We don't know yet if usb_otg_ss instances 3 and 4 are affected by this -issue or not so don't add this flag for those instances. - -Cc: Tero Kristo -Signed-off-by: Roger Quadros -Signed-off-by: Tony Lindgren -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c -@@ -2572,6 +2572,7 @@ static struct omap_hwmod dra7xx_usb_otg_ - .class = &dra7xx_usb_otg_ss_hwmod_class, - .clkdm_name = "l3init_clkdm", - .main_clk = "dpll_core_h13x2_ck", -+ .flags = HWMOD_CLKDM_NOAUTO, - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET, -@@ -2593,6 +2594,7 @@ static struct omap_hwmod dra7xx_usb_otg_ - .class = &dra7xx_usb_otg_ss_hwmod_class, - .clkdm_name = "l3init_clkdm", - .main_clk = "dpll_core_h13x2_ck", -+ .flags = HWMOD_CLKDM_NOAUTO, - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET, diff --git a/queue-4.9/arm-dts-r8a7794-add-du1-clock-to-device-tree.patch b/queue-4.9/arm-dts-r8a7794-add-du1-clock-to-device-tree.patch new file mode 100644 index 00000000000..f2ed37b06c7 --- /dev/null +++ b/queue-4.9/arm-dts-r8a7794-add-du1-clock-to-device-tree.patch @@ -0,0 +1,58 @@ +From 1764f8081f1524bf629e0744b277db751281ff56 Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Tue, 28 Mar 2017 12:45:30 +0200 +Subject: ARM: dts: r8a7794: Add DU1 clock to device tree + +From: Geert Uytterhoeven + +commit 1764f8081f1524bf629e0744b277db751281ff56 upstream. + +Add the missing module clock for the second channel of the display unit. + +Signed-off-by: Geert Uytterhoeven +Acked-by: Laurent Pinchart +Signed-off-by: Simon Horman +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/r8a7794.dtsi | 8 +++++--- + include/dt-bindings/clock/r8a7794-clock.h | 1 + + 2 files changed, 6 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/r8a7794.dtsi ++++ b/arch/arm/boot/dts/r8a7794.dtsi +@@ -1261,19 +1261,21 @@ + clocks = <&mp_clk>, <&hp_clk>, + <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, + <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, +- <&zx_clk>; ++ <&zx_clk>, <&zx_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7794_CLK_EHCI R8A7794_CLK_HSUSB + R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5 + R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0 + R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1 +- R8A7794_CLK_SCIF0 R8A7794_CLK_DU0 ++ R8A7794_CLK_SCIF0 ++ R8A7794_CLK_DU1 R8A7794_CLK_DU0 + >; + clock-output-names = + "ehci", "hsusb", + "hscif2", "scif5", "scif4", "hscif1", "hscif0", +- "scif3", "scif2", "scif1", "scif0", "du0"; ++ "scif3", "scif2", "scif1", "scif0", ++ "du1", "du0"; + }; + mstp8_clks: mstp8_clks@e6150990 { + compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; +--- a/include/dt-bindings/clock/r8a7794-clock.h ++++ b/include/dt-bindings/clock/r8a7794-clock.h +@@ -81,6 +81,7 @@ + #define R8A7794_CLK_SCIF2 19 + #define R8A7794_CLK_SCIF1 20 + #define R8A7794_CLK_SCIF0 21 ++#define R8A7794_CLK_DU1 23 + #define R8A7794_CLK_DU0 24 + + /* MSTP8 */ diff --git a/queue-4.9/clk-sunxi-ng-a33-add-offset-and-minimum-value-for-ddr1-pll-n-factor.patch b/queue-4.9/clk-sunxi-ng-a33-add-offset-and-minimum-value-for-ddr1-pll-n-factor.patch deleted file mode 100644 index 3303e7e0865..00000000000 --- a/queue-4.9/clk-sunxi-ng-a33-add-offset-and-minimum-value-for-ddr1-pll-n-factor.patch +++ /dev/null @@ -1,53 +0,0 @@ -From foo@baz Sun Mar 18 16:55:33 CET 2018 -From: Chen-Yu Tsai -Date: Wed, 5 Apr 2017 14:37:44 +0800 -Subject: clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor - -From: Chen-Yu Tsai - - -[ Upstream commit 68f37d862403e8f95337b2eca90af15d0b8cd5d7 ] - -The DDR1 PLL on the A33 is an oddball amongst the A33 CCU clocks. -It is a clock multiplier, with the effective multiplier in the -range of 12 ~ 255 and no offset between the multiplier value and -the value programmed into the register. - -Implement the zero offset and minimum value of 12 for this clock. - -Fixes: d05c748bd730 ("clk: sunxi-ng: Add A33 CCU support") -Signed-off-by: Chen-Yu Tsai -Signed-off-by: Maxime Ripard -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 18 +++++++++++------- - 1 file changed, 11 insertions(+), 7 deletions(-) - ---- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c -+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c -@@ -159,13 +159,17 @@ static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK( - BIT(28), /* lock */ - CLK_SET_RATE_UNGATE); - --/* TODO: Fix N */ --static SUNXI_CCU_N_WITH_GATE_LOCK(pll_ddr1_clk, "pll-ddr1", -- "osc24M", 0x04c, -- 8, 6, /* N */ -- BIT(31), /* gate */ -- BIT(28), /* lock */ -- CLK_SET_RATE_UNGATE); -+static struct ccu_mult pll_ddr1_clk = { -+ .enable = BIT(31), -+ .lock = BIT(28), -+ .mult = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 6, 0, 12, 0), -+ .common = { -+ .reg = 0x04c, -+ .hw.init = CLK_HW_INIT("pll-ddr1", "osc24M", -+ &ccu_mult_ops, -+ CLK_SET_RATE_UNGATE), -+ }, -+}; - - static const char * const cpux_parents[] = { "osc32k", "osc24M", - "pll-cpux" , "pll-cpux" }; diff --git a/queue-4.9/dmaengine-bcm2835-dma-use-vchan_terminate_vdesc-instead-of-desc_free.patch b/queue-4.9/dmaengine-bcm2835-dma-use-vchan_terminate_vdesc-instead-of-desc_free.patch deleted file mode 100644 index 0b5c983fc9f..00000000000 --- a/queue-4.9/dmaengine-bcm2835-dma-use-vchan_terminate_vdesc-instead-of-desc_free.patch +++ /dev/null @@ -1,58 +0,0 @@ -From foo@baz Sun Mar 18 16:55:33 CET 2018 -From: Peter Ujfalusi -Date: Tue, 14 Nov 2017 16:32:07 +0200 -Subject: dmaengine: bcm2835-dma: Use vchan_terminate_vdesc() instead of desc_free - -From: Peter Ujfalusi - - -[ Upstream commit de92436ac40ffe9933230aa503e24dbb5ede9201 ] - -To avoid race with vchan_complete, use the race free way to terminate -running transfer. - -Implement the device_synchronize callback to make sure that the terminated -descriptor is freed. - -Signed-off-by: Peter Ujfalusi -Acked-by: Eric Anholt -Signed-off-by: Vinod Koul -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - drivers/dma/bcm2835-dma.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - ---- a/drivers/dma/bcm2835-dma.c -+++ b/drivers/dma/bcm2835-dma.c -@@ -812,7 +812,7 @@ static int bcm2835_dma_terminate_all(str - * c->desc is NULL and exit.) - */ - if (c->desc) { -- bcm2835_dma_desc_free(&c->desc->vd); -+ vchan_terminate_vdesc(&c->desc->vd); - c->desc = NULL; - bcm2835_dma_abort(c->chan_base); - -@@ -836,6 +836,13 @@ static int bcm2835_dma_terminate_all(str - return 0; - } - -+static void bcm2835_dma_synchronize(struct dma_chan *chan) -+{ -+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); -+ -+ vchan_synchronize(&c->vc); -+} -+ - static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, - int irq, unsigned int irq_flags) - { -@@ -942,6 +949,7 @@ static int bcm2835_dma_probe(struct plat - od->ddev.device_prep_dma_memcpy = bcm2835_dma_prep_dma_memcpy; - od->ddev.device_config = bcm2835_dma_slave_config; - od->ddev.device_terminate_all = bcm2835_dma_terminate_all; -+ od->ddev.device_synchronize = bcm2835_dma_synchronize; - od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); - od->ddev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); - od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | diff --git a/queue-4.9/series b/queue-4.9/series index a535dba6ddc..67dd981ce40 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -73,10 +73,10 @@ driver-adm1275-set-the-m-b-and-r-coefficients-correctly-for-power.patch bonding-make-speed-duplex-setting-consistent-with-link-state.patch mm-fix-false-positive-vm_bug_on-in-page_cache_-get-add-_speculative.patch alsa-firewire-lib-add-a-quirk-of-packet-without-valid-eoh-in-cip-format.patch +arm-dts-r8a7794-add-du1-clock-to-device-tree.patch arm-dts-r8a7794-correct-clock-of-du1.patch arm-dts-silk-correct-clock-of-du1.patch blk-throttle-make-sure-expire-time-isn-t-too-big.patch -arm-dra7-hwmod_data-prevent-wait_target_disable-error-for-usb_otg_ss.patch regulator-core-limit-propagation-of-parent-voltage-count-and-list.patch perf-trace-handle-unpaired-raw_syscalls-sys_exit-event.patch f2fs-relax-node-version-check-for-victim-data-in-gc.patch @@ -100,10 +100,8 @@ net-faraday-add-missing-include-of-of.h.patch qed-fix-tm-block-ilt-allocation.patch rtmutex-fix-pi-chain-order-integrity.patch printk-correctly-handle-preemption-in-console_unlock.patch -soc-tegra-fix-link-errors-with-pmc-disabled.patch drm-rcar-du-handle-event-when-disabling-crtcs.patch arm-dts-koelsch-correct-clock-frequency-of-x2-du-clock-input.patch -clk-sunxi-ng-a33-add-offset-and-minimum-value-for-ddr1-pll-n-factor.patch reiserfs-make-cancel_old_flush-reliable.patch asoc-rt5677-add-of-device-id-table.patch ib-hfi1-check-for-qsfp-presence-before-attempting-reads.patch @@ -182,7 +180,6 @@ leds-pm8058-silence-pointer-to-integer-size-warning.patch power-supply-ab8500_charger-fix-an-error-handling-path.patch power-supply-ab8500_charger-bail-out-in-case-of-error-in-ab8500_charger_init_hw_registers.patch ath10k-update-tdls-teardown-state-to-target.patch -dmaengine-bcm2835-dma-use-vchan_terminate_vdesc-instead-of-desc_free.patch scsi-ses-don-t-ask-for-diagnostic-pages-repeatedly-during-probe.patch pwm-stmpe-fix-wrong-register-offset-for-hwpwm-2-case.patch clk-qcom-msm8916-fix-mnd_width-for-codec_digcodec.patch diff --git a/queue-4.9/soc-tegra-fix-link-errors-with-pmc-disabled.patch b/queue-4.9/soc-tegra-fix-link-errors-with-pmc-disabled.patch deleted file mode 100644 index 41787beb247..00000000000 --- a/queue-4.9/soc-tegra-fix-link-errors-with-pmc-disabled.patch +++ /dev/null @@ -1,95 +0,0 @@ -From foo@baz Sun Mar 18 16:55:33 CET 2018 -From: Arnd Bergmann -Date: Mon, 20 Mar 2017 10:13:06 +0100 -Subject: soc/tegra: Fix link errors with PMC disabled - -From: Arnd Bergmann - - -[ Upstream commit bd737038d555468198495230f4233b9ba92e774c ] - -With the new Tegra186 PMC driver merged, anything that relies on the previous -PMC driver fails to link when that is disabled: - -arch/arm/mach-tegra/pm.o: In function `tegra_pm_set': -pm.c:(.text.tegra_pm_set+0x3c): undefined reference to `tegra_pmc_enter_suspend_mode' -arch/arm/mach-tegra/pm.o: In function `tegra_suspend_enter': -pm.c:(.text.tegra_suspend_enter+0x4): undefined reference to `tegra_pmc_get_suspend_mode' -arch/arm/mach-tegra/pm.o: In function `tegra_init_suspend': -pm.c:(.init.text+0x1c): undefined reference to `tegra_pmc_get_suspend_mode' -pm.c:(.init.text+0x74): undefined reference to `tegra_pmc_set_suspend_mode' - -ERROR: tegra_powergate_sequence_power_up [drivers/ata/ahci_tegra.ko] undefined! -ERROR: tegra_powergate_power_off [drivers/ata/ahci_tegra.ko] undefined! - -Making the definition depend on the presence of the driver makes it build -again, though that might not be the correct fix. - -Reported-by: Krzysztof Kozlowski -Fixes: 854014236290 ("soc/tegra: Implement Tegra186 PMC support") -Signed-off-by: Arnd Bergmann -Signed-off-by: Thierry Reding -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - include/soc/tegra/pmc.h | 29 +++++++++++++++++++++-------- - 1 file changed, 21 insertions(+), 8 deletions(-) - ---- a/include/soc/tegra/pmc.h -+++ b/include/soc/tegra/pmc.h -@@ -26,12 +26,6 @@ - struct clk; - struct reset_control; - --#ifdef CONFIG_PM_SLEEP --enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void); --void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode); --void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode); --#endif /* CONFIG_PM_SLEEP */ -- - #ifdef CONFIG_SMP - bool tegra_pmc_cpu_is_powered(unsigned int cpuid); - int tegra_pmc_cpu_power_on(unsigned int cpuid); -@@ -108,7 +102,7 @@ int tegra_pmc_cpu_remove_clamping(unsign - #define TEGRA_IO_RAIL_LVDS 57 - #define TEGRA_IO_RAIL_SYS_DDC 58 - --#ifdef CONFIG_ARCH_TEGRA -+#ifdef CONFIG_SOC_TEGRA_PMC - int tegra_powergate_is_powered(unsigned int id); - int tegra_powergate_power_on(unsigned int id); - int tegra_powergate_power_off(unsigned int id); -@@ -120,6 +114,11 @@ int tegra_powergate_sequence_power_up(un - - int tegra_io_rail_power_on(unsigned int id); - int tegra_io_rail_power_off(unsigned int id); -+ -+enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void); -+void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode); -+void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode); -+ - #else - static inline int tegra_powergate_is_powered(unsigned int id) - { -@@ -157,6 +156,20 @@ static inline int tegra_io_rail_power_of - { - return -ENOSYS; - } --#endif /* CONFIG_ARCH_TEGRA */ -+ -+static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void) -+{ -+ return TEGRA_SUSPEND_NONE; -+} -+ -+static inline void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode) -+{ -+} -+ -+static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode) -+{ -+} -+ -+#endif /* CONFIG_SOC_TEGRA_PMC */ - - #endif /* __SOC_TEGRA_PMC_H__ */